1# SPDX-License-Identifier: GPL-2.0 2comment "Processor Type" 3 4choice 5 prompt "CPU/machine family support" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 8 help 9 The Freescale (was Motorola) M68K family of processors implements 10 the full 68000 processor instruction set. 11 The Freescale ColdFire family of processors is a modern derivative 12 of the 68000 processor family. They are mainly targeted at embedded 13 applications, and are all System-On-Chip (SOC) devices, as opposed 14 to stand alone CPUs. They implement a subset of the original 68000 15 processor instruction set. 16 If you anticipate running this kernel on a computer with a classic 17 MC68xxx processor, select M68KCLASSIC. 18 If you anticipate running this kernel on a computer with a ColdFire 19 processor, select COLDFIRE. 20 21config M68KCLASSIC 22 bool "Classic M68K CPU/machine family support" 23 select HAVE_ARCH_PFN_VALID 24 select M68020 if MMU && !(M68030 || M68040 || M68060) 25 26config COLDFIRE 27 bool "Coldfire CPU family support" 28 select CPU_HAS_NO_BITFIELDS 29 select CPU_HAS_NO_CAS 30 select CPU_HAS_NO_MULDIV64 31 select GENERIC_CSUM 32 select GPIOLIB 33 select HAVE_LEGACY_CLK 34 select HAVE_PAGE_SIZE_8KB if !MMU 35 36config SUN3 37 bool "Sun3 machine support" 38 depends on MMU 39 select HAVE_ARCH_PFN_VALID 40 select LEGACY_TIMER_TICK 41 select NO_DMA 42 select M68020 43 help 44 This option enables support for the Sun 3 series of workstations 45 (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU 46 but the custom memory management unit makes them incompatible with 47 all other classic m68k machines, including Sun 3x. 48 49endchoice 50 51config M68000 52 def_bool M68KCLASSIC && !MMU 53 select CPU_HAS_NO_BITFIELDS 54 select CPU_HAS_NO_CAS 55 select CPU_HAS_NO_MULDIV64 56 select CPU_HAS_NO_UNALIGNED 57 select GENERIC_CSUM 58 select CPU_NO_EFFICIENT_FFS 59 select HAVE_ARCH_HASH 60 select HAVE_PAGE_SIZE_4KB 61 select LEGACY_TIMER_TICK 62 help 63 The Freescale (was Motorola) 68000 CPU is the first generation of 64 the well known M68K family of processors. The CPU core as well as 65 being available as a stand alone CPU was also used in many 66 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 67 a paging MMU. 68 69config M68020 70 bool "68020 support" if M68KCLASSIC 71 depends on MMU 72 select FPU 73 select CPU_HAS_ADDRESS_SPACES 74 help 75 If you anticipate running this kernel on a computer with a MC68020 76 processor, say Y. Otherwise, say N. Note that the 68020 requires a 77 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 78 Sun 3, which provides its own version. 79 80if M68KCLASSIC && MMU 81 82config M68030 83 bool "68030 support" 84 select FPU 85 select CPU_HAS_ADDRESS_SPACES 86 help 87 If you anticipate running this kernel on a computer with a MC68030 88 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 89 work, as it does not include an MMU (Memory Management Unit). 90 91config M68040 92 bool "68040 support" 93 select FPU 94 select CPU_HAS_ADDRESS_SPACES 95 help 96 If you anticipate running this kernel on a computer with a MC68LC040 97 or MC68040 processor, say Y. Otherwise, say N. Note that an 98 MC68EC040 will not work, as it does not include an MMU (Memory 99 Management Unit). 100 101config M68060 102 bool "68060 support" 103 select FPU 104 select CPU_HAS_ADDRESS_SPACES 105 help 106 If you anticipate running this kernel on a computer with a MC68060 107 processor, say Y. Otherwise, say N. 108 109endif # M68KCLASSIC 110 111config M68328 112 bool 113 depends on !MMU 114 select M68000 115 help 116 Motorola 68328 processor support. 117 118config M68EZ328 119 bool 120 depends on !MMU 121 select M68000 122 help 123 Motorola 68EX328 processor support. 124 125config M68VZ328 126 bool 127 depends on !MMU 128 select M68000 129 help 130 Motorola 68VZ328 processor support. 131 132if COLDFIRE 133 134choice 135 prompt "ColdFire SoC type" 136 default M520x 137 help 138 Select the type of ColdFire System-on-Chip (SoC) that you want 139 to build for. 140 141config M5206 142 bool "MCF5206" 143 depends on !MMU 144 select COLDFIRE_SW_A7 145 select COLDFIRE_TIMERS 146 select HAVE_MBAR 147 select CPU_NO_EFFICIENT_FFS 148 help 149 Motorola ColdFire 5206 processor support. 150 151config M5206e 152 bool "MCF5206e" 153 depends on !MMU 154 select COLDFIRE_SW_A7 155 select COLDFIRE_TIMERS 156 select HAVE_MBAR 157 select CPU_NO_EFFICIENT_FFS 158 help 159 Motorola ColdFire 5206e processor support. 160 161config M520x 162 bool "MCF520x" 163 depends on !MMU 164 select COLDFIRE_PIT_TIMER 165 select HAVE_CACHE_SPLIT 166 help 167 Freescale Coldfire 5207/5208 processor support. 168 169config M523x 170 bool "MCF523x" 171 depends on !MMU 172 select COLDFIRE_PIT_TIMER 173 select HAVE_CACHE_SPLIT 174 select HAVE_IPSBAR 175 help 176 Freescale Coldfire 5230/1/2/4/5 processor support 177 178config M5249 179 bool "MCF5249" 180 depends on !MMU 181 select COLDFIRE_SW_A7 182 select COLDFIRE_TIMERS 183 select HAVE_MBAR 184 select CPU_NO_EFFICIENT_FFS 185 help 186 Motorola ColdFire 5249 processor support. 187 188config M525x 189 bool "MCF525x" 190 depends on !MMU 191 select COLDFIRE_SW_A7 192 select COLDFIRE_TIMERS 193 select HAVE_MBAR 194 select CPU_NO_EFFICIENT_FFS 195 help 196 Freescale (Motorola) Coldfire 5251/5253 processor support. 197 198config M5271 199 bool "MCF5271" 200 depends on !MMU 201 select COLDFIRE_PIT_TIMER 202 select M527x 203 select HAVE_CACHE_SPLIT 204 select HAVE_IPSBAR 205 help 206 Freescale (Motorola) ColdFire 5270/5271 processor support. 207 208config M5272 209 bool "MCF5272" 210 depends on !MMU 211 select COLDFIRE_SW_A7 212 select COLDFIRE_TIMERS 213 select HAVE_MBAR 214 select CPU_NO_EFFICIENT_FFS 215 help 216 Motorola ColdFire 5272 processor support. 217 218config M5275 219 bool "MCF5275" 220 depends on !MMU 221 select COLDFIRE_PIT_TIMER 222 select M527x 223 select HAVE_CACHE_SPLIT 224 select HAVE_IPSBAR 225 help 226 Freescale (Motorola) ColdFire 5274/5275 processor support. 227 228config M528x 229 bool "MCF528x" 230 depends on !MMU 231 select COLDFIRE_PIT_TIMER 232 select HAVE_CACHE_SPLIT 233 select HAVE_IPSBAR 234 help 235 Motorola ColdFire 5280/5282 processor support. 236 237config M5307 238 bool "MCF5307" 239 depends on !MMU 240 select COLDFIRE_TIMERS 241 select COLDFIRE_SW_A7 242 select HAVE_CACHE_CB 243 select HAVE_MBAR 244 select CPU_NO_EFFICIENT_FFS 245 help 246 Motorola ColdFire 5307 processor support. 247 248config M532x 249 bool "MCF532x" 250 depends on !MMU 251 select COLDFIRE_TIMERS 252 select M53xx 253 select HAVE_CACHE_CB 254 help 255 Freescale (Motorola) ColdFire 532x processor support. 256 257config M537x 258 bool "MCF537x" 259 depends on !MMU 260 select COLDFIRE_TIMERS 261 select M53xx 262 select HAVE_CACHE_CB 263 help 264 Freescale ColdFire 537x processor support. 265 266config M5407 267 bool "MCF5407" 268 depends on !MMU 269 select COLDFIRE_SW_A7 270 select COLDFIRE_TIMERS 271 select HAVE_CACHE_CB 272 select HAVE_MBAR 273 select CPU_NO_EFFICIENT_FFS 274 help 275 Motorola ColdFire 5407 processor support. 276 277config M547x 278 bool "MCF547x" 279 select M54xx 280 select COLDFIRE_SLTIMERS 281 select MMU_COLDFIRE if MMU 282 select FPU if MMU 283 select HAVE_CACHE_CB 284 select HAVE_MBAR 285 select CPU_NO_EFFICIENT_FFS 286 help 287 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 288 289config M548x 290 bool "MCF548x" 291 select COLDFIRE_SLTIMERS 292 select MMU_COLDFIRE if MMU 293 select FPU if MMU 294 select M54xx 295 select HAVE_CACHE_CB 296 select HAVE_MBAR 297 select CPU_NO_EFFICIENT_FFS 298 help 299 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 300 301config M5441x 302 bool "MCF5441x" 303 select COLDFIRE_PIT_TIMER 304 select MMU_COLDFIRE if MMU 305 select HAVE_CACHE_CB 306 help 307 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 308 309endchoice 310 311config M527x 312 bool 313 314config M53xx 315 bool 316 317config M54xx 318 select HAVE_PCI 319 bool 320 321config COLDFIRE_PIT_TIMER 322 bool 323 324config COLDFIRE_TIMERS 325 bool 326 select LEGACY_TIMER_TICK 327 328config COLDFIRE_SLTIMERS 329 bool 330 select LEGACY_TIMER_TICK 331 332endif # COLDFIRE 333 334comment "Processor Specific Options" 335 336config M68KFPU_EMU 337 bool "Math emulation support" 338 depends on (M68KCLASSIC || SUN3) && FPU 339 help 340 At some point in the future, this will cause floating-point math 341 instructions to be emulated by the kernel on machines that lack a 342 floating-point math coprocessor. Thrill-seekers and chronically 343 sleep-deprived psychotic hacker types can say Y now, everyone else 344 should probably wait a while. 345 346config M68KFPU_EMU_EXTRAPREC 347 bool "Math emulation extra precision" 348 depends on M68KFPU_EMU 349 help 350 The fpu uses normally a few bit more during calculations for 351 correct rounding, the emulator can (often) do the same but this 352 extra calculation can cost quite some time, so you can disable 353 it here. The emulator will then "only" calculate with a 64 bit 354 mantissa and round slightly incorrect, what is more than enough 355 for normal usage. 356 357config M68KFPU_EMU_ONLY 358 bool "Math emulation only kernel" 359 depends on M68KFPU_EMU 360 help 361 This option prevents any floating-point instructions from being 362 compiled into the kernel, thereby the kernel doesn't save any 363 floating point context anymore during task switches, so this 364 kernel will only be usable on machines without a floating-point 365 math coprocessor. This makes the kernel a bit faster as no tests 366 needs to be executed whether a floating-point instruction in the 367 kernel should be executed or not. 368 369config ADVANCED 370 bool "Advanced configuration options" 371 depends on MMU 372 help 373 This gives you access to some advanced options for the CPU. The 374 defaults should be fine for most users, but these options may make 375 it possible for you to improve performance somewhat if you know what 376 you are doing. 377 378 Note that the answer to this question won't directly affect the 379 kernel: saying N will just cause the configurator to skip all 380 the questions about these options. 381 382 Most users should say N to this question. 383 384config RMW_INSNS 385 bool "Use read-modify-write instructions" 386 depends on ADVANCED && !CPU_HAS_NO_CAS 387 help 388 This allows to use certain instructions that work with indivisible 389 read-modify-write bus cycles. While this is faster than the 390 workaround of disabling interrupts, it can conflict with DMA 391 ( = direct memory access) on many Amiga systems, and it is also said 392 to destabilize other machines. It is very likely that this will 393 cause serious problems on any Amiga or Atari Medusa if set. The only 394 configuration where it should work are 68030-based Ataris, where it 395 apparently improves performance. But you've been warned! Unless you 396 really know what you are doing, say N. Try Y only if you're quite 397 adventurous. 398 399config SINGLE_MEMORY_CHUNK 400 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 401 depends on MMU 402 default y if SUN3 || MMU_COLDFIRE 403 help 404 Ignore all but the first contiguous chunk of physical memory for VM 405 purposes. This will save a few bytes kernel size and may speed up 406 some operations. 407 When this option os set to N, you may want to lower "Maximum zone 408 order" to save memory that could be wasted for unused memory map. 409 Say N if not sure. 410 411config ARCH_FORCE_MAX_ORDER 412 int "Order of maximal physically contiguous allocations" if ADVANCED 413 depends on !SINGLE_MEMORY_CHUNK 414 default "10" 415 help 416 The kernel page allocator limits the size of maximal physically 417 contiguous allocations. The limit is called MAX_PAGE_ORDER and it 418 defines the maximal power of two of number of pages that can be 419 allocated as a single contiguous block. This option allows 420 overriding the default setting when ability to allocate very 421 large blocks of physically contiguous memory is required. 422 423 For systems that have holes in their physical address space this 424 value also defines the minimal size of the hole that allows 425 freeing unused memory map. 426 427 Don't change if unsure. 428 429config 060_WRITETHROUGH 430 bool "Use write-through caching for 68060 supervisor accesses" 431 depends on ADVANCED && M68060 432 help 433 The 68060 generally uses copyback caching of recently accessed data. 434 Copyback caching means that memory writes will be held in an on-chip 435 cache and only written back to memory some time later. Saying Y 436 here will force supervisor (kernel) accesses to use writethrough 437 caching. Writethrough caching means that data is written to memory 438 straight away, so that cache and memory data always agree. 439 Writethrough caching is less efficient, but is needed for some 440 drivers on 68060 based systems where the 68060 bus snooping signal 441 is hardwired on. The 53c710 SCSI driver is known to suffer from 442 this problem. 443 444config M68K_L2_CACHE 445 bool 446 depends on MAC 447 default y 448 449config CPU_HAS_NO_BITFIELDS 450 bool 451 452config CPU_HAS_NO_CAS 453 bool 454 455config CPU_HAS_NO_MULDIV64 456 bool 457 458config CPU_HAS_NO_UNALIGNED 459 bool 460 461config CPU_HAS_ADDRESS_SPACES 462 bool 463 select ALTERNATE_USER_ADDRESS_SPACE 464 465config FPU 466 bool 467 468config COLDFIRE_SW_A7 469 bool 470 471config HAVE_CACHE_SPLIT 472 bool 473 474config HAVE_CACHE_CB 475 bool 476 477config HAVE_MBAR 478 bool 479 480config HAVE_IPSBAR 481 bool 482 483config CLOCK_FREQ 484 int "Set the core clock frequency" 485 default "25000000" if M5206 486 default "54000000" if M5206e 487 default "166666666" if M520x 488 default "140000000" if M5249 489 default "150000000" if M527x || M523x 490 default "90000000" if M5307 491 default "50000000" if M5407 492 default "266000000" if M54xx 493 default "66666666" 494 depends on COLDFIRE 495 help 496 Define the CPU clock frequency in use. This is the core clock 497 frequency, it may or may not be the same as the external clock 498 crystal fitted to your board. Some processors have an internal 499 PLL and can have their frequency programmed at run time, others 500 use internal dividers. In general the kernel won't setup a PLL 501 if it is fitted (there are some exceptions). This value will be 502 specific to the exact CPU that you are using. 503 504config OLDMASK 505 bool "Old mask 5307 (1H55J) silicon" 506 depends on M5307 507 help 508 Build support for the older revision ColdFire 5307 silicon. 509 Specifically this is the 1H55J mask revision. 510 511if HAVE_CACHE_SPLIT 512choice 513 prompt "Split Cache Configuration" 514 default CACHE_I 515 516config CACHE_I 517 bool "Instruction" 518 help 519 Use all of the ColdFire CPU cache memory as an instruction cache. 520 521config CACHE_D 522 bool "Data" 523 help 524 Use all of the ColdFire CPU cache memory as a data cache. 525 526config CACHE_BOTH 527 bool "Both" 528 help 529 Split the ColdFire CPU cache, and use half as an instruction cache 530 and half as a data cache. 531endchoice 532endif # HAVE_CACHE_SPLIT 533 534if HAVE_CACHE_CB 535choice 536 prompt "Data cache mode" 537 default CACHE_WRITETHRU 538 539config CACHE_WRITETHRU 540 bool "Write-through" 541 help 542 The ColdFire CPU cache is set into Write-through mode. 543 544config CACHE_COPYBACK 545 bool "Copy-back" 546 help 547 The ColdFire CPU cache is set into Copy-back mode. 548endchoice 549endif # HAVE_CACHE_CB 550 551# Coldfire cores that do not have a data cache configured can do coherent DMA. 552config COLDFIRE_COHERENT_DMA 553 bool 554 default y 555 depends on COLDFIRE 556 depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH 557 558config M68K_NONCOHERENT_DMA 559 bool 560 default y 561 depends on HAS_DMA && !COLDFIRE_COHERENT_DMA 562