1comment "Processor Type" 2 3choice 4 prompt "CPU family support" 5 default M68KCLASSIC if MMU 6 default COLDFIRE if !MMU 7 help 8 The Freescale (was Motorola) M68K family of processors implements 9 the full 68000 processor instruction set. 10 The Freescale ColdFire family of processors is a modern derivative 11 of the 68000 processor family. They are mainly targeted at embedded 12 applications, and are all System-On-Chip (SOC) devices, as opposed 13 to stand alone CPUs. They implement a subset of the original 68000 14 processor instruction set. 15 If you anticipate running this kernel on a computer with a classic 16 MC68xxx processor, select M68KCLASSIC. 17 If you anticipate running this kernel on a computer with a ColdFire 18 processor, select COLDFIRE. 19 20config M68KCLASSIC 21 bool "Classic M68K CPU family support" 22 23config COLDFIRE 24 bool "Coldfire CPU family support" 25 select GENERIC_GPIO 26 select ARCH_REQUIRE_GPIOLIB 27 select ARCH_HAVE_CUSTOM_GPIO_H 28 select CPU_HAS_NO_BITFIELDS 29 select CPU_HAS_NO_MULDIV64 30 select GENERIC_CSUM 31 32endchoice 33 34if M68KCLASSIC 35 36config M68000 37 bool 38 select CPU_HAS_NO_BITFIELDS 39 select CPU_HAS_NO_MULDIV64 40 select CPU_HAS_NO_UNALIGNED 41 select GENERIC_CSUM 42 help 43 The Freescale (was Motorola) 68000 CPU is the first generation of 44 the well known M68K family of processors. The CPU core as well as 45 being available as a stand alone CPU was also used in many 46 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 47 a paging MMU. 48 49config MCPU32 50 bool 51 select CPU_HAS_NO_BITFIELDS 52 select CPU_HAS_NO_UNALIGNED 53 help 54 The Freescale (was then Motorola) CPU32 is a CPU core that is 55 based on the 68020 processor. For the most part it is used in 56 System-On-Chip parts, and does not contain a paging MMU. 57 58config M68020 59 bool "68020 support" 60 depends on MMU 61 select GENERIC_ATOMIC64 62 select CPU_HAS_ADDRESS_SPACES 63 help 64 If you anticipate running this kernel on a computer with a MC68020 65 processor, say Y. Otherwise, say N. Note that the 68020 requires a 66 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 67 Sun 3, which provides its own version. 68 69config M68030 70 bool "68030 support" 71 depends on MMU && !MMU_SUN3 72 select GENERIC_ATOMIC64 73 select CPU_HAS_ADDRESS_SPACES 74 help 75 If you anticipate running this kernel on a computer with a MC68030 76 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 77 work, as it does not include an MMU (Memory Management Unit). 78 79config M68040 80 bool "68040 support" 81 depends on MMU && !MMU_SUN3 82 select GENERIC_ATOMIC64 83 select CPU_HAS_ADDRESS_SPACES 84 help 85 If you anticipate running this kernel on a computer with a MC68LC040 86 or MC68040 processor, say Y. Otherwise, say N. Note that an 87 MC68EC040 will not work, as it does not include an MMU (Memory 88 Management Unit). 89 90config M68060 91 bool "68060 support" 92 depends on MMU && !MMU_SUN3 93 select GENERIC_ATOMIC64 94 select CPU_HAS_ADDRESS_SPACES 95 help 96 If you anticipate running this kernel on a computer with a MC68060 97 processor, say Y. Otherwise, say N. 98 99config M68328 100 bool "MC68328" 101 depends on !MMU 102 select M68000 103 help 104 Motorola 68328 processor support. 105 106config M68EZ328 107 bool "MC68EZ328" 108 depends on !MMU 109 select M68000 110 help 111 Motorola 68EX328 processor support. 112 113config M68VZ328 114 bool "MC68VZ328" 115 depends on !MMU 116 select M68000 117 help 118 Motorola 68VZ328 processor support. 119 120config M68360 121 bool "MC68360" 122 depends on !MMU 123 select MCPU32 124 help 125 Motorola 68360 processor support. 126 127endif # M68KCLASSIC 128 129if COLDFIRE 130 131config M5206 132 bool "MCF5206" 133 depends on !MMU 134 select COLDFIRE_SW_A7 135 select HAVE_MBAR 136 help 137 Motorola ColdFire 5206 processor support. 138 139config M5206e 140 bool "MCF5206e" 141 depends on !MMU 142 select COLDFIRE_SW_A7 143 select HAVE_MBAR 144 help 145 Motorola ColdFire 5206e processor support. 146 147config M520x 148 bool "MCF520x" 149 depends on !MMU 150 select GENERIC_CLOCKEVENTS 151 select HAVE_CACHE_SPLIT 152 help 153 Freescale Coldfire 5207/5208 processor support. 154 155config M523x 156 bool "MCF523x" 157 depends on !MMU 158 select GENERIC_CLOCKEVENTS 159 select HAVE_CACHE_SPLIT 160 select HAVE_IPSBAR 161 help 162 Freescale Coldfire 5230/1/2/4/5 processor support 163 164config M5249 165 bool "MCF5249" 166 depends on !MMU 167 select COLDFIRE_SW_A7 168 select HAVE_MBAR 169 help 170 Motorola ColdFire 5249 processor support. 171 172config M527x 173 bool 174 175config M5271 176 bool "MCF5271" 177 depends on !MMU 178 select M527x 179 select HAVE_CACHE_SPLIT 180 select HAVE_IPSBAR 181 select GENERIC_CLOCKEVENTS 182 help 183 Freescale (Motorola) ColdFire 5270/5271 processor support. 184 185config M5272 186 bool "MCF5272" 187 depends on !MMU 188 select COLDFIRE_SW_A7 189 select HAVE_MBAR 190 help 191 Motorola ColdFire 5272 processor support. 192 193config M5275 194 bool "MCF5275" 195 depends on !MMU 196 select M527x 197 select HAVE_CACHE_SPLIT 198 select HAVE_IPSBAR 199 select GENERIC_CLOCKEVENTS 200 help 201 Freescale (Motorola) ColdFire 5274/5275 processor support. 202 203config M528x 204 bool "MCF528x" 205 depends on !MMU 206 select GENERIC_CLOCKEVENTS 207 select HAVE_CACHE_SPLIT 208 select HAVE_IPSBAR 209 help 210 Motorola ColdFire 5280/5282 processor support. 211 212config M5307 213 bool "MCF5307" 214 depends on !MMU 215 select COLDFIRE_SW_A7 216 select HAVE_CACHE_CB 217 select HAVE_MBAR 218 help 219 Motorola ColdFire 5307 processor support. 220 221config M532x 222 bool "MCF532x" 223 depends on !MMU 224 select HAVE_CACHE_CB 225 help 226 Freescale (Motorola) ColdFire 532x processor support. 227 228config M5407 229 bool "MCF5407" 230 depends on !MMU 231 select COLDFIRE_SW_A7 232 select HAVE_CACHE_CB 233 select HAVE_MBAR 234 help 235 Motorola ColdFire 5407 processor support. 236 237config M54xx 238 bool 239 240config M547x 241 bool "MCF547x" 242 select M54xx 243 select MMU_COLDFIRE if MMU 244 select HAVE_CACHE_CB 245 select HAVE_MBAR 246 help 247 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 248 249config M548x 250 bool "MCF548x" 251 select MMU_COLDFIRE if MMU 252 select M54xx 253 select HAVE_CACHE_CB 254 select HAVE_MBAR 255 help 256 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 257 258endif # COLDFIRE 259 260 261comment "Processor Specific Options" 262 263config M68KFPU_EMU 264 bool "Math emulation support (EXPERIMENTAL)" 265 depends on MMU 266 depends on EXPERIMENTAL 267 help 268 At some point in the future, this will cause floating-point math 269 instructions to be emulated by the kernel on machines that lack a 270 floating-point math coprocessor. Thrill-seekers and chronically 271 sleep-deprived psychotic hacker types can say Y now, everyone else 272 should probably wait a while. 273 274config M68KFPU_EMU_EXTRAPREC 275 bool "Math emulation extra precision" 276 depends on M68KFPU_EMU 277 help 278 The fpu uses normally a few bit more during calculations for 279 correct rounding, the emulator can (often) do the same but this 280 extra calculation can cost quite some time, so you can disable 281 it here. The emulator will then "only" calculate with a 64 bit 282 mantissa and round slightly incorrect, what is more than enough 283 for normal usage. 284 285config M68KFPU_EMU_ONLY 286 bool "Math emulation only kernel" 287 depends on M68KFPU_EMU 288 help 289 This option prevents any floating-point instructions from being 290 compiled into the kernel, thereby the kernel doesn't save any 291 floating point context anymore during task switches, so this 292 kernel will only be usable on machines without a floating-point 293 math coprocessor. This makes the kernel a bit faster as no tests 294 needs to be executed whether a floating-point instruction in the 295 kernel should be executed or not. 296 297config ADVANCED 298 bool "Advanced configuration options" 299 depends on MMU 300 ---help--- 301 This gives you access to some advanced options for the CPU. The 302 defaults should be fine for most users, but these options may make 303 it possible for you to improve performance somewhat if you know what 304 you are doing. 305 306 Note that the answer to this question won't directly affect the 307 kernel: saying N will just cause the configurator to skip all 308 the questions about these options. 309 310 Most users should say N to this question. 311 312config RMW_INSNS 313 bool "Use read-modify-write instructions" 314 depends on ADVANCED 315 ---help--- 316 This allows to use certain instructions that work with indivisible 317 read-modify-write bus cycles. While this is faster than the 318 workaround of disabling interrupts, it can conflict with DMA 319 ( = direct memory access) on many Amiga systems, and it is also said 320 to destabilize other machines. It is very likely that this will 321 cause serious problems on any Amiga or Atari Medusa if set. The only 322 configuration where it should work are 68030-based Ataris, where it 323 apparently improves performance. But you've been warned! Unless you 324 really know what you are doing, say N. Try Y only if you're quite 325 adventurous. 326 327config SINGLE_MEMORY_CHUNK 328 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 329 depends on MMU 330 default y if SUN3 331 select NEED_MULTIPLE_NODES 332 help 333 Ignore all but the first contiguous chunk of physical memory for VM 334 purposes. This will save a few bytes kernel size and may speed up 335 some operations. Say N if not sure. 336 337config ARCH_DISCONTIGMEM_ENABLE 338 def_bool MMU && !SINGLE_MEMORY_CHUNK 339 340config 060_WRITETHROUGH 341 bool "Use write-through caching for 68060 supervisor accesses" 342 depends on ADVANCED && M68060 343 ---help--- 344 The 68060 generally uses copyback caching of recently accessed data. 345 Copyback caching means that memory writes will be held in an on-chip 346 cache and only written back to memory some time later. Saying Y 347 here will force supervisor (kernel) accesses to use writethrough 348 caching. Writethrough caching means that data is written to memory 349 straight away, so that cache and memory data always agree. 350 Writethrough caching is less efficient, but is needed for some 351 drivers on 68060 based systems where the 68060 bus snooping signal 352 is hardwired on. The 53c710 SCSI driver is known to suffer from 353 this problem. 354 355config M68K_L2_CACHE 356 bool 357 depends on MAC 358 default y 359 360config NODES_SHIFT 361 int 362 default "3" 363 depends on !SINGLE_MEMORY_CHUNK 364 365config CPU_HAS_NO_BITFIELDS 366 bool 367 368config CPU_HAS_NO_MULDIV64 369 bool 370 371config CPU_HAS_NO_UNALIGNED 372 bool 373 374config CPU_HAS_ADDRESS_SPACES 375 bool 376 377config FPU 378 bool 379 380config COLDFIRE_SW_A7 381 bool 382 383config HAVE_CACHE_SPLIT 384 bool 385 386config HAVE_CACHE_CB 387 bool 388 389config HAVE_MBAR 390 bool 391 392config HAVE_IPSBAR 393 bool 394 395config CLOCK_SET 396 bool "Enable setting the CPU clock frequency" 397 depends on COLDFIRE 398 default n 399 help 400 On some CPU's you do not need to know what the core CPU clock 401 frequency is. On these you can disable clock setting. On some 402 traditional 68K parts, and on all ColdFire parts you need to set 403 the appropriate CPU clock frequency. On these devices many of the 404 onboard peripherals derive their timing from the master CPU clock 405 frequency. 406 407config CLOCK_FREQ 408 int "Set the core clock frequency" 409 default "66666666" 410 depends on CLOCK_SET 411 help 412 Define the CPU clock frequency in use. This is the core clock 413 frequency, it may or may not be the same as the external clock 414 crystal fitted to your board. Some processors have an internal 415 PLL and can have their frequency programmed at run time, others 416 use internal dividers. In general the kernel won't setup a PLL 417 if it is fitted (there are some exceptions). This value will be 418 specific to the exact CPU that you are using. 419 420config OLDMASK 421 bool "Old mask 5307 (1H55J) silicon" 422 depends on M5307 423 help 424 Build support for the older revision ColdFire 5307 silicon. 425 Specifically this is the 1H55J mask revision. 426 427if HAVE_CACHE_SPLIT 428choice 429 prompt "Split Cache Configuration" 430 default CACHE_I 431 432config CACHE_I 433 bool "Instruction" 434 help 435 Use all of the ColdFire CPU cache memory as an instruction cache. 436 437config CACHE_D 438 bool "Data" 439 help 440 Use all of the ColdFire CPU cache memory as a data cache. 441 442config CACHE_BOTH 443 bool "Both" 444 help 445 Split the ColdFire CPU cache, and use half as an instruction cache 446 and half as a data cache. 447endchoice 448endif 449 450if HAVE_CACHE_CB 451choice 452 prompt "Data cache mode" 453 default CACHE_WRITETHRU 454 455config CACHE_WRITETHRU 456 bool "Write-through" 457 help 458 The ColdFire CPU cache is set into Write-through mode. 459 460config CACHE_COPYBACK 461 bool "Copy-back" 462 help 463 The ColdFire CPU cache is set into Copy-back mode. 464endchoice 465endif 466 467