1# SPDX-License-Identifier: GPL-2.0 2comment "Processor Type" 3 4choice 5 prompt "CPU family support" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 8 help 9 The Freescale (was Motorola) M68K family of processors implements 10 the full 68000 processor instruction set. 11 The Freescale ColdFire family of processors is a modern derivative 12 of the 68000 processor family. They are mainly targeted at embedded 13 applications, and are all System-On-Chip (SOC) devices, as opposed 14 to stand alone CPUs. They implement a subset of the original 68000 15 processor instruction set. 16 If you anticipate running this kernel on a computer with a classic 17 MC68xxx processor, select M68KCLASSIC. 18 If you anticipate running this kernel on a computer with a ColdFire 19 processor, select COLDFIRE. 20 21config M68KCLASSIC 22 bool "Classic M68K CPU family support" 23 24config COLDFIRE 25 bool "Coldfire CPU family support" 26 select ARCH_HAVE_CUSTOM_GPIO_H 27 select CPU_HAS_NO_BITFIELDS 28 select CPU_HAS_NO_MULDIV64 29 select GENERIC_CSUM 30 select GPIOLIB 31 select HAVE_LEGACY_CLK 32 33endchoice 34 35if M68KCLASSIC 36 37config M68000 38 bool "MC68000" 39 depends on !MMU 40 select CPU_HAS_NO_BITFIELDS 41 select CPU_HAS_NO_MULDIV64 42 select CPU_HAS_NO_UNALIGNED 43 select GENERIC_CSUM 44 select CPU_NO_EFFICIENT_FFS 45 select HAVE_ARCH_HASH 46 help 47 The Freescale (was Motorola) 68000 CPU is the first generation of 48 the well known M68K family of processors. The CPU core as well as 49 being available as a stand alone CPU was also used in many 50 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 51 a paging MMU. 52 53config MCPU32 54 bool 55 select CPU_HAS_NO_BITFIELDS 56 select CPU_HAS_NO_UNALIGNED 57 select CPU_NO_EFFICIENT_FFS 58 help 59 The Freescale (was then Motorola) CPU32 is a CPU core that is 60 based on the 68020 processor. For the most part it is used in 61 System-On-Chip parts, and does not contain a paging MMU. 62 63config M68020 64 bool "68020 support" 65 depends on MMU 66 select FPU 67 select CPU_HAS_ADDRESS_SPACES 68 help 69 If you anticipate running this kernel on a computer with a MC68020 70 processor, say Y. Otherwise, say N. Note that the 68020 requires a 71 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 72 Sun 3, which provides its own version. 73 74config M68030 75 bool "68030 support" 76 depends on MMU && !MMU_SUN3 77 select FPU 78 select CPU_HAS_ADDRESS_SPACES 79 help 80 If you anticipate running this kernel on a computer with a MC68030 81 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 82 work, as it does not include an MMU (Memory Management Unit). 83 84config M68040 85 bool "68040 support" 86 depends on MMU && !MMU_SUN3 87 select FPU 88 select CPU_HAS_ADDRESS_SPACES 89 help 90 If you anticipate running this kernel on a computer with a MC68LC040 91 or MC68040 processor, say Y. Otherwise, say N. Note that an 92 MC68EC040 will not work, as it does not include an MMU (Memory 93 Management Unit). 94 95config M68060 96 bool "68060 support" 97 depends on MMU && !MMU_SUN3 98 select FPU 99 select CPU_HAS_ADDRESS_SPACES 100 help 101 If you anticipate running this kernel on a computer with a MC68060 102 processor, say Y. Otherwise, say N. 103 104config M68328 105 bool "MC68328" 106 depends on !MMU 107 select LEGACY_TIMER_TICK 108 select M68000 109 help 110 Motorola 68328 processor support. 111 112config M68EZ328 113 bool "MC68EZ328" 114 depends on !MMU 115 select LEGACY_TIMER_TICK 116 select M68000 117 help 118 Motorola 68EX328 processor support. 119 120config M68VZ328 121 bool "MC68VZ328" 122 depends on !MMU 123 select LEGACY_TIMER_TICK 124 select M68000 125 help 126 Motorola 68VZ328 processor support. 127 128endif # M68KCLASSIC 129 130if COLDFIRE 131 132choice 133 prompt "ColdFire SoC type" 134 default M520x 135 help 136 Select the type of ColdFire System-on-Chip (SoC) that you want 137 to build for. 138 139config M5206 140 bool "MCF5206" 141 depends on !MMU 142 select COLDFIRE_SW_A7 143 select COLDFIRE_TIMERS 144 select HAVE_MBAR 145 select CPU_NO_EFFICIENT_FFS 146 help 147 Motorola ColdFire 5206 processor support. 148 149config M5206e 150 bool "MCF5206e" 151 depends on !MMU 152 select COLDFIRE_SW_A7 153 select COLDFIRE_TIMERS 154 select HAVE_MBAR 155 select CPU_NO_EFFICIENT_FFS 156 help 157 Motorola ColdFire 5206e processor support. 158 159config M520x 160 bool "MCF520x" 161 depends on !MMU 162 select COLDFIRE_PIT_TIMER 163 select HAVE_CACHE_SPLIT 164 help 165 Freescale Coldfire 5207/5208 processor support. 166 167config M523x 168 bool "MCF523x" 169 depends on !MMU 170 select COLDFIRE_PIT_TIMER 171 select HAVE_CACHE_SPLIT 172 select HAVE_IPSBAR 173 help 174 Freescale Coldfire 5230/1/2/4/5 processor support 175 176config M5249 177 bool "MCF5249" 178 depends on !MMU 179 select COLDFIRE_SW_A7 180 select COLDFIRE_TIMERS 181 select HAVE_MBAR 182 select CPU_NO_EFFICIENT_FFS 183 help 184 Motorola ColdFire 5249 processor support. 185 186config M525x 187 bool "MCF525x" 188 depends on !MMU 189 select COLDFIRE_SW_A7 190 select COLDFIRE_TIMERS 191 select HAVE_MBAR 192 select CPU_NO_EFFICIENT_FFS 193 help 194 Freescale (Motorola) Coldfire 5251/5253 processor support. 195 196config M5271 197 bool "MCF5271" 198 depends on !MMU 199 select COLDFIRE_PIT_TIMER 200 select M527x 201 select HAVE_CACHE_SPLIT 202 select HAVE_IPSBAR 203 help 204 Freescale (Motorola) ColdFire 5270/5271 processor support. 205 206config M5272 207 bool "MCF5272" 208 depends on !MMU 209 select COLDFIRE_SW_A7 210 select COLDFIRE_TIMERS 211 select HAVE_MBAR 212 select CPU_NO_EFFICIENT_FFS 213 help 214 Motorola ColdFire 5272 processor support. 215 216config M5275 217 bool "MCF5275" 218 depends on !MMU 219 select COLDFIRE_PIT_TIMER 220 select M527x 221 select HAVE_CACHE_SPLIT 222 select HAVE_IPSBAR 223 help 224 Freescale (Motorola) ColdFire 5274/5275 processor support. 225 226config M528x 227 bool "MCF528x" 228 depends on !MMU 229 select COLDFIRE_PIT_TIMER 230 select HAVE_CACHE_SPLIT 231 select HAVE_IPSBAR 232 help 233 Motorola ColdFire 5280/5282 processor support. 234 235config M5307 236 bool "MCF5307" 237 depends on !MMU 238 select COLDFIRE_TIMERS 239 select COLDFIRE_SW_A7 240 select HAVE_CACHE_CB 241 select HAVE_MBAR 242 select CPU_NO_EFFICIENT_FFS 243 help 244 Motorola ColdFire 5307 processor support. 245 246config M532x 247 bool "MCF532x" 248 depends on !MMU 249 select COLDFIRE_TIMERS 250 select M53xx 251 select HAVE_CACHE_CB 252 help 253 Freescale (Motorola) ColdFire 532x processor support. 254 255config M537x 256 bool "MCF537x" 257 depends on !MMU 258 select COLDFIRE_TIMERS 259 select M53xx 260 select HAVE_CACHE_CB 261 help 262 Freescale ColdFire 537x processor support. 263 264config M5407 265 bool "MCF5407" 266 depends on !MMU 267 select COLDFIRE_SW_A7 268 select COLDFIRE_TIMERS 269 select HAVE_CACHE_CB 270 select HAVE_MBAR 271 select CPU_NO_EFFICIENT_FFS 272 help 273 Motorola ColdFire 5407 processor support. 274 275config M547x 276 bool "MCF547x" 277 select M54xx 278 select COLDFIRE_SLTIMERS 279 select MMU_COLDFIRE if MMU 280 select FPU if MMU 281 select HAVE_CACHE_CB 282 select HAVE_MBAR 283 select CPU_NO_EFFICIENT_FFS 284 help 285 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 286 287config M548x 288 bool "MCF548x" 289 select COLDFIRE_SLTIMERS 290 select MMU_COLDFIRE if MMU 291 select FPU if MMU 292 select M54xx 293 select HAVE_CACHE_CB 294 select HAVE_MBAR 295 select CPU_NO_EFFICIENT_FFS 296 help 297 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 298 299config M5441x 300 bool "MCF5441x" 301 select COLDFIRE_PIT_TIMER 302 select MMU_COLDFIRE if MMU 303 select HAVE_CACHE_CB 304 help 305 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 306 307endchoice 308 309config M527x 310 bool 311 312config M53xx 313 bool 314 315config M54xx 316 select HAVE_PCI 317 bool 318 319config COLDFIRE_PIT_TIMER 320 bool 321 322config COLDFIRE_TIMERS 323 bool 324 select LEGACY_TIMER_TICK 325 326config COLDFIRE_SLTIMERS 327 bool 328 select LEGACY_TIMER_TICK 329 330endif # COLDFIRE 331 332 333comment "Processor Specific Options" 334 335config M68KFPU_EMU 336 bool "Math emulation support" 337 depends on MMU 338 help 339 At some point in the future, this will cause floating-point math 340 instructions to be emulated by the kernel on machines that lack a 341 floating-point math coprocessor. Thrill-seekers and chronically 342 sleep-deprived psychotic hacker types can say Y now, everyone else 343 should probably wait a while. 344 345config M68KFPU_EMU_EXTRAPREC 346 bool "Math emulation extra precision" 347 depends on M68KFPU_EMU 348 help 349 The fpu uses normally a few bit more during calculations for 350 correct rounding, the emulator can (often) do the same but this 351 extra calculation can cost quite some time, so you can disable 352 it here. The emulator will then "only" calculate with a 64 bit 353 mantissa and round slightly incorrect, what is more than enough 354 for normal usage. 355 356config M68KFPU_EMU_ONLY 357 bool "Math emulation only kernel" 358 depends on M68KFPU_EMU 359 help 360 This option prevents any floating-point instructions from being 361 compiled into the kernel, thereby the kernel doesn't save any 362 floating point context anymore during task switches, so this 363 kernel will only be usable on machines without a floating-point 364 math coprocessor. This makes the kernel a bit faster as no tests 365 needs to be executed whether a floating-point instruction in the 366 kernel should be executed or not. 367 368config ADVANCED 369 bool "Advanced configuration options" 370 depends on MMU 371 help 372 This gives you access to some advanced options for the CPU. The 373 defaults should be fine for most users, but these options may make 374 it possible for you to improve performance somewhat if you know what 375 you are doing. 376 377 Note that the answer to this question won't directly affect the 378 kernel: saying N will just cause the configurator to skip all 379 the questions about these options. 380 381 Most users should say N to this question. 382 383config RMW_INSNS 384 bool "Use read-modify-write instructions" 385 depends on ADVANCED 386 help 387 This allows to use certain instructions that work with indivisible 388 read-modify-write bus cycles. While this is faster than the 389 workaround of disabling interrupts, it can conflict with DMA 390 ( = direct memory access) on many Amiga systems, and it is also said 391 to destabilize other machines. It is very likely that this will 392 cause serious problems on any Amiga or Atari Medusa if set. The only 393 configuration where it should work are 68030-based Ataris, where it 394 apparently improves performance. But you've been warned! Unless you 395 really know what you are doing, say N. Try Y only if you're quite 396 adventurous. 397 398config SINGLE_MEMORY_CHUNK 399 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 400 depends on MMU 401 default y if SUN3 402 select NEED_MULTIPLE_NODES 403 help 404 Ignore all but the first contiguous chunk of physical memory for VM 405 purposes. This will save a few bytes kernel size and may speed up 406 some operations. Say N if not sure. 407 408config ARCH_DISCONTIGMEM_ENABLE 409 def_bool MMU && !SINGLE_MEMORY_CHUNK 410 411config 060_WRITETHROUGH 412 bool "Use write-through caching for 68060 supervisor accesses" 413 depends on ADVANCED && M68060 414 help 415 The 68060 generally uses copyback caching of recently accessed data. 416 Copyback caching means that memory writes will be held in an on-chip 417 cache and only written back to memory some time later. Saying Y 418 here will force supervisor (kernel) accesses to use writethrough 419 caching. Writethrough caching means that data is written to memory 420 straight away, so that cache and memory data always agree. 421 Writethrough caching is less efficient, but is needed for some 422 drivers on 68060 based systems where the 68060 bus snooping signal 423 is hardwired on. The 53c710 SCSI driver is known to suffer from 424 this problem. 425 426config M68K_L2_CACHE 427 bool 428 depends on MAC 429 default y 430 431config NODES_SHIFT 432 int 433 default "3" 434 depends on !SINGLE_MEMORY_CHUNK 435 436config CPU_HAS_NO_BITFIELDS 437 bool 438 439config CPU_HAS_NO_MULDIV64 440 bool 441 442config CPU_HAS_NO_UNALIGNED 443 bool 444 445config CPU_HAS_ADDRESS_SPACES 446 bool 447 448config FPU 449 bool 450 451config COLDFIRE_SW_A7 452 bool 453 454config HAVE_CACHE_SPLIT 455 bool 456 457config HAVE_CACHE_CB 458 bool 459 460config HAVE_MBAR 461 bool 462 463config HAVE_IPSBAR 464 bool 465 466config CLOCK_FREQ 467 int "Set the core clock frequency" 468 default "25000000" if M5206 469 default "54000000" if M5206e 470 default "166666666" if M520x 471 default "140000000" if M5249 472 default "150000000" if M527x || M523x 473 default "90000000" if M5307 474 default "50000000" if M5407 475 default "266000000" if M54xx 476 default "66666666" 477 depends on COLDFIRE 478 help 479 Define the CPU clock frequency in use. This is the core clock 480 frequency, it may or may not be the same as the external clock 481 crystal fitted to your board. Some processors have an internal 482 PLL and can have their frequency programmed at run time, others 483 use internal dividers. In general the kernel won't setup a PLL 484 if it is fitted (there are some exceptions). This value will be 485 specific to the exact CPU that you are using. 486 487config OLDMASK 488 bool "Old mask 5307 (1H55J) silicon" 489 depends on M5307 490 help 491 Build support for the older revision ColdFire 5307 silicon. 492 Specifically this is the 1H55J mask revision. 493 494if HAVE_CACHE_SPLIT 495choice 496 prompt "Split Cache Configuration" 497 default CACHE_I 498 499config CACHE_I 500 bool "Instruction" 501 help 502 Use all of the ColdFire CPU cache memory as an instruction cache. 503 504config CACHE_D 505 bool "Data" 506 help 507 Use all of the ColdFire CPU cache memory as a data cache. 508 509config CACHE_BOTH 510 bool "Both" 511 help 512 Split the ColdFire CPU cache, and use half as an instruction cache 513 and half as a data cache. 514endchoice 515endif 516 517if HAVE_CACHE_CB 518choice 519 prompt "Data cache mode" 520 default CACHE_WRITETHRU 521 522config CACHE_WRITETHRU 523 bool "Write-through" 524 help 525 The ColdFire CPU cache is set into Write-through mode. 526 527config CACHE_COPYBACK 528 bool "Copy-back" 529 help 530 The ColdFire CPU cache is set into Copy-back mode. 531endchoice 532endif 533 534