1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #include <linux/err.h> 7 #include <linux/errno.h> 8 #include <linux/kvm_host.h> 9 #include <linux/module.h> 10 #include <linux/preempt.h> 11 #include <linux/vmalloc.h> 12 #include <trace/events/kvm.h> 13 #include <asm/fpu.h> 14 #include <asm/inst.h> 15 #include <asm/loongarch.h> 16 #include <asm/mmzone.h> 17 #include <asm/numa.h> 18 #include <asm/time.h> 19 #include <asm/tlb.h> 20 #include <asm/kvm_csr.h> 21 #include <asm/kvm_vcpu.h> 22 #include "trace.h" 23 24 static int kvm_emu_cpucfg(struct kvm_vcpu *vcpu, larch_inst inst) 25 { 26 int rd, rj; 27 unsigned int index, ret; 28 29 if (inst.reg2_format.opcode != cpucfg_op) 30 return EMULATE_FAIL; 31 32 rd = inst.reg2_format.rd; 33 rj = inst.reg2_format.rj; 34 ++vcpu->stat.cpucfg_exits; 35 index = vcpu->arch.gprs[rj]; 36 37 /* 38 * By LoongArch Reference Manual 2.2.10.5 39 * Return value is 0 for undefined CPUCFG index 40 * 41 * Disable preemption since hw gcsr is accessed 42 */ 43 preempt_disable(); 44 switch (index) { 45 case 0 ... (KVM_MAX_CPUCFG_REGS - 1): 46 vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index]; 47 break; 48 case CPUCFG_KVM_SIG: 49 /* CPUCFG emulation between 0x40000000 -- 0x400000ff */ 50 vcpu->arch.gprs[rd] = *(unsigned int *)KVM_SIGNATURE; 51 break; 52 case CPUCFG_KVM_FEATURE: 53 ret = vcpu->kvm->arch.pv_features & LOONGARCH_PV_FEAT_MASK; 54 vcpu->arch.gprs[rd] = ret; 55 break; 56 default: 57 vcpu->arch.gprs[rd] = 0; 58 break; 59 } 60 preempt_enable(); 61 62 return EMULATE_DONE; 63 } 64 65 static unsigned long kvm_emu_read_csr(struct kvm_vcpu *vcpu, int csrid) 66 { 67 unsigned long val = 0; 68 struct loongarch_csrs *csr = vcpu->arch.csr; 69 70 /* 71 * From LoongArch Reference Manual Volume 1 Chapter 4.2.1 72 * For undefined CSR id, return value is 0 73 */ 74 if (get_gcsr_flag(csrid) & SW_GCSR) 75 val = kvm_read_sw_gcsr(csr, csrid); 76 else 77 pr_warn_once("Unsupported csrrd 0x%x with pc %lx\n", csrid, vcpu->arch.pc); 78 79 return val; 80 } 81 82 static unsigned long kvm_emu_write_csr(struct kvm_vcpu *vcpu, int csrid, unsigned long val) 83 { 84 unsigned long old = 0; 85 struct loongarch_csrs *csr = vcpu->arch.csr; 86 87 if (get_gcsr_flag(csrid) & SW_GCSR) { 88 old = kvm_read_sw_gcsr(csr, csrid); 89 kvm_write_sw_gcsr(csr, csrid, val); 90 } else 91 pr_warn_once("Unsupported csrwr 0x%x with pc %lx\n", csrid, vcpu->arch.pc); 92 93 return old; 94 } 95 96 static unsigned long kvm_emu_xchg_csr(struct kvm_vcpu *vcpu, int csrid, 97 unsigned long csr_mask, unsigned long val) 98 { 99 unsigned long old = 0; 100 struct loongarch_csrs *csr = vcpu->arch.csr; 101 102 if (get_gcsr_flag(csrid) & SW_GCSR) { 103 old = kvm_read_sw_gcsr(csr, csrid); 104 val = (old & ~csr_mask) | (val & csr_mask); 105 kvm_write_sw_gcsr(csr, csrid, val); 106 } else 107 pr_warn_once("Unsupported csrxchg 0x%x with pc %lx\n", csrid, vcpu->arch.pc); 108 109 return old; 110 } 111 112 static int kvm_handle_csr(struct kvm_vcpu *vcpu, larch_inst inst) 113 { 114 unsigned int rd, rj, csrid; 115 unsigned long csr_mask, val = 0; 116 117 /* 118 * CSR value mask imm 119 * rj = 0 means csrrd 120 * rj = 1 means csrwr 121 * rj != 0,1 means csrxchg 122 */ 123 rd = inst.reg2csr_format.rd; 124 rj = inst.reg2csr_format.rj; 125 csrid = inst.reg2csr_format.csr; 126 127 if (csrid >= LOONGARCH_CSR_PERFCTRL0 && csrid <= vcpu->arch.max_pmu_csrid) { 128 if (kvm_guest_has_pmu(&vcpu->arch)) { 129 vcpu->arch.pc -= 4; 130 kvm_make_request(KVM_REQ_PMU, vcpu); 131 return EMULATE_DONE; 132 } 133 } 134 135 /* Process CSR ops */ 136 switch (rj) { 137 case 0: /* process csrrd */ 138 val = kvm_emu_read_csr(vcpu, csrid); 139 vcpu->arch.gprs[rd] = val; 140 break; 141 case 1: /* process csrwr */ 142 val = vcpu->arch.gprs[rd]; 143 val = kvm_emu_write_csr(vcpu, csrid, val); 144 vcpu->arch.gprs[rd] = val; 145 break; 146 default: /* process csrxchg */ 147 val = vcpu->arch.gprs[rd]; 148 csr_mask = vcpu->arch.gprs[rj]; 149 val = kvm_emu_xchg_csr(vcpu, csrid, csr_mask, val); 150 vcpu->arch.gprs[rd] = val; 151 } 152 153 return EMULATE_DONE; 154 } 155 156 int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) 157 { 158 int idx, ret; 159 unsigned long *val; 160 u32 addr, rd, rj, opcode; 161 162 /* 163 * Each IOCSR with different opcode 164 */ 165 rd = inst.reg2_format.rd; 166 rj = inst.reg2_format.rj; 167 opcode = inst.reg2_format.opcode; 168 addr = vcpu->arch.gprs[rj]; 169 run->iocsr_io.phys_addr = addr; 170 run->iocsr_io.is_write = 0; 171 val = &vcpu->arch.gprs[rd]; 172 173 /* LoongArch is Little endian */ 174 switch (opcode) { 175 case iocsrrdb_op: 176 run->iocsr_io.len = 1; 177 break; 178 case iocsrrdh_op: 179 run->iocsr_io.len = 2; 180 break; 181 case iocsrrdw_op: 182 run->iocsr_io.len = 4; 183 break; 184 case iocsrrdd_op: 185 run->iocsr_io.len = 8; 186 break; 187 case iocsrwrb_op: 188 run->iocsr_io.len = 1; 189 run->iocsr_io.is_write = 1; 190 break; 191 case iocsrwrh_op: 192 run->iocsr_io.len = 2; 193 run->iocsr_io.is_write = 1; 194 break; 195 case iocsrwrw_op: 196 run->iocsr_io.len = 4; 197 run->iocsr_io.is_write = 1; 198 break; 199 case iocsrwrd_op: 200 run->iocsr_io.len = 8; 201 run->iocsr_io.is_write = 1; 202 break; 203 default: 204 return EMULATE_FAIL; 205 } 206 207 if (run->iocsr_io.is_write) { 208 idx = srcu_read_lock(&vcpu->kvm->srcu); 209 ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val); 210 srcu_read_unlock(&vcpu->kvm->srcu, idx); 211 if (ret == 0) 212 ret = EMULATE_DONE; 213 else { 214 ret = EMULATE_DO_IOCSR; 215 /* Save data and let user space to write it */ 216 memcpy(run->iocsr_io.data, val, run->iocsr_io.len); 217 } 218 trace_kvm_iocsr(KVM_TRACE_IOCSR_WRITE, run->iocsr_io.len, addr, val); 219 } else { 220 vcpu->arch.io_gpr = rd; /* Set register id for iocsr read completion */ 221 idx = srcu_read_lock(&vcpu->kvm->srcu); 222 ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, 223 run->iocsr_io.len, run->iocsr_io.data); 224 srcu_read_unlock(&vcpu->kvm->srcu, idx); 225 if (ret == 0) { 226 kvm_complete_iocsr_read(vcpu, run); 227 ret = EMULATE_DONE; 228 } else 229 ret = EMULATE_DO_IOCSR; 230 trace_kvm_iocsr(KVM_TRACE_IOCSR_READ, run->iocsr_io.len, addr, NULL); 231 } 232 233 return ret; 234 } 235 236 int kvm_complete_iocsr_read(struct kvm_vcpu *vcpu, struct kvm_run *run) 237 { 238 enum emulation_result er = EMULATE_DONE; 239 unsigned long *gpr = &vcpu->arch.gprs[vcpu->arch.io_gpr]; 240 241 switch (run->iocsr_io.len) { 242 case 1: 243 *gpr = *(s8 *)run->iocsr_io.data; 244 break; 245 case 2: 246 *gpr = *(s16 *)run->iocsr_io.data; 247 break; 248 case 4: 249 *gpr = *(s32 *)run->iocsr_io.data; 250 break; 251 case 8: 252 *gpr = *(s64 *)run->iocsr_io.data; 253 break; 254 default: 255 kvm_err("Bad IOCSR length: %d, addr is 0x%lx\n", 256 run->iocsr_io.len, vcpu->arch.badv); 257 er = EMULATE_FAIL; 258 break; 259 } 260 261 return er; 262 } 263 264 int kvm_emu_idle(struct kvm_vcpu *vcpu) 265 { 266 ++vcpu->stat.idle_exits; 267 trace_kvm_exit_idle(vcpu, KVM_TRACE_EXIT_IDLE); 268 269 if (!kvm_arch_vcpu_runnable(vcpu)) 270 kvm_vcpu_halt(vcpu); 271 272 return EMULATE_DONE; 273 } 274 275 static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu) 276 { 277 unsigned long curr_pc; 278 larch_inst inst; 279 enum emulation_result er = EMULATE_DONE; 280 struct kvm_run *run = vcpu->run; 281 282 /* Fetch the instruction */ 283 inst.word = vcpu->arch.badi; 284 curr_pc = vcpu->arch.pc; 285 update_pc(&vcpu->arch); 286 287 trace_kvm_exit_gspr(vcpu, inst.word); 288 er = EMULATE_FAIL; 289 switch (((inst.word >> 24) & 0xff)) { 290 case 0x0: /* CPUCFG GSPR */ 291 trace_kvm_exit_cpucfg(vcpu, KVM_TRACE_EXIT_CPUCFG); 292 er = kvm_emu_cpucfg(vcpu, inst); 293 break; 294 case 0x4: /* CSR{RD,WR,XCHG} GSPR */ 295 trace_kvm_exit_csr(vcpu, KVM_TRACE_EXIT_CSR); 296 er = kvm_handle_csr(vcpu, inst); 297 break; 298 case 0x6: /* Cache, Idle and IOCSR GSPR */ 299 switch (((inst.word >> 22) & 0x3ff)) { 300 case 0x18: /* Cache GSPR */ 301 er = EMULATE_DONE; 302 trace_kvm_exit_cache(vcpu, KVM_TRACE_EXIT_CACHE); 303 break; 304 case 0x19: /* Idle/IOCSR GSPR */ 305 switch (((inst.word >> 15) & 0x1ffff)) { 306 case 0xc90: /* IOCSR GSPR */ 307 er = kvm_emu_iocsr(inst, run, vcpu); 308 break; 309 case 0xc91: /* Idle GSPR */ 310 er = kvm_emu_idle(vcpu); 311 break; 312 default: 313 er = EMULATE_FAIL; 314 break; 315 } 316 break; 317 default: 318 er = EMULATE_FAIL; 319 break; 320 } 321 break; 322 default: 323 er = EMULATE_FAIL; 324 break; 325 } 326 327 /* Rollback PC only if emulation was unsuccessful */ 328 if (er == EMULATE_FAIL) { 329 kvm_err("[%#lx]%s: unsupported gspr instruction 0x%08x\n", 330 curr_pc, __func__, inst.word); 331 332 kvm_arch_vcpu_dump_regs(vcpu); 333 vcpu->arch.pc = curr_pc; 334 } 335 336 return er; 337 } 338 339 /* 340 * Trigger GSPR: 341 * 1) Execute CPUCFG instruction; 342 * 2) Execute CACOP/IDLE instructions; 343 * 3) Access to unimplemented CSRs/IOCSRs. 344 */ 345 static int kvm_handle_gspr(struct kvm_vcpu *vcpu, int ecode) 346 { 347 int ret = RESUME_GUEST; 348 enum emulation_result er = EMULATE_DONE; 349 350 er = kvm_trap_handle_gspr(vcpu); 351 352 if (er == EMULATE_DONE) { 353 ret = RESUME_GUEST; 354 } else if (er == EMULATE_DO_MMIO) { 355 vcpu->run->exit_reason = KVM_EXIT_MMIO; 356 ret = RESUME_HOST; 357 } else if (er == EMULATE_DO_IOCSR) { 358 vcpu->run->exit_reason = KVM_EXIT_LOONGARCH_IOCSR; 359 ret = RESUME_HOST; 360 } else { 361 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 362 ret = RESUME_GUEST; 363 } 364 365 return ret; 366 } 367 368 int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst) 369 { 370 int idx, ret; 371 unsigned int op8, opcode, rd; 372 struct kvm_run *run = vcpu->run; 373 374 run->mmio.phys_addr = vcpu->arch.badv; 375 vcpu->mmio_needed = 2; /* signed */ 376 op8 = (inst.word >> 24) & 0xff; 377 ret = EMULATE_DO_MMIO; 378 379 switch (op8) { 380 case 0x24 ... 0x27: /* ldptr.w/d process */ 381 rd = inst.reg2i14_format.rd; 382 opcode = inst.reg2i14_format.opcode; 383 384 switch (opcode) { 385 case ldptrw_op: 386 run->mmio.len = 4; 387 break; 388 case ldptrd_op: 389 run->mmio.len = 8; 390 break; 391 default: 392 ret = EMULATE_FAIL; 393 break; 394 } 395 break; 396 case 0x28 ... 0x2e: /* ld.b/h/w/d, ld.bu/hu/wu process */ 397 rd = inst.reg2i12_format.rd; 398 opcode = inst.reg2i12_format.opcode; 399 400 switch (opcode) { 401 case ldb_op: 402 run->mmio.len = 1; 403 break; 404 case ldbu_op: 405 vcpu->mmio_needed = 1; /* unsigned */ 406 run->mmio.len = 1; 407 break; 408 case ldh_op: 409 run->mmio.len = 2; 410 break; 411 case ldhu_op: 412 vcpu->mmio_needed = 1; /* unsigned */ 413 run->mmio.len = 2; 414 break; 415 case ldw_op: 416 run->mmio.len = 4; 417 break; 418 case ldwu_op: 419 vcpu->mmio_needed = 1; /* unsigned */ 420 run->mmio.len = 4; 421 break; 422 case ldd_op: 423 run->mmio.len = 8; 424 break; 425 default: 426 ret = EMULATE_FAIL; 427 break; 428 } 429 break; 430 case 0x38: /* ldx.b/h/w/d, ldx.bu/hu/wu process */ 431 rd = inst.reg3_format.rd; 432 opcode = inst.reg3_format.opcode; 433 434 switch (opcode) { 435 case ldxb_op: 436 run->mmio.len = 1; 437 break; 438 case ldxbu_op: 439 run->mmio.len = 1; 440 vcpu->mmio_needed = 1; /* unsigned */ 441 break; 442 case ldxh_op: 443 run->mmio.len = 2; 444 break; 445 case ldxhu_op: 446 run->mmio.len = 2; 447 vcpu->mmio_needed = 1; /* unsigned */ 448 break; 449 case ldxw_op: 450 run->mmio.len = 4; 451 break; 452 case ldxwu_op: 453 run->mmio.len = 4; 454 vcpu->mmio_needed = 1; /* unsigned */ 455 break; 456 case ldxd_op: 457 run->mmio.len = 8; 458 break; 459 default: 460 ret = EMULATE_FAIL; 461 break; 462 } 463 break; 464 default: 465 ret = EMULATE_FAIL; 466 } 467 468 if (ret == EMULATE_DO_MMIO) { 469 trace_kvm_mmio(KVM_TRACE_MMIO_READ, run->mmio.len, run->mmio.phys_addr, NULL); 470 471 vcpu->arch.io_gpr = rd; /* Set for kvm_complete_mmio_read() use */ 472 473 /* 474 * If mmio device such as PCH-PIC is emulated in KVM, 475 * it need not return to user space to handle the mmio 476 * exception. 477 */ 478 idx = srcu_read_lock(&vcpu->kvm->srcu); 479 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, 480 run->mmio.len, run->mmio.data); 481 srcu_read_unlock(&vcpu->kvm->srcu, idx); 482 if (!ret) { 483 kvm_complete_mmio_read(vcpu, run); 484 update_pc(&vcpu->arch); 485 vcpu->mmio_needed = 0; 486 return EMULATE_DONE; 487 } 488 489 run->mmio.is_write = 0; 490 vcpu->mmio_is_write = 0; 491 return EMULATE_DO_MMIO; 492 } 493 494 kvm_err("Read not supported Inst=0x%08x @%lx BadVaddr:%#lx\n", 495 inst.word, vcpu->arch.pc, vcpu->arch.badv); 496 kvm_arch_vcpu_dump_regs(vcpu); 497 vcpu->mmio_needed = 0; 498 499 return ret; 500 } 501 502 int kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run) 503 { 504 enum emulation_result er = EMULATE_DONE; 505 unsigned long *gpr = &vcpu->arch.gprs[vcpu->arch.io_gpr]; 506 507 /* Update with new PC */ 508 update_pc(&vcpu->arch); 509 switch (run->mmio.len) { 510 case 1: 511 if (vcpu->mmio_needed == 2) 512 *gpr = *(s8 *)run->mmio.data; 513 else 514 *gpr = *(u8 *)run->mmio.data; 515 break; 516 case 2: 517 if (vcpu->mmio_needed == 2) 518 *gpr = *(s16 *)run->mmio.data; 519 else 520 *gpr = *(u16 *)run->mmio.data; 521 break; 522 case 4: 523 if (vcpu->mmio_needed == 2) 524 *gpr = *(s32 *)run->mmio.data; 525 else 526 *gpr = *(u32 *)run->mmio.data; 527 break; 528 case 8: 529 *gpr = *(s64 *)run->mmio.data; 530 break; 531 default: 532 kvm_err("Bad MMIO length: %d, addr is 0x%lx\n", 533 run->mmio.len, vcpu->arch.badv); 534 er = EMULATE_FAIL; 535 break; 536 } 537 538 trace_kvm_mmio(KVM_TRACE_MMIO_READ, run->mmio.len, 539 run->mmio.phys_addr, run->mmio.data); 540 541 return er; 542 } 543 544 int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst) 545 { 546 int idx, ret; 547 unsigned int rd, op8, opcode; 548 unsigned long curr_pc, rd_val = 0; 549 struct kvm_run *run = vcpu->run; 550 void *data = run->mmio.data; 551 552 /* 553 * Update PC and hold onto current PC in case there is 554 * an error and we want to rollback the PC 555 */ 556 curr_pc = vcpu->arch.pc; 557 update_pc(&vcpu->arch); 558 559 op8 = (inst.word >> 24) & 0xff; 560 run->mmio.phys_addr = vcpu->arch.badv; 561 ret = EMULATE_DO_MMIO; 562 switch (op8) { 563 case 0x24 ... 0x27: /* stptr.w/d process */ 564 rd = inst.reg2i14_format.rd; 565 opcode = inst.reg2i14_format.opcode; 566 567 switch (opcode) { 568 case stptrw_op: 569 run->mmio.len = 4; 570 *(unsigned int *)data = vcpu->arch.gprs[rd]; 571 break; 572 case stptrd_op: 573 run->mmio.len = 8; 574 *(unsigned long *)data = vcpu->arch.gprs[rd]; 575 break; 576 default: 577 ret = EMULATE_FAIL; 578 break; 579 } 580 break; 581 case 0x28 ... 0x2e: /* st.b/h/w/d process */ 582 rd = inst.reg2i12_format.rd; 583 opcode = inst.reg2i12_format.opcode; 584 rd_val = vcpu->arch.gprs[rd]; 585 586 switch (opcode) { 587 case stb_op: 588 run->mmio.len = 1; 589 *(unsigned char *)data = rd_val; 590 break; 591 case sth_op: 592 run->mmio.len = 2; 593 *(unsigned short *)data = rd_val; 594 break; 595 case stw_op: 596 run->mmio.len = 4; 597 *(unsigned int *)data = rd_val; 598 break; 599 case std_op: 600 run->mmio.len = 8; 601 *(unsigned long *)data = rd_val; 602 break; 603 default: 604 ret = EMULATE_FAIL; 605 break; 606 } 607 break; 608 case 0x38: /* stx.b/h/w/d process */ 609 rd = inst.reg3_format.rd; 610 opcode = inst.reg3_format.opcode; 611 612 switch (opcode) { 613 case stxb_op: 614 run->mmio.len = 1; 615 *(unsigned char *)data = vcpu->arch.gprs[rd]; 616 break; 617 case stxh_op: 618 run->mmio.len = 2; 619 *(unsigned short *)data = vcpu->arch.gprs[rd]; 620 break; 621 case stxw_op: 622 run->mmio.len = 4; 623 *(unsigned int *)data = vcpu->arch.gprs[rd]; 624 break; 625 case stxd_op: 626 run->mmio.len = 8; 627 *(unsigned long *)data = vcpu->arch.gprs[rd]; 628 break; 629 default: 630 ret = EMULATE_FAIL; 631 break; 632 } 633 break; 634 default: 635 ret = EMULATE_FAIL; 636 } 637 638 if (ret == EMULATE_DO_MMIO) { 639 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, run->mmio.len, run->mmio.phys_addr, data); 640 641 /* 642 * If mmio device such as PCH-PIC is emulated in KVM, 643 * it need not return to user space to handle the mmio 644 * exception. 645 */ 646 idx = srcu_read_lock(&vcpu->kvm->srcu); 647 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, run->mmio.len, data); 648 srcu_read_unlock(&vcpu->kvm->srcu, idx); 649 if (!ret) 650 return EMULATE_DONE; 651 652 run->mmio.is_write = 1; 653 vcpu->mmio_needed = 1; 654 vcpu->mmio_is_write = 1; 655 return EMULATE_DO_MMIO; 656 } 657 658 vcpu->arch.pc = curr_pc; 659 kvm_err("Write not supported Inst=0x%08x @%lx BadVaddr:%#lx\n", 660 inst.word, vcpu->arch.pc, vcpu->arch.badv); 661 kvm_arch_vcpu_dump_regs(vcpu); 662 /* Rollback PC if emulation was unsuccessful */ 663 664 return ret; 665 } 666 667 static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write, int ecode) 668 { 669 int ret; 670 larch_inst inst; 671 enum emulation_result er = EMULATE_DONE; 672 struct kvm_run *run = vcpu->run; 673 unsigned long badv = vcpu->arch.badv; 674 675 /* Inject ADE exception if exceed max GPA size */ 676 if (unlikely(badv >= vcpu->kvm->arch.gpa_size)) { 677 kvm_queue_exception(vcpu, EXCCODE_ADE, EXSUBCODE_ADEM); 678 return RESUME_GUEST; 679 } 680 681 ret = kvm_handle_mm_fault(vcpu, badv, write, ecode); 682 if (ret) { 683 /* Treat as MMIO */ 684 inst.word = vcpu->arch.badi; 685 if (write) { 686 er = kvm_emu_mmio_write(vcpu, inst); 687 } else { 688 /* A code fetch fault doesn't count as an MMIO */ 689 if (kvm_is_ifetch_fault(&vcpu->arch)) { 690 kvm_queue_exception(vcpu, EXCCODE_ADE, EXSUBCODE_ADEF); 691 return RESUME_GUEST; 692 } 693 694 er = kvm_emu_mmio_read(vcpu, inst); 695 } 696 } 697 698 if (er == EMULATE_DONE) { 699 ret = RESUME_GUEST; 700 } else if (er == EMULATE_DO_MMIO) { 701 run->exit_reason = KVM_EXIT_MMIO; 702 ret = RESUME_HOST; 703 } else { 704 kvm_queue_exception(vcpu, EXCCODE_ADE, EXSUBCODE_ADEM); 705 ret = RESUME_GUEST; 706 } 707 708 return ret; 709 } 710 711 static int kvm_handle_read_fault(struct kvm_vcpu *vcpu, int ecode) 712 { 713 return kvm_handle_rdwr_fault(vcpu, false, ecode); 714 } 715 716 static int kvm_handle_write_fault(struct kvm_vcpu *vcpu, int ecode) 717 { 718 return kvm_handle_rdwr_fault(vcpu, true, ecode); 719 } 720 721 int kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run) 722 { 723 update_pc(&vcpu->arch); 724 kvm_write_reg(vcpu, LOONGARCH_GPR_A0, run->hypercall.ret); 725 726 return 0; 727 } 728 729 /** 730 * kvm_handle_fpu_disabled() - Guest used fpu however it is disabled at host 731 * @vcpu: Virtual CPU context. 732 * @ecode: Exception code. 733 * 734 * Handle when the guest attempts to use fpu which hasn't been allowed 735 * by the root context. 736 */ 737 static int kvm_handle_fpu_disabled(struct kvm_vcpu *vcpu, int ecode) 738 { 739 struct kvm_run *run = vcpu->run; 740 741 if (!kvm_guest_has_fpu(&vcpu->arch)) { 742 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 743 return RESUME_GUEST; 744 } 745 746 /* 747 * If guest FPU not present, the FPU operation should have been 748 * treated as a reserved instruction! 749 * If FPU already in use, we shouldn't get this at all. 750 */ 751 if (WARN_ON(vcpu->arch.aux_inuse & KVM_LARCH_FPU)) { 752 kvm_err("%s internal error\n", __func__); 753 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 754 return RESUME_HOST; 755 } 756 757 kvm_make_request(KVM_REQ_FPU_LOAD, vcpu); 758 759 return RESUME_GUEST; 760 } 761 762 static long kvm_save_notify(struct kvm_vcpu *vcpu) 763 { 764 unsigned long id, data; 765 766 id = kvm_read_reg(vcpu, LOONGARCH_GPR_A1); 767 data = kvm_read_reg(vcpu, LOONGARCH_GPR_A2); 768 switch (id) { 769 case BIT(KVM_FEATURE_STEAL_TIME): 770 if (data & ~(KVM_STEAL_PHYS_MASK | KVM_STEAL_PHYS_VALID)) 771 return KVM_HCALL_INVALID_PARAMETER; 772 773 vcpu->arch.st.guest_addr = data; 774 if (!(data & KVM_STEAL_PHYS_VALID)) 775 return 0; 776 777 vcpu->arch.st.last_steal = current->sched_info.run_delay; 778 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu); 779 return 0; 780 default: 781 return KVM_HCALL_INVALID_CODE; 782 } 783 } 784 785 /* 786 * kvm_handle_lsx_disabled() - Guest used LSX while disabled in root. 787 * @vcpu: Virtual CPU context. 788 * @ecode: Exception code. 789 * 790 * Handle when the guest attempts to use LSX when it is disabled in the root 791 * context. 792 */ 793 static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu, int ecode) 794 { 795 if (!kvm_guest_has_lsx(&vcpu->arch)) 796 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 797 else 798 kvm_make_request(KVM_REQ_FPU_LOAD, vcpu); 799 800 return RESUME_GUEST; 801 } 802 803 /* 804 * kvm_handle_lasx_disabled() - Guest used LASX while disabled in root. 805 * @vcpu: Virtual CPU context. 806 * @ecode: Exception code. 807 * 808 * Handle when the guest attempts to use LASX when it is disabled in the root 809 * context. 810 */ 811 static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu, int ecode) 812 { 813 if (!kvm_guest_has_lasx(&vcpu->arch)) 814 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 815 else 816 kvm_make_request(KVM_REQ_FPU_LOAD, vcpu); 817 818 return RESUME_GUEST; 819 } 820 821 static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu, int ecode) 822 { 823 if (!kvm_guest_has_lbt(&vcpu->arch)) 824 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 825 else 826 kvm_make_request(KVM_REQ_LBT_LOAD, vcpu); 827 828 return RESUME_GUEST; 829 } 830 831 static void kvm_send_pv_ipi(struct kvm_vcpu *vcpu) 832 { 833 unsigned int min, cpu; 834 struct kvm_vcpu *dest; 835 DECLARE_BITMAP(ipi_bitmap, BITS_PER_LONG * 2) = { 836 kvm_read_reg(vcpu, LOONGARCH_GPR_A1), 837 kvm_read_reg(vcpu, LOONGARCH_GPR_A2) 838 }; 839 840 min = kvm_read_reg(vcpu, LOONGARCH_GPR_A3); 841 for_each_set_bit(cpu, ipi_bitmap, BITS_PER_LONG * 2) { 842 dest = kvm_get_vcpu_by_cpuid(vcpu->kvm, cpu + min); 843 if (!dest) 844 continue; 845 846 /* Send SWI0 to dest vcpu to emulate IPI interrupt */ 847 kvm_queue_irq(dest, INT_SWI0); 848 kvm_vcpu_kick(dest); 849 } 850 } 851 852 /* 853 * Hypercall emulation always return to guest, Caller should check retval. 854 */ 855 static void kvm_handle_service(struct kvm_vcpu *vcpu) 856 { 857 long ret = KVM_HCALL_INVALID_CODE; 858 unsigned long func = kvm_read_reg(vcpu, LOONGARCH_GPR_A0); 859 860 switch (func) { 861 case KVM_HCALL_FUNC_IPI: 862 if (kvm_guest_has_pv_feature(vcpu, KVM_FEATURE_IPI)) { 863 kvm_send_pv_ipi(vcpu); 864 ret = KVM_HCALL_SUCCESS; 865 } 866 break; 867 case KVM_HCALL_FUNC_NOTIFY: 868 if (kvm_guest_has_pv_feature(vcpu, KVM_FEATURE_STEAL_TIME)) 869 ret = kvm_save_notify(vcpu); 870 break; 871 default: 872 break; 873 } 874 875 kvm_write_reg(vcpu, LOONGARCH_GPR_A0, ret); 876 } 877 878 static int kvm_handle_hypercall(struct kvm_vcpu *vcpu, int ecode) 879 { 880 int ret; 881 larch_inst inst; 882 unsigned int code; 883 884 inst.word = vcpu->arch.badi; 885 code = inst.reg0i15_format.immediate; 886 ret = RESUME_GUEST; 887 888 switch (code) { 889 case KVM_HCALL_SERVICE: 890 vcpu->stat.hypercall_exits++; 891 kvm_handle_service(vcpu); 892 break; 893 case KVM_HCALL_USER_SERVICE: 894 if (!kvm_guest_has_pv_feature(vcpu, KVM_FEATURE_USER_HCALL)) { 895 kvm_write_reg(vcpu, LOONGARCH_GPR_A0, KVM_HCALL_INVALID_CODE); 896 break; 897 } 898 899 vcpu->stat.hypercall_exits++; 900 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL; 901 vcpu->run->hypercall.nr = KVM_HCALL_USER_SERVICE; 902 vcpu->run->hypercall.args[0] = kvm_read_reg(vcpu, LOONGARCH_GPR_A0); 903 vcpu->run->hypercall.args[1] = kvm_read_reg(vcpu, LOONGARCH_GPR_A1); 904 vcpu->run->hypercall.args[2] = kvm_read_reg(vcpu, LOONGARCH_GPR_A2); 905 vcpu->run->hypercall.args[3] = kvm_read_reg(vcpu, LOONGARCH_GPR_A3); 906 vcpu->run->hypercall.args[4] = kvm_read_reg(vcpu, LOONGARCH_GPR_A4); 907 vcpu->run->hypercall.args[5] = kvm_read_reg(vcpu, LOONGARCH_GPR_A5); 908 vcpu->run->hypercall.flags = 0; 909 /* 910 * Set invalid return value by default, let user-mode VMM modify it. 911 */ 912 vcpu->run->hypercall.ret = KVM_HCALL_INVALID_CODE; 913 ret = RESUME_HOST; 914 break; 915 case KVM_HCALL_SWDBG: 916 /* KVM_HCALL_SWDBG only in effective when SW_BP is enabled */ 917 if (vcpu->guest_debug & KVM_GUESTDBG_SW_BP_MASK) { 918 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 919 ret = RESUME_HOST; 920 break; 921 } 922 fallthrough; 923 default: 924 /* Treat it as noop intruction, only set return value */ 925 kvm_write_reg(vcpu, LOONGARCH_GPR_A0, KVM_HCALL_INVALID_CODE); 926 break; 927 } 928 929 if (ret == RESUME_GUEST) 930 update_pc(&vcpu->arch); 931 932 return ret; 933 } 934 935 /* 936 * LoongArch KVM callback handling for unimplemented guest exiting 937 */ 938 static int kvm_fault_ni(struct kvm_vcpu *vcpu, int ecode) 939 { 940 unsigned int inst; 941 unsigned long badv; 942 943 /* Fetch the instruction */ 944 inst = vcpu->arch.badi; 945 badv = vcpu->arch.badv; 946 kvm_err("ECode: %d PC=%#lx Inst=0x%08x BadVaddr=%#lx ESTAT=%#lx\n", 947 ecode, vcpu->arch.pc, inst, badv, read_gcsr_estat()); 948 kvm_arch_vcpu_dump_regs(vcpu); 949 kvm_queue_exception(vcpu, EXCCODE_INE, 0); 950 951 return RESUME_GUEST; 952 } 953 954 static exit_handle_fn kvm_fault_tables[EXCCODE_INT_START] = { 955 [0 ... EXCCODE_INT_START - 1] = kvm_fault_ni, 956 [EXCCODE_TLBI] = kvm_handle_read_fault, 957 [EXCCODE_TLBL] = kvm_handle_read_fault, 958 [EXCCODE_TLBS] = kvm_handle_write_fault, 959 [EXCCODE_TLBM] = kvm_handle_write_fault, 960 [EXCCODE_FPDIS] = kvm_handle_fpu_disabled, 961 [EXCCODE_LSXDIS] = kvm_handle_lsx_disabled, 962 [EXCCODE_LASXDIS] = kvm_handle_lasx_disabled, 963 [EXCCODE_BTDIS] = kvm_handle_lbt_disabled, 964 [EXCCODE_GSPR] = kvm_handle_gspr, 965 [EXCCODE_HVC] = kvm_handle_hypercall, 966 }; 967 968 int kvm_handle_fault(struct kvm_vcpu *vcpu, int fault) 969 { 970 return kvm_fault_tables[fault](vcpu, fault); 971 } 972