1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Common time service routines for LoongArch machines. 4 * 5 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 6 */ 7 #include <linux/clockchips.h> 8 #include <linux/cpuhotplug.h> 9 #include <linux/delay.h> 10 #include <linux/export.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/sched_clock.h> 15 #include <linux/spinlock.h> 16 17 #include <asm/cpu-features.h> 18 #include <asm/loongarch.h> 19 #include <asm/paravirt.h> 20 #include <asm/time.h> 21 22 u64 cpu_clock_freq; 23 EXPORT_SYMBOL(cpu_clock_freq); 24 u64 const_clock_freq; 25 EXPORT_SYMBOL(const_clock_freq); 26 27 static DEFINE_RAW_SPINLOCK(state_lock); 28 static DEFINE_PER_CPU(struct clock_event_device, constant_clockevent_device); 29 30 static void constant_event_handler(struct clock_event_device *dev) 31 { 32 } 33 34 static irqreturn_t constant_timer_interrupt(int irq, void *data) 35 { 36 int cpu = smp_processor_id(); 37 struct clock_event_device *cd; 38 39 /* Clear Timer Interrupt */ 40 write_csr_tintclear(CSR_TINTCLR_TI); 41 cd = &per_cpu(constant_clockevent_device, cpu); 42 cd->event_handler(cd); 43 44 return IRQ_HANDLED; 45 } 46 47 static int constant_set_state_oneshot(struct clock_event_device *evt) 48 { 49 unsigned long timer_config; 50 51 raw_spin_lock(&state_lock); 52 53 timer_config = csr_read64(LOONGARCH_CSR_TCFG); 54 timer_config |= CSR_TCFG_EN; 55 timer_config &= ~CSR_TCFG_PERIOD; 56 csr_write64(timer_config, LOONGARCH_CSR_TCFG); 57 58 raw_spin_unlock(&state_lock); 59 60 return 0; 61 } 62 63 static int constant_set_state_periodic(struct clock_event_device *evt) 64 { 65 unsigned long period; 66 unsigned long timer_config; 67 68 raw_spin_lock(&state_lock); 69 70 period = const_clock_freq / HZ; 71 timer_config = period & CSR_TCFG_VAL; 72 timer_config |= (CSR_TCFG_PERIOD | CSR_TCFG_EN); 73 csr_write64(timer_config, LOONGARCH_CSR_TCFG); 74 75 raw_spin_unlock(&state_lock); 76 77 return 0; 78 } 79 80 static int constant_set_state_shutdown(struct clock_event_device *evt) 81 { 82 unsigned long timer_config; 83 84 raw_spin_lock(&state_lock); 85 86 timer_config = csr_read64(LOONGARCH_CSR_TCFG); 87 timer_config &= ~CSR_TCFG_EN; 88 csr_write64(timer_config, LOONGARCH_CSR_TCFG); 89 90 raw_spin_unlock(&state_lock); 91 92 return 0; 93 } 94 95 static int constant_timer_next_event(unsigned long delta, struct clock_event_device *evt) 96 { 97 unsigned long timer_config; 98 99 delta &= CSR_TCFG_VAL; 100 timer_config = delta | CSR_TCFG_EN; 101 csr_write64(timer_config, LOONGARCH_CSR_TCFG); 102 103 return 0; 104 } 105 106 static int arch_timer_starting(unsigned int cpu) 107 { 108 set_csr_ecfg(ECFGF_TIMER); 109 110 return 0; 111 } 112 113 static int arch_timer_dying(unsigned int cpu) 114 { 115 constant_set_state_shutdown(this_cpu_ptr(&constant_clockevent_device)); 116 117 /* Clear Timer Interrupt */ 118 write_csr_tintclear(CSR_TINTCLR_TI); 119 120 return 0; 121 } 122 123 static unsigned long get_loops_per_jiffy(void) 124 { 125 unsigned long lpj = (unsigned long)const_clock_freq; 126 127 do_div(lpj, HZ); 128 129 return lpj; 130 } 131 132 static long init_offset; 133 134 void save_counter(void) 135 { 136 init_offset = drdtime(); 137 } 138 139 void sync_counter(void) 140 { 141 /* Ensure counter begin at 0 */ 142 csr_write64(init_offset, LOONGARCH_CSR_CNTC); 143 } 144 145 int constant_clockevent_init(void) 146 { 147 unsigned int cpu = smp_processor_id(); 148 #ifdef CONFIG_PREEMPT_RT 149 unsigned long min_delta = 100; 150 #else 151 unsigned long min_delta = 1000; 152 #endif 153 unsigned long max_delta = GENMASK_ULL(boot_cpu_data.timerbits, 0); 154 struct clock_event_device *cd; 155 static int irq = 0, timer_irq_installed = 0; 156 157 if (!timer_irq_installed) { 158 irq = get_percpu_irq(INT_TI); 159 if (irq < 0) 160 pr_err("Failed to map irq %d (timer)\n", irq); 161 } 162 163 cd = &per_cpu(constant_clockevent_device, cpu); 164 165 cd->name = "Constant"; 166 cd->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_PERCPU; 167 168 cd->irq = irq; 169 cd->rating = 320; 170 cd->cpumask = cpumask_of(cpu); 171 cd->set_state_oneshot = constant_set_state_oneshot; 172 cd->set_state_oneshot_stopped = constant_set_state_shutdown; 173 cd->set_state_periodic = constant_set_state_periodic; 174 cd->set_state_shutdown = constant_set_state_shutdown; 175 cd->set_next_event = constant_timer_next_event; 176 cd->event_handler = constant_event_handler; 177 178 clockevents_config_and_register(cd, const_clock_freq, min_delta, max_delta); 179 180 if (timer_irq_installed) 181 return 0; 182 183 timer_irq_installed = 1; 184 185 sync_counter(); 186 187 if (request_irq(irq, constant_timer_interrupt, IRQF_PERCPU | IRQF_TIMER, "timer", NULL)) 188 pr_err("Failed to request irq %d (timer)\n", irq); 189 190 lpj_fine = get_loops_per_jiffy(); 191 pr_info("Constant clock event device register\n"); 192 193 cpuhp_setup_state(CPUHP_AP_LOONGARCH_ARCH_TIMER_STARTING, 194 "clockevents/loongarch/timer:starting", 195 arch_timer_starting, arch_timer_dying); 196 197 return 0; 198 } 199 200 static u64 read_const_counter(struct clocksource *clk) 201 { 202 return drdtime(); 203 } 204 205 static noinstr u64 sched_clock_read(void) 206 { 207 return drdtime(); 208 } 209 210 static struct clocksource clocksource_const = { 211 .name = "Constant", 212 .rating = 400, 213 .read = read_const_counter, 214 .mask = CLOCKSOURCE_MASK(64), 215 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 216 .vdso_clock_mode = VDSO_CLOCKMODE_CPU, 217 }; 218 219 int __init constant_clocksource_init(void) 220 { 221 int res; 222 unsigned long freq = const_clock_freq; 223 224 res = clocksource_register_hz(&clocksource_const, freq); 225 226 sched_clock_register(sched_clock_read, 64, freq); 227 228 pr_info("Constant clock source device register\n"); 229 230 return res; 231 } 232 233 void __init time_init(void) 234 { 235 if (!cpu_has_cpucfg) 236 const_clock_freq = cpu_clock_freq; 237 else 238 const_clock_freq = calc_const_freq(); 239 240 init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC)); 241 242 constant_clockevent_init(); 243 constant_clocksource_init(); 244 pv_time_init(); 245 } 246