1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#include <asm/asm.h> 6#include <asm/asmmacro.h> 7#include <asm/asm-offsets.h> 8#include <asm/loongarch.h> 9#include <asm/regdef.h> 10#include <asm/stackframe.h> 11#include <asm/thread_info.h> 12 13/* 14 * task_struct *__switch_to(task_struct *prev, task_struct *next, 15 * struct thread_info *next_ti, void *sched_ra, void *sched_cfa) 16 */ 17 .align 5 18SYM_FUNC_START(__switch_to) 19#ifdef CONFIG_32BIT 20 PTR_ADDI a0, a0, TASK_STRUCT_OFFSET 21 PTR_ADDI a1, a1, TASK_STRUCT_OFFSET 22#endif 23 csrrd t1, LOONGARCH_CSR_PRMD 24 LONG_SPTR t1, a0, (THREAD_CSRPRMD - TASK_STRUCT_OFFSET) 25 26 cpu_save_nonscratch a0 27 LONG_SPTR a3, a0, (THREAD_SCHED_RA - TASK_STRUCT_OFFSET) 28 LONG_SPTR a4, a0, (THREAD_SCHED_CFA - TASK_STRUCT_OFFSET) 29 30#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) 31 la t7, __stack_chk_guard 32 LONG_LPTR t8, a1, (TASK_STACK_CANARY - TASK_STRUCT_OFFSET) 33 LONG_SPTR t8, t7, 0 34#endif 35 36 move tp, a2 37 cpu_restore_nonscratch a1 38 39 li.w t0, _THREAD_SIZE 40 PTR_ADD t0, t0, tp 41 set_saved_sp t0, t1, t2 42 43 LONG_LPTR t1, a1, (THREAD_CSRPRMD - TASK_STRUCT_OFFSET) 44 csrwr t1, LOONGARCH_CSR_PRMD 45 46#ifdef CONFIG_32BIT 47 PTR_ADDI a0, a0, -TASK_STRUCT_OFFSET 48#endif 49 jr ra 50SYM_FUNC_END(__switch_to) 51