xref: /linux/arch/loongarch/include/asm/topology.h (revision ac1ad16f10523c2c60aef0abeb8a850ea6d06ced)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4  */
5 #ifndef __ASM_TOPOLOGY_H
6 #define __ASM_TOPOLOGY_H
7 
8 #include <linux/smp.h>
9 
10 #ifdef CONFIG_NUMA
11 #include <asm/numa.h>
12 
13 extern cpumask_t cpus_on_node[];
14 
15 #define cpumask_of_node(node)  (&cpus_on_node[node])
16 
17 struct pci_bus;
18 extern int pcibus_to_node(struct pci_bus *);
19 
20 #define cpumask_of_pcibus(bus)	(cpu_online_mask)
21 
22 int __node_distance(int from, int to);
23 #define node_distance(from, to) __node_distance(from, to)
24 
25 #else
26 #define pcibus_to_node(bus)	0
27 #endif
28 
29 #ifdef CONFIG_SMP
30 /*
31  * Return cpus that shares the last level cache.
32  */
33 static inline const struct cpumask *cpu_coregroup_mask(int cpu)
34 {
35 	return &cpu_llc_shared_map[cpu];
36 }
37 
38 #define topology_physical_package_id(cpu)	(cpu_data[cpu].package)
39 #define topology_core_id(cpu)			(cpu_data[cpu].core)
40 #define topology_core_cpumask(cpu)		(&cpu_core_map[cpu])
41 #define topology_sibling_cpumask(cpu)		(&cpu_sibling_map[cpu])
42 #endif
43 
44 #include <asm-generic/topology.h>
45 
46 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
47 #endif /* __ASM_TOPOLOGY_H */
48