1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__ 7 #define __ASM_LOONGARCH_KVM_HOST_H__ 8 9 #include <linux/cpumask.h> 10 #include <linux/hrtimer.h> 11 #include <linux/interrupt.h> 12 #include <linux/kvm.h> 13 #include <linux/kvm_types.h> 14 #include <linux/mutex.h> 15 #include <linux/spinlock.h> 16 #include <linux/threads.h> 17 #include <linux/types.h> 18 19 #include <asm/inst.h> 20 #include <asm/kvm_mmu.h> 21 #include <asm/kvm_ipi.h> 22 #include <asm/kvm_eiointc.h> 23 #include <asm/loongarch.h> 24 25 /* Loongarch KVM register ids */ 26 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT) 27 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT) 28 29 #define KVM_MAX_VCPUS 256 30 #define KVM_MAX_CPUCFG_REGS 21 31 32 #define KVM_HALT_POLL_NS_DEFAULT 500000 33 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0) 34 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1) 35 #define KVM_REQ_PMU KVM_ARCH_REQ(2) 36 37 #define KVM_GUESTDBG_SW_BP_MASK \ 38 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP) 39 #define KVM_GUESTDBG_VALID_MASK \ 40 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP) 41 42 #define KVM_DIRTY_LOG_MANUAL_CAPS \ 43 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET) 44 45 struct kvm_vm_stat { 46 struct kvm_vm_stat_generic generic; 47 u64 pages; 48 u64 hugepages; 49 u64 ipi_read_exits; 50 u64 ipi_write_exits; 51 u64 eiointc_read_exits; 52 u64 eiointc_write_exits; 53 }; 54 55 struct kvm_vcpu_stat { 56 struct kvm_vcpu_stat_generic generic; 57 u64 int_exits; 58 u64 idle_exits; 59 u64 cpucfg_exits; 60 u64 signal_exits; 61 u64 hypercall_exits; 62 }; 63 64 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) 65 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1) 66 struct kvm_arch_memory_slot { 67 unsigned long flags; 68 }; 69 70 #define HOST_MAX_PMNUM 16 71 struct kvm_context { 72 unsigned long vpid_cache; 73 struct kvm_vcpu *last_vcpu; 74 /* Host PMU CSR */ 75 u64 perf_ctrl[HOST_MAX_PMNUM]; 76 u64 perf_cntr[HOST_MAX_PMNUM]; 77 }; 78 79 struct kvm_world_switch { 80 int (*exc_entry)(void); 81 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu); 82 unsigned long page_order; 83 }; 84 85 #define MAX_PGTABLE_LEVELS 4 86 87 /* 88 * Physical CPUID is used for interrupt routing, there are different 89 * definitions about physical cpuid on different hardwares. 90 * 91 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512 92 * For IPI hardware, max destination CPUID size 1024 93 * For eiointc interrupt controller, max destination CPUID size is 256 94 * For msgint interrupt controller, max supported CPUID size is 65536 95 * 96 * Currently max CPUID is defined as 256 for KVM hypervisor, in future 97 * it will be expanded to 4096, including 16 packages at most. And every 98 * package supports at most 256 vcpus 99 */ 100 #define KVM_MAX_PHYID 256 101 102 struct kvm_phyid_info { 103 struct kvm_vcpu *vcpu; 104 bool enabled; 105 }; 106 107 struct kvm_phyid_map { 108 int max_phyid; 109 struct kvm_phyid_info phys_map[KVM_MAX_PHYID]; 110 }; 111 112 struct kvm_arch { 113 /* Guest physical mm */ 114 kvm_pte_t *pgd; 115 unsigned long gpa_size; 116 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS]; 117 unsigned int pte_shifts[MAX_PGTABLE_LEVELS]; 118 unsigned int root_level; 119 spinlock_t phyid_map_lock; 120 struct kvm_phyid_map *phyid_map; 121 /* Enabled PV features */ 122 unsigned long pv_features; 123 124 s64 time_offset; 125 struct kvm_context __percpu *vmcs; 126 struct loongarch_ipi *ipi; 127 struct loongarch_eiointc *eiointc; 128 }; 129 130 #define CSR_MAX_NUMS 0x800 131 132 struct loongarch_csrs { 133 unsigned long csrs[CSR_MAX_NUMS]; 134 }; 135 136 /* Resume Flags */ 137 #define RESUME_HOST 0 138 #define RESUME_GUEST 1 139 140 enum emulation_result { 141 EMULATE_DONE, /* no further processing */ 142 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ 143 EMULATE_DO_IOCSR, /* handle IOCSR request */ 144 EMULATE_FAIL, /* can't emulate this instruction */ 145 EMULATE_EXCEPT, /* A guest exception has been generated */ 146 }; 147 148 #define KVM_LARCH_FPU (0x1 << 0) 149 #define KVM_LARCH_LSX (0x1 << 1) 150 #define KVM_LARCH_LASX (0x1 << 2) 151 #define KVM_LARCH_LBT (0x1 << 3) 152 #define KVM_LARCH_PMU (0x1 << 4) 153 #define KVM_LARCH_SWCSR_LATEST (0x1 << 5) 154 #define KVM_LARCH_HWCSR_USABLE (0x1 << 6) 155 156 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63) 157 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \ 158 BIT(KVM_FEATURE_STEAL_TIME) | \ 159 BIT(KVM_FEATURE_VIRT_EXTIOI)) 160 161 struct kvm_vcpu_arch { 162 /* 163 * Switch pointer-to-function type to unsigned long 164 * for loading the value into register directly. 165 */ 166 unsigned long host_eentry; 167 unsigned long guest_eentry; 168 169 /* Pointers stored here for easy accessing from assembly code */ 170 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); 171 172 /* Host registers preserved across guest mode execution */ 173 unsigned long host_sp; 174 unsigned long host_tp; 175 unsigned long host_pgd; 176 177 /* Host CSRs are used when handling exits from guest */ 178 unsigned long badi; 179 unsigned long badv; 180 unsigned long host_ecfg; 181 unsigned long host_estat; 182 unsigned long host_percpu; 183 184 /* GPRs */ 185 unsigned long gprs[32]; 186 unsigned long pc; 187 188 /* Which auxiliary state is loaded (KVM_LARCH_*) */ 189 unsigned int aux_inuse; 190 191 /* FPU state */ 192 struct loongarch_fpu fpu FPU_ALIGN; 193 struct loongarch_lbt lbt; 194 195 /* CSR state */ 196 struct loongarch_csrs *csr; 197 198 /* Guest max PMU CSR id */ 199 int max_pmu_csrid; 200 201 /* GPR used as IO source/target */ 202 u32 io_gpr; 203 204 /* KVM register to control count timer */ 205 u32 count_ctl; 206 struct hrtimer swtimer; 207 208 /* Bitmask of intr that are pending */ 209 unsigned long irq_pending; 210 /* Bitmask of pending intr to be cleared */ 211 unsigned long irq_clear; 212 213 /* Bitmask of exceptions that are pending */ 214 unsigned long exception_pending; 215 unsigned int esubcode; 216 217 /* Cache for pages needed inside spinlock regions */ 218 struct kvm_mmu_memory_cache mmu_page_cache; 219 220 /* vcpu's vpid */ 221 u64 vpid; 222 gpa_t flush_gpa; 223 224 /* Frequency of stable timer in Hz */ 225 u64 timer_mhz; 226 ktime_t expire; 227 228 /* Last CPU the vCPU state was loaded on */ 229 int last_sched_cpu; 230 /* mp state */ 231 struct kvm_mp_state mp_state; 232 /* ipi state */ 233 struct ipi_state ipi_state; 234 /* cpucfg */ 235 u32 cpucfg[KVM_MAX_CPUCFG_REGS]; 236 237 /* paravirt steal time */ 238 struct { 239 u64 guest_addr; 240 u64 last_steal; 241 struct gfn_to_hva_cache cache; 242 } st; 243 }; 244 245 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg) 246 { 247 return csr->csrs[reg]; 248 } 249 250 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val) 251 { 252 csr->csrs[reg] = val; 253 } 254 255 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch) 256 { 257 return arch->cpucfg[2] & CPUCFG2_FP; 258 } 259 260 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch) 261 { 262 return arch->cpucfg[2] & CPUCFG2_LSX; 263 } 264 265 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch) 266 { 267 return arch->cpucfg[2] & CPUCFG2_LASX; 268 } 269 270 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch) 271 { 272 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); 273 } 274 275 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) 276 { 277 return arch->cpucfg[6] & CPUCFG6_PMP; 278 } 279 280 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch) 281 { 282 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT; 283 } 284 285 /* Debug: dump vcpu state */ 286 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu); 287 288 /* MMU handling */ 289 void kvm_flush_tlb_all(void); 290 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa); 291 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write); 292 293 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable); 294 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 295 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 296 297 static inline void update_pc(struct kvm_vcpu_arch *arch) 298 { 299 arch->pc += 4; 300 } 301 302 /* 303 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault. 304 * @vcpu: Virtual CPU. 305 * 306 * Returns: Whether the TLBL exception was likely due to an instruction 307 * fetch fault rather than a data load fault. 308 */ 309 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch) 310 { 311 return arch->pc == arch->badv; 312 } 313 314 /* Misc */ 315 static inline void kvm_arch_hardware_unsetup(void) {} 316 static inline void kvm_arch_sync_events(struct kvm *kvm) {} 317 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} 318 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 319 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 320 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 321 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {} 322 void kvm_check_vpid(struct kvm_vcpu *vcpu); 323 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer); 324 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, const struct kvm_memory_slot *memslot); 325 void kvm_init_vmcs(struct kvm *kvm); 326 void kvm_exc_entry(void); 327 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu); 328 329 extern unsigned long vpid_mask; 330 extern const unsigned long kvm_exception_size; 331 extern const unsigned long kvm_enter_guest_size; 332 extern struct kvm_world_switch *kvm_loongarch_ops; 333 334 #define SW_GCSR (1 << 0) 335 #define HW_GCSR (1 << 1) 336 #define INVALID_GCSR (1 << 2) 337 338 int get_gcsr_flag(int csr); 339 void set_hw_gcsr(int csr_id, unsigned long val); 340 341 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */ 342