1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__ 7 #define __ASM_LOONGARCH_KVM_HOST_H__ 8 9 #include <linux/cpumask.h> 10 #include <linux/hrtimer.h> 11 #include <linux/interrupt.h> 12 #include <linux/kvm.h> 13 #include <linux/kvm_types.h> 14 #include <linux/mutex.h> 15 #include <linux/spinlock.h> 16 #include <linux/threads.h> 17 #include <linux/types.h> 18 19 #include <asm/inst.h> 20 #include <asm/kvm_mmu.h> 21 #include <asm/kvm_ipi.h> 22 #include <asm/kvm_eiointc.h> 23 #include <asm/loongarch.h> 24 25 /* Loongarch KVM register ids */ 26 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT) 27 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT) 28 29 #define KVM_MAX_VCPUS 256 30 #define KVM_MAX_CPUCFG_REGS 21 31 32 #define KVM_HALT_POLL_NS_DEFAULT 500000 33 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0) 34 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1) 35 #define KVM_REQ_PMU KVM_ARCH_REQ(2) 36 37 #define KVM_GUESTDBG_SW_BP_MASK \ 38 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP) 39 #define KVM_GUESTDBG_VALID_MASK \ 40 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP) 41 42 #define KVM_DIRTY_LOG_MANUAL_CAPS \ 43 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET) 44 45 struct kvm_vm_stat { 46 struct kvm_vm_stat_generic generic; 47 u64 pages; 48 u64 hugepages; 49 u64 ipi_read_exits; 50 u64 ipi_write_exits; 51 }; 52 53 struct kvm_vcpu_stat { 54 struct kvm_vcpu_stat_generic generic; 55 u64 int_exits; 56 u64 idle_exits; 57 u64 cpucfg_exits; 58 u64 signal_exits; 59 u64 hypercall_exits; 60 }; 61 62 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) 63 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1) 64 struct kvm_arch_memory_slot { 65 unsigned long flags; 66 }; 67 68 #define HOST_MAX_PMNUM 16 69 struct kvm_context { 70 unsigned long vpid_cache; 71 struct kvm_vcpu *last_vcpu; 72 /* Host PMU CSR */ 73 u64 perf_ctrl[HOST_MAX_PMNUM]; 74 u64 perf_cntr[HOST_MAX_PMNUM]; 75 }; 76 77 struct kvm_world_switch { 78 int (*exc_entry)(void); 79 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu); 80 unsigned long page_order; 81 }; 82 83 #define MAX_PGTABLE_LEVELS 4 84 85 /* 86 * Physical CPUID is used for interrupt routing, there are different 87 * definitions about physical cpuid on different hardwares. 88 * 89 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512 90 * For IPI hardware, max destination CPUID size 1024 91 * For eiointc interrupt controller, max destination CPUID size is 256 92 * For msgint interrupt controller, max supported CPUID size is 65536 93 * 94 * Currently max CPUID is defined as 256 for KVM hypervisor, in future 95 * it will be expanded to 4096, including 16 packages at most. And every 96 * package supports at most 256 vcpus 97 */ 98 #define KVM_MAX_PHYID 256 99 100 struct kvm_phyid_info { 101 struct kvm_vcpu *vcpu; 102 bool enabled; 103 }; 104 105 struct kvm_phyid_map { 106 int max_phyid; 107 struct kvm_phyid_info phys_map[KVM_MAX_PHYID]; 108 }; 109 110 struct kvm_arch { 111 /* Guest physical mm */ 112 kvm_pte_t *pgd; 113 unsigned long gpa_size; 114 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS]; 115 unsigned int pte_shifts[MAX_PGTABLE_LEVELS]; 116 unsigned int root_level; 117 spinlock_t phyid_map_lock; 118 struct kvm_phyid_map *phyid_map; 119 /* Enabled PV features */ 120 unsigned long pv_features; 121 122 s64 time_offset; 123 struct kvm_context __percpu *vmcs; 124 struct loongarch_ipi *ipi; 125 struct loongarch_eiointc *eiointc; 126 }; 127 128 #define CSR_MAX_NUMS 0x800 129 130 struct loongarch_csrs { 131 unsigned long csrs[CSR_MAX_NUMS]; 132 }; 133 134 /* Resume Flags */ 135 #define RESUME_HOST 0 136 #define RESUME_GUEST 1 137 138 enum emulation_result { 139 EMULATE_DONE, /* no further processing */ 140 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ 141 EMULATE_DO_IOCSR, /* handle IOCSR request */ 142 EMULATE_FAIL, /* can't emulate this instruction */ 143 EMULATE_EXCEPT, /* A guest exception has been generated */ 144 }; 145 146 #define KVM_LARCH_FPU (0x1 << 0) 147 #define KVM_LARCH_LSX (0x1 << 1) 148 #define KVM_LARCH_LASX (0x1 << 2) 149 #define KVM_LARCH_LBT (0x1 << 3) 150 #define KVM_LARCH_PMU (0x1 << 4) 151 #define KVM_LARCH_SWCSR_LATEST (0x1 << 5) 152 #define KVM_LARCH_HWCSR_USABLE (0x1 << 6) 153 154 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63) 155 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \ 156 BIT(KVM_FEATURE_STEAL_TIME) | \ 157 BIT(KVM_FEATURE_VIRT_EXTIOI)) 158 159 struct kvm_vcpu_arch { 160 /* 161 * Switch pointer-to-function type to unsigned long 162 * for loading the value into register directly. 163 */ 164 unsigned long host_eentry; 165 unsigned long guest_eentry; 166 167 /* Pointers stored here for easy accessing from assembly code */ 168 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); 169 170 /* Host registers preserved across guest mode execution */ 171 unsigned long host_sp; 172 unsigned long host_tp; 173 unsigned long host_pgd; 174 175 /* Host CSRs are used when handling exits from guest */ 176 unsigned long badi; 177 unsigned long badv; 178 unsigned long host_ecfg; 179 unsigned long host_estat; 180 unsigned long host_percpu; 181 182 /* GPRs */ 183 unsigned long gprs[32]; 184 unsigned long pc; 185 186 /* Which auxiliary state is loaded (KVM_LARCH_*) */ 187 unsigned int aux_inuse; 188 189 /* FPU state */ 190 struct loongarch_fpu fpu FPU_ALIGN; 191 struct loongarch_lbt lbt; 192 193 /* CSR state */ 194 struct loongarch_csrs *csr; 195 196 /* Guest max PMU CSR id */ 197 int max_pmu_csrid; 198 199 /* GPR used as IO source/target */ 200 u32 io_gpr; 201 202 /* KVM register to control count timer */ 203 u32 count_ctl; 204 struct hrtimer swtimer; 205 206 /* Bitmask of intr that are pending */ 207 unsigned long irq_pending; 208 /* Bitmask of pending intr to be cleared */ 209 unsigned long irq_clear; 210 211 /* Bitmask of exceptions that are pending */ 212 unsigned long exception_pending; 213 unsigned int esubcode; 214 215 /* Cache for pages needed inside spinlock regions */ 216 struct kvm_mmu_memory_cache mmu_page_cache; 217 218 /* vcpu's vpid */ 219 u64 vpid; 220 gpa_t flush_gpa; 221 222 /* Frequency of stable timer in Hz */ 223 u64 timer_mhz; 224 ktime_t expire; 225 226 /* Last CPU the vCPU state was loaded on */ 227 int last_sched_cpu; 228 /* mp state */ 229 struct kvm_mp_state mp_state; 230 /* ipi state */ 231 struct ipi_state ipi_state; 232 /* cpucfg */ 233 u32 cpucfg[KVM_MAX_CPUCFG_REGS]; 234 235 /* paravirt steal time */ 236 struct { 237 u64 guest_addr; 238 u64 last_steal; 239 struct gfn_to_hva_cache cache; 240 } st; 241 }; 242 243 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg) 244 { 245 return csr->csrs[reg]; 246 } 247 248 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val) 249 { 250 csr->csrs[reg] = val; 251 } 252 253 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch) 254 { 255 return arch->cpucfg[2] & CPUCFG2_FP; 256 } 257 258 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch) 259 { 260 return arch->cpucfg[2] & CPUCFG2_LSX; 261 } 262 263 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch) 264 { 265 return arch->cpucfg[2] & CPUCFG2_LASX; 266 } 267 268 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch) 269 { 270 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); 271 } 272 273 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) 274 { 275 return arch->cpucfg[6] & CPUCFG6_PMP; 276 } 277 278 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch) 279 { 280 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT; 281 } 282 283 /* Debug: dump vcpu state */ 284 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu); 285 286 /* MMU handling */ 287 void kvm_flush_tlb_all(void); 288 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa); 289 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write); 290 291 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable); 292 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 293 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 294 295 static inline void update_pc(struct kvm_vcpu_arch *arch) 296 { 297 arch->pc += 4; 298 } 299 300 /* 301 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault. 302 * @vcpu: Virtual CPU. 303 * 304 * Returns: Whether the TLBL exception was likely due to an instruction 305 * fetch fault rather than a data load fault. 306 */ 307 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch) 308 { 309 return arch->pc == arch->badv; 310 } 311 312 /* Misc */ 313 static inline void kvm_arch_hardware_unsetup(void) {} 314 static inline void kvm_arch_sync_events(struct kvm *kvm) {} 315 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} 316 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 317 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 318 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 319 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {} 320 void kvm_check_vpid(struct kvm_vcpu *vcpu); 321 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer); 322 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, const struct kvm_memory_slot *memslot); 323 void kvm_init_vmcs(struct kvm *kvm); 324 void kvm_exc_entry(void); 325 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu); 326 327 extern unsigned long vpid_mask; 328 extern const unsigned long kvm_exception_size; 329 extern const unsigned long kvm_enter_guest_size; 330 extern struct kvm_world_switch *kvm_loongarch_ops; 331 332 #define SW_GCSR (1 << 0) 333 #define HW_GCSR (1 << 1) 334 #define INVALID_GCSR (1 << 2) 335 336 int get_gcsr_flag(int csr); 337 void set_hw_gcsr(int csr_id, unsigned long val); 338 339 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */ 340