1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__ 7 #define __ASM_LOONGARCH_KVM_HOST_H__ 8 9 #include <linux/cpumask.h> 10 #include <linux/hrtimer.h> 11 #include <linux/interrupt.h> 12 #include <linux/kvm.h> 13 #include <linux/kvm_types.h> 14 #include <linux/mutex.h> 15 #include <linux/perf_event.h> 16 #include <linux/spinlock.h> 17 #include <linux/threads.h> 18 #include <linux/types.h> 19 20 #include <asm/inst.h> 21 #include <asm/kvm_mmu.h> 22 #include <asm/kvm_ipi.h> 23 #include <asm/kvm_dmsintc.h> 24 #include <asm/kvm_eiointc.h> 25 #include <asm/kvm_pch_pic.h> 26 #include <asm/loongarch.h> 27 28 #define __KVM_HAVE_ARCH_INTC_INITIALIZED 29 30 /* Loongarch KVM register ids */ 31 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT) 32 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT) 33 34 #define KVM_MAX_VCPUS 256 35 #define KVM_MAX_CPUCFG_REGS 21 36 37 #define KVM_HALT_POLL_NS_DEFAULT 500000 38 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0) 39 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1) 40 #define KVM_REQ_PMU KVM_ARCH_REQ(2) 41 #define KVM_REQ_FPU_LOAD KVM_ARCH_REQ(3) 42 #define KVM_REQ_LBT_LOAD KVM_ARCH_REQ(4) 43 44 #define KVM_GUESTDBG_SW_BP_MASK \ 45 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP) 46 #define KVM_GUESTDBG_VALID_MASK \ 47 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP) 48 49 #define KVM_DIRTY_LOG_MANUAL_CAPS \ 50 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET) 51 52 struct kvm_vm_stat { 53 struct kvm_vm_stat_generic generic; 54 u64 pages; 55 u64 hugepages; 56 }; 57 58 struct kvm_vcpu_stat { 59 struct kvm_vcpu_stat_generic generic; 60 u64 int_exits; 61 u64 idle_exits; 62 u64 cpucfg_exits; 63 u64 signal_exits; 64 u64 hypercall_exits; 65 u64 ipi_read_exits; 66 u64 ipi_write_exits; 67 u64 eiointc_read_exits; 68 u64 eiointc_write_exits; 69 u64 pch_pic_read_exits; 70 u64 pch_pic_write_exits; 71 }; 72 73 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) 74 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1) 75 struct kvm_arch_memory_slot { 76 unsigned long flags; 77 }; 78 79 #define HOST_MAX_PMNUM 16 80 struct kvm_context { 81 unsigned long vpid_cache; 82 struct kvm_vcpu *last_vcpu; 83 /* Host PMU CSR */ 84 u64 perf_ctrl[HOST_MAX_PMNUM]; 85 u64 perf_cntr[HOST_MAX_PMNUM]; 86 }; 87 88 struct kvm_world_switch { 89 int (*exc_entry)(void); 90 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu); 91 }; 92 93 #define MAX_PGTABLE_LEVELS 4 94 95 /* 96 * Physical CPUID is used for interrupt routing, there are different 97 * definitions about physical cpuid on different hardwares. 98 * 99 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512 100 * For IPI hardware, max destination CPUID size 1024 101 * For eiointc interrupt controller, max destination CPUID size is 256 102 * For msgint interrupt controller, max supported CPUID size is 65536 103 * 104 * Currently max CPUID is defined as 256 for KVM hypervisor, in future 105 * it will be expanded to 4096, including 16 packages at most. And every 106 * package supports at most 256 vcpus 107 */ 108 #define KVM_MAX_PHYID 256 109 110 struct kvm_phyid_info { 111 struct kvm_vcpu *vcpu; 112 bool enabled; 113 }; 114 115 struct kvm_phyid_map { 116 int max_phyid; 117 struct kvm_phyid_info phys_map[KVM_MAX_PHYID]; 118 }; 119 120 struct kvm_arch { 121 /* Guest physical mm */ 122 kvm_pte_t *pgd; 123 unsigned long gpa_size; 124 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS]; 125 unsigned int pte_shifts[MAX_PGTABLE_LEVELS]; 126 unsigned int root_level; 127 spinlock_t phyid_map_lock; 128 spinlock_t pv_setting_lock; 129 struct kvm_phyid_map *phyid_map; 130 /* Enabled PV features */ 131 unsigned long pv_features; 132 /* Supported KVM features */ 133 unsigned long kvm_features; 134 135 s64 time_offset; 136 struct kvm_context __percpu *vmcs; 137 struct loongarch_ipi *ipi; 138 struct loongarch_dmsintc *dmsintc; 139 struct loongarch_eiointc *eiointc; 140 struct loongarch_pch_pic *pch_pic; 141 }; 142 143 #define CSR_MAX_NUMS 0x800 144 145 struct loongarch_csrs { 146 unsigned long csrs[CSR_MAX_NUMS]; 147 }; 148 149 /* Resume Flags */ 150 #define RESUME_HOST 0 151 #define RESUME_GUEST 1 152 153 enum emulation_result { 154 EMULATE_DONE, /* no further processing */ 155 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ 156 EMULATE_DO_IOCSR, /* handle IOCSR request */ 157 EMULATE_FAIL, /* can't emulate this instruction */ 158 EMULATE_EXCEPT, /* A guest exception has been generated */ 159 }; 160 161 #define KVM_LARCH_FPU (0x1 << 0) 162 #define KVM_LARCH_LBT (0x1 << 1) 163 #define KVM_LARCH_PMU (0x1 << 2) 164 #define KVM_LARCH_SWCSR_LATEST (0x1 << 3) 165 #define KVM_LARCH_HWCSR_USABLE (0x1 << 4) 166 167 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63) 168 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \ 169 BIT(KVM_FEATURE_PREEMPT) | \ 170 BIT(KVM_FEATURE_STEAL_TIME) | \ 171 BIT(KVM_FEATURE_USER_HCALL) | \ 172 BIT(KVM_FEATURE_VIRT_EXTIOI)) 173 174 struct kvm_vcpu_arch { 175 /* 176 * Switch pointer-to-function type to unsigned long 177 * for loading the value into register directly. 178 */ 179 unsigned long host_eentry; 180 unsigned long guest_eentry; 181 182 /* Pointers stored here for easy accessing from assembly code */ 183 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); 184 185 /* GPA (=HVA) of PGD for secondary mmu */ 186 unsigned long kvm_pgd; 187 188 /* Host registers preserved across guest mode execution */ 189 unsigned long host_sp; 190 unsigned long host_tp; 191 unsigned long host_pgd; 192 193 /* Host CSRs are used when handling exits from guest */ 194 unsigned long badi; 195 unsigned long badv; 196 unsigned long host_ecfg; 197 unsigned long host_estat; 198 unsigned long host_percpu; 199 200 /* GPRs */ 201 unsigned long gprs[32]; 202 unsigned long pc; 203 204 /* Which auxiliary state is loaded (KVM_LARCH_*) */ 205 unsigned int aux_inuse; 206 207 /* FPU state */ 208 struct loongarch_fpu fpu FPU_ALIGN; 209 struct loongarch_lbt lbt; 210 211 /* CSR state */ 212 struct loongarch_csrs *csr; 213 214 /* Guest max PMU CSR id */ 215 int max_pmu_csrid; 216 217 /* GPR used as IO source/target */ 218 u32 io_gpr; 219 220 /* KVM register to control count timer */ 221 u32 count_ctl; 222 struct hrtimer swtimer; 223 224 /* Bitmask of intr that are pending */ 225 unsigned long irq_pending; 226 /* Bitmask of pending intr to be cleared */ 227 unsigned long irq_clear; 228 229 /* Bitmask of exceptions that are pending */ 230 unsigned long exception_pending; 231 unsigned int esubcode; 232 233 /* Cache for pages needed inside spinlock regions */ 234 struct kvm_mmu_memory_cache mmu_page_cache; 235 236 /* vcpu's vpid */ 237 u64 vpid; 238 gpa_t flush_gpa; 239 240 /* Frequency of stable timer in Hz */ 241 u64 timer_mhz; 242 ktime_t expire; 243 244 /* Last CPU the vCPU state was loaded on */ 245 int last_sched_cpu; 246 /* mp state */ 247 struct kvm_mp_state mp_state; 248 /* ipi state */ 249 struct ipi_state ipi_state; 250 struct dmsintc_state dmsintc_state; 251 /* cpucfg */ 252 u32 cpucfg[KVM_MAX_CPUCFG_REGS]; 253 254 /* paravirt steal time */ 255 struct { 256 u64 guest_addr; 257 u64 last_steal; 258 struct gfn_to_hva_cache cache; 259 u8 preempted; 260 } st; 261 }; 262 263 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg) 264 { 265 return csr->csrs[reg]; 266 } 267 268 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val) 269 { 270 csr->csrs[reg] = val; 271 } 272 273 static inline bool kvm_guest_has_msgint(struct kvm_vcpu_arch *arch) 274 { 275 return arch->cpucfg[1] & CPUCFG1_MSGINT; 276 } 277 278 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch) 279 { 280 return arch->cpucfg[2] & CPUCFG2_FP; 281 } 282 283 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch) 284 { 285 return arch->cpucfg[2] & CPUCFG2_LSX; 286 } 287 288 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch) 289 { 290 return arch->cpucfg[2] & CPUCFG2_LASX; 291 } 292 293 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch) 294 { 295 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); 296 } 297 298 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) 299 { 300 return arch->cpucfg[6] & CPUCFG6_PMP; 301 } 302 303 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch) 304 { 305 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT; 306 } 307 308 /* Check whether KVM support this feature (VMM may disable it) */ 309 static inline bool kvm_vm_support(struct kvm_arch *arch, int feature) 310 { 311 return !!(arch->kvm_features & BIT_ULL(feature)); 312 } 313 314 bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu); 315 316 /* Debug: dump vcpu state */ 317 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu); 318 319 /* MMU handling */ 320 void kvm_flush_tlb_all(void); 321 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa); 322 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode); 323 324 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable); 325 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 326 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 327 328 static inline void update_pc(struct kvm_vcpu_arch *arch) 329 { 330 arch->pc += 4; 331 } 332 333 /* 334 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault. 335 * @vcpu: Virtual CPU. 336 * 337 * Returns: Whether the TLBL exception was likely due to an instruction 338 * fetch fault rather than a data load fault. 339 */ 340 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch) 341 { 342 return arch->pc == arch->badv; 343 } 344 345 /* Misc */ 346 static inline void kvm_arch_hardware_unsetup(void) {} 347 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} 348 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 349 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 350 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 351 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {} 352 void kvm_check_vpid(struct kvm_vcpu *vcpu); 353 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer); 354 void kvm_init_vmcs(struct kvm *kvm); 355 void kvm_exc_entry(void); 356 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu); 357 358 extern unsigned long vpid_mask; 359 extern struct kvm_world_switch *kvm_loongarch_ops; 360 361 #define SW_GCSR (1 << 0) 362 #define HW_GCSR (1 << 1) 363 #define INVALID_GCSR (1 << 2) 364 365 int get_gcsr_flag(int csr); 366 void set_hw_gcsr(int csr_id, unsigned long val); 367 368 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */ 369