1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@1 { 20 compatible = "loongson,la364"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 24 }; 25 26 cpu1: cpu@2 { 27 compatible = "loongson,la364"; 28 device_type = "cpu"; 29 reg = <0x1>; 30 clocks = <&clk LOONGSON2_NODE_CLK>; 31 }; 32 }; 33 34 ref_100m: clock-ref-100m { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <100000000>; 38 clock-output-names = "ref_100m"; 39 }; 40 41 cpuintc: interrupt-controller { 42 compatible = "loongson,cpu-interrupt-controller"; 43 #interrupt-cells = <1>; 44 interrupt-controller; 45 }; 46 47 thermal-zones { 48 cpu-thermal { 49 polling-delay-passive = <1000>; 50 polling-delay = <5000>; 51 thermal-sensors = <&tsensor 0>; 52 53 trips { 54 cpu-alert { 55 temperature = <40000>; 56 hysteresis = <2000>; 57 type = "active"; 58 }; 59 60 cpu-crit { 61 temperature = <85000>; 62 hysteresis = <5000>; 63 type = "critical"; 64 }; 65 }; 66 }; 67 }; 68 69 bus@10000000 { 70 compatible = "simple-bus"; 71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 75 #address-cells = <2>; 76 #size-cells = <2>; 77 78 isa@18400000 { 79 compatible = "isa"; 80 #size-cells = <1>; 81 #address-cells = <2>; 82 ranges = <1 0x0 0x0 0x18400000 0x4000>; 83 }; 84 85 clk: clock-controller@10010480 { 86 compatible = "loongson,ls2k2000-clk"; 87 reg = <0x0 0x10010480 0x0 0x100>; 88 #clock-cells = <1>; 89 clocks = <&ref_100m>; 90 clock-names = "ref_100m"; 91 }; 92 93 pmc: power-management@100d0000 { 94 compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon"; 95 reg = <0x0 0x100d0000 0x0 0x58>; 96 interrupt-parent = <&eiointc>; 97 interrupts = <47>; 98 loongson,suspend-address = <0x0 0x1c000500>; 99 100 syscon-reboot { 101 compatible = "syscon-reboot"; 102 offset = <0x30>; 103 mask = <0x1>; 104 }; 105 106 syscon-poweroff { 107 compatible = "syscon-poweroff"; 108 regmap = <&pmc>; 109 offset = <0x14>; 110 mask = <0x3c00>; 111 value = <0x3c00>; 112 }; 113 }; 114 115 tsensor: thermal-sensor@1fe01460 { 116 compatible = "loongson,ls2k2000-thermal"; 117 reg = <0x0 0x1fe01460 0x0 0x30>, 118 <0x0 0x1fe0019c 0x0 0x4>; 119 interrupt-parent = <&liointc>; 120 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 121 #thermal-sensor-cells = <1>; 122 }; 123 124 liointc: interrupt-controller@1fe01400 { 125 compatible = "loongson,liointc-1.0"; 126 reg = <0x0 0x1fe01400 0x0 0x64>; 127 128 interrupt-controller; 129 #interrupt-cells = <2>; 130 interrupt-parent = <&cpuintc>; 131 interrupts = <2>; 132 interrupt-names = "int0"; 133 loongson,parent_int_map = <0xffffffff>, /* int0 */ 134 <0x00000000>, /* int1 */ 135 <0x00000000>, /* int2 */ 136 <0x00000000>; /* int3 */ 137 }; 138 139 eiointc: interrupt-controller@1fe01600 { 140 compatible = "loongson,ls2k2000-eiointc"; 141 reg = <0x0 0x1fe01600 0x0 0xea00>; 142 interrupt-controller; 143 #interrupt-cells = <1>; 144 interrupt-parent = <&cpuintc>; 145 interrupts = <3>; 146 }; 147 148 pic: interrupt-controller@10000000 { 149 compatible = "loongson,pch-pic-1.0"; 150 reg = <0x0 0x10000000 0x0 0x400>; 151 interrupt-controller; 152 #interrupt-cells = <2>; 153 loongson,pic-base-vec = <0>; 154 interrupt-parent = <&eiointc>; 155 }; 156 157 msi: msi-controller@1fe01140 { 158 compatible = "loongson,pch-msi-1.0"; 159 reg = <0x0 0x1fe01140 0x0 0x8>; 160 interrupt-controller; 161 #interrupt-cells = <1>; 162 msi-controller; 163 loongson,msi-base-vec = <64>; 164 loongson,msi-num-vecs = <192>; 165 interrupt-parent = <&eiointc>; 166 }; 167 168 pwm@100a0000 { 169 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 170 reg = <0x0 0x100a0000 0x0 0x10>; 171 interrupt-parent = <&pic>; 172 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 173 clocks = <&clk LOONGSON2_MISC_CLK>; 174 #pwm-cells = <3>; 175 status = "disabled"; 176 }; 177 178 pwm@100a0100 { 179 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 180 reg = <0x0 0x100a0100 0x0 0x10>; 181 interrupt-parent = <&pic>; 182 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 183 clocks = <&clk LOONGSON2_MISC_CLK>; 184 #pwm-cells = <3>; 185 status = "disabled"; 186 }; 187 188 pwm@100a0200 { 189 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 190 reg = <0x0 0x100a0200 0x0 0x10>; 191 interrupt-parent = <&pic>; 192 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 193 clocks = <&clk LOONGSON2_MISC_CLK>; 194 #pwm-cells = <3>; 195 status = "disabled"; 196 }; 197 198 pwm@100a0300 { 199 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 200 reg = <0x0 0x100a0300 0x0 0x10>; 201 interrupt-parent = <&pic>; 202 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 203 clocks = <&clk LOONGSON2_MISC_CLK>; 204 #pwm-cells = <3>; 205 status = "disabled"; 206 }; 207 208 pwm@100a0400 { 209 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 210 reg = <0x0 0x100a0400 0x0 0x10>; 211 interrupt-parent = <&pic>; 212 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; 213 clocks = <&clk LOONGSON2_MISC_CLK>; 214 #pwm-cells = <3>; 215 status = "disabled"; 216 }; 217 218 pwm@100a0500 { 219 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 220 reg = <0x0 0x100a0500 0x0 0x10>; 221 interrupt-parent = <&pic>; 222 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 223 clocks = <&clk LOONGSON2_MISC_CLK>; 224 #pwm-cells = <3>; 225 status = "disabled"; 226 }; 227 228 rtc0: rtc@100d0100 { 229 compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc"; 230 reg = <0x0 0x100d0100 0x0 0x100>; 231 interrupt-parent = <&pic>; 232 interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; 233 status = "disabled"; 234 }; 235 236 i2c@1fe00120 { 237 compatible = "loongson,ls2k-i2c"; 238 reg = <0x0 0x1fe00120 0x0 0x8>; 239 interrupt-parent = <&liointc>; 240 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 241 status = "disabled"; 242 }; 243 244 i2c@1fe00130 { 245 compatible = "loongson,ls2k-i2c"; 246 reg = <0x0 0x1fe00130 0x0 0x8>; 247 interrupt-parent = <&liointc>; 248 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; 249 status = "disabled"; 250 }; 251 252 uart0: serial@1fe001e0 { 253 compatible = "ns16550a"; 254 reg = <0x0 0x1fe001e0 0x0 0x10>; 255 clock-frequency = <100000000>; 256 interrupt-parent = <&liointc>; 257 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 258 no-loopback-test; 259 status = "disabled"; 260 }; 261 262 emmc: mmc@79990000 { 263 compatible = "loongson,ls2k2000-mmc"; 264 reg = <0x0 0x79990000 0x0 0x1000>; 265 interrupt-parent = <&pic>; 266 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 267 clocks = <&clk LOONGSON2_EMMC_CLK>; 268 status = "disabled"; 269 }; 270 271 mmc@79991000 { 272 compatible = "loongson,ls2k2000-mmc"; 273 reg = <0x0 0x79991000 0x0 0x1000>; 274 interrupt-parent = <&pic>; 275 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 276 clocks = <&clk LOONGSON2_EMMC_CLK>; 277 status = "disabled"; 278 }; 279 280 pcie@1a000000 { 281 compatible = "loongson,ls2k-pci"; 282 reg = <0x0 0x1a000000 0x0 0x02000000>, 283 <0xfe 0x0 0x0 0x20000000>; 284 #address-cells = <3>; 285 #size-cells = <2>; 286 device_type = "pci"; 287 msi-parent = <&msi>; 288 bus-range = <0x0 0xff>; 289 ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>, 290 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; 291 292 gmac0: ethernet@3,0 { 293 reg = <0x1800 0x0 0x0 0x0 0x0>; 294 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, 295 <13 IRQ_TYPE_LEVEL_HIGH>; 296 interrupt-names = "macirq", "eth_lpi"; 297 interrupt-parent = <&pic>; 298 status = "disabled"; 299 }; 300 301 gmac1: ethernet@3,1 { 302 reg = <0x1900 0x0 0x0 0x0 0x0>; 303 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, 304 <15 IRQ_TYPE_LEVEL_HIGH>; 305 interrupt-names = "macirq", "eth_lpi"; 306 interrupt-parent = <&pic>; 307 status = "disabled"; 308 }; 309 310 gmac2: ethernet@3,2 { 311 reg = <0x1a00 0x0 0x0 0x0 0x0>; 312 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, 313 <18 IRQ_TYPE_LEVEL_HIGH>; 314 interrupt-names = "macirq", "eth_lpi"; 315 interrupt-parent = <&pic>; 316 status = "disabled"; 317 }; 318 319 xhci0: usb@4,0 { 320 reg = <0x2000 0x0 0x0 0x0 0x0>; 321 interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; 322 interrupt-parent = <&pic>; 323 status = "disabled"; 324 }; 325 326 xhci1: usb@19,0 { 327 reg = <0xc800 0x0 0x0 0x0 0x0>; 328 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; 329 interrupt-parent = <&pic>; 330 status = "disabled"; 331 }; 332 333 display@6,1 { 334 reg = <0x3100 0x0 0x0 0x0 0x0>; 335 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 336 interrupt-parent = <&pic>; 337 status = "disabled"; 338 }; 339 340 i2s@7,0 { 341 reg = <0x3800 0x0 0x0 0x0 0x0>; 342 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>, 343 <79 IRQ_TYPE_LEVEL_HIGH>; 344 interrupt-names = "tx", "rx"; 345 interrupt-parent = <&pic>; 346 status = "disabled"; 347 }; 348 349 sata: sata@8,0 { 350 reg = <0x4000 0x0 0x0 0x0 0x0>; 351 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; 352 interrupt-parent = <&pic>; 353 status = "disabled"; 354 }; 355 356 pcie@9,0 { 357 reg = <0x4800 0x0 0x0 0x0 0x0>; 358 #address-cells = <3>; 359 #size-cells = <2>; 360 device_type = "pci"; 361 interrupt-parent = <&pic>; 362 #interrupt-cells = <1>; 363 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 364 interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; 365 ranges; 366 }; 367 368 pcie@a,0 { 369 reg = <0x5000 0x0 0x0 0x0 0x0>; 370 #address-cells = <3>; 371 #size-cells = <2>; 372 device_type = "pci"; 373 interrupt-parent = <&pic>; 374 #interrupt-cells = <1>; 375 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 376 interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; 377 ranges; 378 }; 379 380 pcie@b,0 { 381 reg = <0x5800 0x0 0x0 0x0 0x0>; 382 #address-cells = <3>; 383 #size-cells = <2>; 384 device_type = "pci"; 385 interrupt-parent = <&pic>; 386 #interrupt-cells = <1>; 387 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 388 interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; 389 ranges; 390 }; 391 392 pcie@c,0 { 393 reg = <0x6000 0x0 0x0 0x0 0x0>; 394 #address-cells = <3>; 395 #size-cells = <2>; 396 device_type = "pci"; 397 interrupt-parent = <&pic>; 398 #interrupt-cells = <1>; 399 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 400 interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; 401 ranges; 402 }; 403 404 pcie@d,0 { 405 reg = <0x6800 0x0 0x0 0x0 0x0>; 406 #address-cells = <3>; 407 #size-cells = <2>; 408 device_type = "pci"; 409 interrupt-parent = <&pic>; 410 #interrupt-cells = <1>; 411 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 412 interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; 413 ranges; 414 }; 415 416 pcie@e,0 { 417 reg = <0x7000 0x0 0x0 0x0 0x0>; 418 #address-cells = <3>; 419 #size-cells = <2>; 420 device_type = "pci"; 421 interrupt-parent = <&pic>; 422 #interrupt-cells = <1>; 423 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 424 interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; 425 ranges; 426 }; 427 428 pcie@f,0 { 429 reg = <0x7800 0x0 0x0 0x0 0x0>; 430 #address-cells = <3>; 431 #size-cells = <2>; 432 device_type = "pci"; 433 interrupt-parent = <&pic>; 434 #interrupt-cells = <1>; 435 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 436 interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; 437 ranges; 438 }; 439 440 pcie@10,0 { 441 reg = <0x8000 0x0 0x0 0x0 0x0>; 442 #address-cells = <3>; 443 #size-cells = <2>; 444 device_type = "pci"; 445 interrupt-parent = <&pic>; 446 #interrupt-cells = <1>; 447 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 448 interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>; 449 ranges; 450 }; 451 }; 452 }; 453}; 454