1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@1 { 20 compatible = "loongson,la364"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 24 }; 25 26 cpu1: cpu@2 { 27 compatible = "loongson,la364"; 28 device_type = "cpu"; 29 reg = <0x1>; 30 clocks = <&clk LOONGSON2_NODE_CLK>; 31 }; 32 }; 33 34 ref_100m: clock-ref-100m { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <100000000>; 38 clock-output-names = "ref_100m"; 39 }; 40 41 cpuintc: interrupt-controller { 42 compatible = "loongson,cpu-interrupt-controller"; 43 #interrupt-cells = <1>; 44 interrupt-controller; 45 }; 46 47 thermal-zones { 48 cpu-thermal { 49 polling-delay-passive = <1000>; 50 polling-delay = <5000>; 51 thermal-sensors = <&tsensor 0>; 52 53 trips { 54 cpu-alert { 55 temperature = <40000>; 56 hysteresis = <2000>; 57 type = "active"; 58 }; 59 60 cpu-crit { 61 temperature = <85000>; 62 hysteresis = <5000>; 63 type = "critical"; 64 }; 65 }; 66 }; 67 }; 68 69 bus@10000000 { 70 compatible = "simple-bus"; 71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 75 #address-cells = <2>; 76 #size-cells = <2>; 77 78 isa@18400000 { 79 compatible = "isa"; 80 #size-cells = <1>; 81 #address-cells = <2>; 82 ranges = <1 0x0 0x0 0x18400000 0x4000>; 83 }; 84 85 clk: clock-controller@10010480 { 86 compatible = "loongson,ls2k2000-clk"; 87 reg = <0x0 0x10010480 0x0 0x100>; 88 #clock-cells = <1>; 89 clocks = <&ref_100m>; 90 clock-names = "ref_100m"; 91 }; 92 93 pmc: power-management@100d0000 { 94 compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon"; 95 reg = <0x0 0x100d0000 0x0 0x58>; 96 interrupt-parent = <&eiointc>; 97 interrupts = <47>; 98 loongson,suspend-address = <0x0 0x1c000500>; 99 100 syscon-reboot { 101 compatible = "syscon-reboot"; 102 offset = <0x30>; 103 mask = <0x1>; 104 }; 105 106 syscon-poweroff { 107 compatible = "syscon-poweroff"; 108 regmap = <&pmc>; 109 offset = <0x14>; 110 mask = <0x3c00>; 111 value = <0x3c00>; 112 }; 113 }; 114 115 tsensor: thermal-sensor@1fe01460 { 116 compatible = "loongson,ls2k2000-thermal"; 117 reg = <0x0 0x1fe01460 0x0 0x30>, 118 <0x0 0x1fe0019c 0x0 0x4>; 119 interrupt-parent = <&liointc>; 120 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 121 #thermal-sensor-cells = <1>; 122 }; 123 124 liointc: interrupt-controller@1fe01400 { 125 compatible = "loongson,liointc-1.0"; 126 reg = <0x0 0x1fe01400 0x0 0x64>; 127 128 interrupt-controller; 129 #interrupt-cells = <2>; 130 interrupt-parent = <&cpuintc>; 131 interrupts = <2>; 132 interrupt-names = "int0"; 133 loongson,parent_int_map = <0xffffffff>, /* int0 */ 134 <0x00000000>, /* int1 */ 135 <0x00000000>, /* int2 */ 136 <0x00000000>; /* int3 */ 137 }; 138 139 eiointc: interrupt-controller@1fe01600 { 140 compatible = "loongson,ls2k2000-eiointc"; 141 reg = <0x0 0x1fe01600 0x0 0xea00>; 142 interrupt-controller; 143 #interrupt-cells = <1>; 144 interrupt-parent = <&cpuintc>; 145 interrupts = <3>; 146 }; 147 148 pic: interrupt-controller@10000000 { 149 compatible = "loongson,pch-pic-1.0"; 150 reg = <0x0 0x10000000 0x0 0x400>; 151 interrupt-controller; 152 #interrupt-cells = <2>; 153 loongson,pic-base-vec = <0>; 154 interrupt-parent = <&eiointc>; 155 }; 156 157 msi: msi-controller@1fe01140 { 158 compatible = "loongson,pch-msi-1.0"; 159 reg = <0x0 0x1fe01140 0x0 0x8>; 160 interrupt-controller; 161 #interrupt-cells = <1>; 162 msi-controller; 163 loongson,msi-base-vec = <64>; 164 loongson,msi-num-vecs = <192>; 165 interrupt-parent = <&eiointc>; 166 }; 167 168 rtc0: rtc@100d0100 { 169 compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc"; 170 reg = <0x0 0x100d0100 0x0 0x100>; 171 interrupt-parent = <&pic>; 172 interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; 173 status = "disabled"; 174 }; 175 176 i2c@1fe00120 { 177 compatible = "loongson,ls2k-i2c"; 178 reg = <0x0 0x1fe00120 0x0 0x8>; 179 interrupt-parent = <&liointc>; 180 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 181 status = "disabled"; 182 }; 183 184 i2c@1fe00130 { 185 compatible = "loongson,ls2k-i2c"; 186 reg = <0x0 0x1fe00130 0x0 0x8>; 187 interrupt-parent = <&liointc>; 188 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; 189 status = "disabled"; 190 }; 191 192 uart0: serial@1fe001e0 { 193 compatible = "ns16550a"; 194 reg = <0x0 0x1fe001e0 0x0 0x10>; 195 clock-frequency = <100000000>; 196 interrupt-parent = <&liointc>; 197 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 198 no-loopback-test; 199 status = "disabled"; 200 }; 201 202 pcie@1a000000 { 203 compatible = "loongson,ls2k-pci"; 204 reg = <0x0 0x1a000000 0x0 0x02000000>, 205 <0xfe 0x0 0x0 0x20000000>; 206 #address-cells = <3>; 207 #size-cells = <2>; 208 device_type = "pci"; 209 msi-parent = <&msi>; 210 bus-range = <0x0 0xff>; 211 ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>, 212 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; 213 214 gmac0: ethernet@3,0 { 215 reg = <0x1800 0x0 0x0 0x0 0x0>; 216 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, 217 <13 IRQ_TYPE_LEVEL_HIGH>; 218 interrupt-names = "macirq", "eth_lpi"; 219 interrupt-parent = <&pic>; 220 status = "disabled"; 221 }; 222 223 gmac1: ethernet@3,1 { 224 reg = <0x1900 0x0 0x0 0x0 0x0>; 225 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, 226 <15 IRQ_TYPE_LEVEL_HIGH>; 227 interrupt-names = "macirq", "eth_lpi"; 228 interrupt-parent = <&pic>; 229 status = "disabled"; 230 }; 231 232 gmac2: ethernet@3,2 { 233 reg = <0x1a00 0x0 0x0 0x0 0x0>; 234 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, 235 <18 IRQ_TYPE_LEVEL_HIGH>; 236 interrupt-names = "macirq", "eth_lpi"; 237 interrupt-parent = <&pic>; 238 status = "disabled"; 239 }; 240 241 xhci0: usb@4,0 { 242 reg = <0x2000 0x0 0x0 0x0 0x0>; 243 interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; 244 interrupt-parent = <&pic>; 245 status = "disabled"; 246 }; 247 248 xhci1: usb@19,0 { 249 reg = <0xc800 0x0 0x0 0x0 0x0>; 250 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; 251 interrupt-parent = <&pic>; 252 status = "disabled"; 253 }; 254 255 display@6,1 { 256 reg = <0x3100 0x0 0x0 0x0 0x0>; 257 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 258 interrupt-parent = <&pic>; 259 status = "disabled"; 260 }; 261 262 i2s@7,0 { 263 reg = <0x3800 0x0 0x0 0x0 0x0>; 264 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>, 265 <79 IRQ_TYPE_LEVEL_HIGH>; 266 interrupt-names = "tx", "rx"; 267 interrupt-parent = <&pic>; 268 status = "disabled"; 269 }; 270 271 sata: sata@8,0 { 272 reg = <0x4000 0x0 0x0 0x0 0x0>; 273 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; 274 interrupt-parent = <&pic>; 275 status = "disabled"; 276 }; 277 278 pcie@9,0 { 279 reg = <0x4800 0x0 0x0 0x0 0x0>; 280 #address-cells = <3>; 281 #size-cells = <2>; 282 device_type = "pci"; 283 interrupt-parent = <&pic>; 284 #interrupt-cells = <1>; 285 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 286 interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; 287 ranges; 288 }; 289 290 pcie@a,0 { 291 reg = <0x5000 0x0 0x0 0x0 0x0>; 292 #address-cells = <3>; 293 #size-cells = <2>; 294 device_type = "pci"; 295 interrupt-parent = <&pic>; 296 #interrupt-cells = <1>; 297 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 298 interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; 299 ranges; 300 }; 301 302 pcie@b,0 { 303 reg = <0x5800 0x0 0x0 0x0 0x0>; 304 #address-cells = <3>; 305 #size-cells = <2>; 306 device_type = "pci"; 307 interrupt-parent = <&pic>; 308 #interrupt-cells = <1>; 309 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 310 interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; 311 ranges; 312 }; 313 314 pcie@c,0 { 315 reg = <0x6000 0x0 0x0 0x0 0x0>; 316 #address-cells = <3>; 317 #size-cells = <2>; 318 device_type = "pci"; 319 interrupt-parent = <&pic>; 320 #interrupt-cells = <1>; 321 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 322 interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; 323 ranges; 324 }; 325 326 pcie@d,0 { 327 reg = <0x6800 0x0 0x0 0x0 0x0>; 328 #address-cells = <3>; 329 #size-cells = <2>; 330 device_type = "pci"; 331 interrupt-parent = <&pic>; 332 #interrupt-cells = <1>; 333 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 334 interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; 335 ranges; 336 }; 337 338 pcie@e,0 { 339 reg = <0x7000 0x0 0x0 0x0 0x0>; 340 #address-cells = <3>; 341 #size-cells = <2>; 342 device_type = "pci"; 343 interrupt-parent = <&pic>; 344 #interrupt-cells = <1>; 345 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 346 interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; 347 ranges; 348 }; 349 350 pcie@f,0 { 351 reg = <0x7800 0x0 0x0 0x0 0x0>; 352 #address-cells = <3>; 353 #size-cells = <2>; 354 device_type = "pci"; 355 interrupt-parent = <&pic>; 356 #interrupt-cells = <1>; 357 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 358 interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; 359 ranges; 360 }; 361 362 pcie@10,0 { 363 reg = <0x8000 0x0 0x0 0x0 0x0>; 364 #address-cells = <3>; 365 #size-cells = <2>; 366 device_type = "pci"; 367 interrupt-parent = <&pic>; 368 #interrupt-cells = <1>; 369 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 370 interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>; 371 ranges; 372 }; 373 }; 374 }; 375}; 376