1# SPDX-License-Identifier: GPL-2.0 2config LOONGARCH 3 bool 4 default y 5 select ACPI 6 select ACPI_GENERIC_GSI if ACPI 7 select ACPI_MCFG if ACPI 8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 9 select ACPI_PPTT if ACPI 10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 11 select ARCH_BINFMT_ELF_STATE 12 select ARCH_DISABLE_KASAN_INLINE 13 select ARCH_ENABLE_MEMORY_HOTPLUG 14 select ARCH_ENABLE_MEMORY_HOTREMOVE 15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 17 select ARCH_HAS_CPU_FINALIZE_INIT 18 select ARCH_HAS_FORTIFY_SOURCE 19 select ARCH_HAS_KCOV 20 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 21 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 22 select ARCH_HAS_PTE_SPECIAL 23 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 24 select ARCH_INLINE_READ_LOCK if !PREEMPTION 25 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 26 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 27 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 28 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 29 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 30 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 31 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 32 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 33 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 34 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 35 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 36 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 37 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 38 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 39 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 40 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 41 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 42 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 43 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 44 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 45 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 46 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 47 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 48 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 49 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 50 select ARCH_KEEP_MEMBLOCK 51 select ARCH_MIGHT_HAVE_PC_PARPORT 52 select ARCH_MIGHT_HAVE_PC_SERIO 53 select ARCH_SPARSEMEM_ENABLE 54 select ARCH_STACKWALK 55 select ARCH_SUPPORTS_ACPI 56 select ARCH_SUPPORTS_ATOMIC_RMW 57 select ARCH_SUPPORTS_HUGETLBFS 58 select ARCH_SUPPORTS_LTO_CLANG 59 select ARCH_SUPPORTS_LTO_CLANG_THIN 60 select ARCH_SUPPORTS_NUMA_BALANCING 61 select ARCH_USE_BUILTIN_BSWAP 62 select ARCH_USE_CMPXCHG_LOCKREF 63 select ARCH_USE_QUEUED_RWLOCKS 64 select ARCH_USE_QUEUED_SPINLOCKS 65 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 66 select ARCH_WANT_LD_ORPHAN_WARN 67 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 68 select ARCH_WANTS_NO_INSTR 69 select BUILDTIME_TABLE_SORT 70 select COMMON_CLK 71 select CPU_PM 72 select EFI 73 select GENERIC_CLOCKEVENTS 74 select GENERIC_CMOS_UPDATE 75 select GENERIC_CPU_AUTOPROBE 76 select GENERIC_CPU_DEVICES 77 select GENERIC_ENTRY 78 select GENERIC_GETTIMEOFDAY 79 select GENERIC_IOREMAP if !ARCH_IOREMAP 80 select GENERIC_IRQ_MULTI_HANDLER 81 select GENERIC_IRQ_PROBE 82 select GENERIC_IRQ_SHOW 83 select GENERIC_LIB_ASHLDI3 84 select GENERIC_LIB_ASHRDI3 85 select GENERIC_LIB_CMPDI2 86 select GENERIC_LIB_LSHRDI3 87 select GENERIC_LIB_UCMPDI2 88 select GENERIC_LIB_DEVMEM_IS_ALLOWED 89 select GENERIC_PCI_IOMAP 90 select GENERIC_SCHED_CLOCK 91 select GENERIC_SMP_IDLE_THREAD 92 select GENERIC_TIME_VSYSCALL 93 select GENERIC_VDSO_TIME_NS 94 select GPIOLIB 95 select HAS_IOPORT 96 select HAVE_ARCH_AUDITSYSCALL 97 select HAVE_ARCH_JUMP_LABEL 98 select HAVE_ARCH_JUMP_LABEL_RELATIVE 99 select HAVE_ARCH_KASAN 100 select HAVE_ARCH_KFENCE 101 select HAVE_ARCH_KGDB if PERF_EVENTS 102 select HAVE_ARCH_MMAP_RND_BITS if MMU 103 select HAVE_ARCH_SECCOMP 104 select HAVE_ARCH_SECCOMP_FILTER 105 select HAVE_ARCH_TRACEHOOK 106 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 107 select HAVE_ASM_MODVERSIONS 108 select HAVE_CONTEXT_TRACKING_USER 109 select HAVE_C_RECORDMCOUNT 110 select HAVE_DEBUG_KMEMLEAK 111 select HAVE_DEBUG_STACKOVERFLOW 112 select HAVE_DMA_CONTIGUOUS 113 select HAVE_DYNAMIC_FTRACE 114 select HAVE_DYNAMIC_FTRACE_WITH_ARGS 115 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 116 select HAVE_DYNAMIC_FTRACE_WITH_REGS 117 select HAVE_EBPF_JIT 118 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN 119 select HAVE_EXIT_THREAD 120 select HAVE_FAST_GUP 121 select HAVE_FTRACE_MCOUNT_RECORD 122 select HAVE_FUNCTION_ARG_ACCESS_API 123 select HAVE_FUNCTION_ERROR_INJECTION 124 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 125 select HAVE_FUNCTION_GRAPH_TRACER 126 select HAVE_FUNCTION_TRACER 127 select HAVE_GCC_PLUGINS 128 select HAVE_GENERIC_VDSO 129 select HAVE_HW_BREAKPOINT if PERF_EVENTS 130 select HAVE_IOREMAP_PROT 131 select HAVE_IRQ_EXIT_ON_IRQ_STACK 132 select HAVE_IRQ_TIME_ACCOUNTING 133 select HAVE_KPROBES 134 select HAVE_KPROBES_ON_FTRACE 135 select HAVE_KRETPROBES 136 select HAVE_MOD_ARCH_SPECIFIC 137 select HAVE_NMI 138 select HAVE_PCI 139 select HAVE_PERF_EVENTS 140 select HAVE_PERF_REGS 141 select HAVE_PERF_USER_STACK_DUMP 142 select HAVE_PREEMPT_DYNAMIC_KEY 143 select HAVE_REGS_AND_STACK_ACCESS_API 144 select HAVE_RETHOOK 145 select HAVE_RSEQ 146 select HAVE_RUST 147 select HAVE_SAMPLE_FTRACE_DIRECT 148 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 149 select HAVE_SETUP_PER_CPU_AREA if NUMA 150 select HAVE_STACKPROTECTOR 151 select HAVE_SYSCALL_TRACEPOINTS 152 select HAVE_TIF_NOHZ 153 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP 154 select IRQ_FORCED_THREADING 155 select IRQ_LOONGARCH_CPU 156 select LOCK_MM_AND_FIND_VMA 157 select MMU_GATHER_MERGE_VMAS if MMU 158 select MODULES_USE_ELF_RELA if MODULES 159 select NEED_PER_CPU_EMBED_FIRST_CHUNK 160 select NEED_PER_CPU_PAGE_FIRST_CHUNK 161 select OF 162 select OF_EARLY_FLATTREE 163 select PCI 164 select PCI_DOMAINS_GENERIC 165 select PCI_ECAM if ACPI 166 select PCI_LOONGSON 167 select PCI_MSI_ARCH_FALLBACKS 168 select PCI_QUIRKS 169 select PERF_USE_VMALLOC 170 select RTC_LIB 171 select SMP 172 select SPARSE_IRQ 173 select SYSCTL_ARCH_UNALIGN_ALLOW 174 select SYSCTL_ARCH_UNALIGN_NO_WARN 175 select SYSCTL_EXCEPTION_TRACE 176 select SWIOTLB 177 select TRACE_IRQFLAGS_SUPPORT 178 select USE_PERCPU_NUMA_NODE_ID 179 select USER_STACKTRACE_SUPPORT 180 select ZONE_DMA32 181 182config 32BIT 183 bool 184 185config 64BIT 186 def_bool y 187 188config GENERIC_BUG 189 def_bool y 190 depends on BUG 191 192config GENERIC_BUG_RELATIVE_POINTERS 193 def_bool y 194 depends on GENERIC_BUG 195 196config GENERIC_CALIBRATE_DELAY 197 def_bool y 198 199config GENERIC_CSUM 200 def_bool y 201 202config GENERIC_HWEIGHT 203 def_bool y 204 205config L1_CACHE_SHIFT 206 int 207 default "6" 208 209config LOCKDEP_SUPPORT 210 bool 211 default y 212 213config STACKTRACE_SUPPORT 214 bool 215 default y 216 217# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the 218# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that 219# are shared between architectures, and specifically expecting the symbols. 220config MACH_LOONGSON32 221 def_bool 32BIT 222 223config MACH_LOONGSON64 224 def_bool 64BIT 225 226config FIX_EARLYCON_MEM 227 def_bool y 228 229config PGTABLE_2LEVEL 230 bool 231 232config PGTABLE_3LEVEL 233 bool 234 235config PGTABLE_4LEVEL 236 bool 237 238config PGTABLE_LEVELS 239 int 240 default 2 if PGTABLE_2LEVEL 241 default 3 if PGTABLE_3LEVEL 242 default 4 if PGTABLE_4LEVEL 243 244config SCHED_OMIT_FRAME_POINTER 245 bool 246 default y 247 248config AS_HAS_EXPLICIT_RELOCS 249 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) 250 251config AS_HAS_FCSR_CLASS 252 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 253 254config AS_HAS_LSX_EXTENSION 255 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) 256 257config AS_HAS_LASX_EXTENSION 258 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) 259 260config AS_HAS_LBT_EXTENSION 261 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) 262 263config AS_HAS_LVZ_EXTENSION 264 def_bool $(as-instr,hvcl 0) 265 266menu "Kernel type and options" 267 268source "kernel/Kconfig.hz" 269 270choice 271 prompt "Page Table Layout" 272 default 16KB_2LEVEL if 32BIT 273 default 16KB_3LEVEL if 64BIT 274 help 275 Allows choosing the page table layout, which is a combination 276 of page size and page table levels. The size of virtual memory 277 address space are determined by the page table layout. 278 279config 4KB_3LEVEL 280 bool "4KB with 3 levels" 281 select HAVE_PAGE_SIZE_4KB 282 select PGTABLE_3LEVEL 283 help 284 This option selects 4KB page size with 3 level page tables, which 285 support a maximum of 39 bits of application virtual memory. 286 287config 4KB_4LEVEL 288 bool "4KB with 4 levels" 289 select HAVE_PAGE_SIZE_4KB 290 select PGTABLE_4LEVEL 291 help 292 This option selects 4KB page size with 4 level page tables, which 293 support a maximum of 48 bits of application virtual memory. 294 295config 16KB_2LEVEL 296 bool "16KB with 2 levels" 297 select HAVE_PAGE_SIZE_16KB 298 select PGTABLE_2LEVEL 299 help 300 This option selects 16KB page size with 2 level page tables, which 301 support a maximum of 36 bits of application virtual memory. 302 303config 16KB_3LEVEL 304 bool "16KB with 3 levels" 305 select HAVE_PAGE_SIZE_16KB 306 select PGTABLE_3LEVEL 307 help 308 This option selects 16KB page size with 3 level page tables, which 309 support a maximum of 47 bits of application virtual memory. 310 311config 64KB_2LEVEL 312 bool "64KB with 2 levels" 313 select HAVE_PAGE_SIZE_64KB 314 select PGTABLE_2LEVEL 315 help 316 This option selects 64KB page size with 2 level page tables, which 317 support a maximum of 42 bits of application virtual memory. 318 319config 64KB_3LEVEL 320 bool "64KB with 3 levels" 321 select HAVE_PAGE_SIZE_64KB 322 select PGTABLE_3LEVEL 323 help 324 This option selects 64KB page size with 3 level page tables, which 325 support a maximum of 55 bits of application virtual memory. 326 327endchoice 328 329config CMDLINE 330 string "Built-in kernel command line" 331 help 332 For most platforms, the arguments for the kernel's command line 333 are provided at run-time, during boot. However, there are cases 334 where either no arguments are being provided or the provided 335 arguments are insufficient or even invalid. 336 337 When that occurs, it is possible to define a built-in command 338 line here and choose how the kernel should use it later on. 339 340choice 341 prompt "Kernel command line type" 342 default CMDLINE_BOOTLOADER 343 help 344 Choose how the kernel will handle the provided built-in command 345 line. 346 347config CMDLINE_BOOTLOADER 348 bool "Use bootloader kernel arguments if available" 349 help 350 Prefer the command-line passed by the boot loader if available. 351 Use the built-in command line as fallback in case we get nothing 352 during boot. This is the default behaviour. 353 354config CMDLINE_EXTEND 355 bool "Use built-in to extend bootloader kernel arguments" 356 help 357 The command-line arguments provided during boot will be 358 appended to the built-in command line. This is useful in 359 cases where the provided arguments are insufficient and 360 you don't want to or cannot modify them. 361 362config CMDLINE_FORCE 363 bool "Always use the built-in kernel command string" 364 help 365 Always use the built-in command line, even if we get one during 366 boot. This is useful in case you need to override the provided 367 command line on systems where you don't have or want control 368 over it. 369 370endchoice 371 372config BUILTIN_DTB 373 bool "Enable built-in dtb in kernel" 374 depends on OF 375 help 376 Some existing systems do not provide a canonical device tree to 377 the kernel at boot time. Let's provide a device tree table in the 378 kernel, keyed by the dts filename, containing the relevant DTBs. 379 380 Built-in DTBs are generic enough and can be used as references. 381 382config BUILTIN_DTB_NAME 383 string "Source file for built-in dtb" 384 depends on BUILTIN_DTB 385 help 386 Base name (without suffix, relative to arch/loongarch/boot/dts/) 387 for the DTS file that will be used to produce the DTB linked into 388 the kernel. 389 390config DMI 391 bool "Enable DMI scanning" 392 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 393 default y 394 help 395 This enables SMBIOS/DMI feature for systems, and scanning of 396 DMI to identify machine quirks. 397 398config EFI 399 bool "EFI runtime service support" 400 select UCS2_STRING 401 select EFI_RUNTIME_WRAPPERS 402 help 403 This enables the kernel to use EFI runtime services that are 404 available (such as the EFI variable services). 405 406config EFI_STUB 407 bool "EFI boot stub support" 408 default y 409 depends on EFI 410 select EFI_GENERIC_STUB 411 help 412 This kernel feature allows the kernel to be loaded directly by 413 EFI firmware without the use of a bootloader. 414 415config SCHED_SMT 416 bool "SMT scheduler support" 417 default y 418 help 419 Improves scheduler's performance when there are multiple 420 threads in one physical core. 421 422config SMP 423 bool "Multi-Processing support" 424 help 425 This enables support for systems with more than one CPU. If you have 426 a system with only one CPU, say N. If you have a system with more 427 than one CPU, say Y. 428 429 If you say N here, the kernel will run on uni- and multiprocessor 430 machines, but will use only one CPU of a multiprocessor machine. If 431 you say Y here, the kernel will run on many, but not all, 432 uniprocessor machines. On a uniprocessor machine, the kernel 433 will run faster if you say N here. 434 435 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. 436 437 If you don't know what to do here, say N. 438 439config HOTPLUG_CPU 440 bool "Support for hot-pluggable CPUs" 441 depends on SMP 442 select GENERIC_IRQ_MIGRATION 443 help 444 Say Y here to allow turning CPUs off and on. CPUs can be 445 controlled through /sys/devices/system/cpu. 446 (Note: power management support will enable this option 447 automatically on SMP systems. ) 448 Say N if you want to disable CPU hotplug. 449 450config NR_CPUS 451 int "Maximum number of CPUs (2-256)" 452 range 2 256 453 depends on SMP 454 default "64" 455 help 456 This allows you to specify the maximum number of CPUs which this 457 kernel will support. 458 459config NUMA 460 bool "NUMA Support" 461 select SMP 462 select ACPI_NUMA if ACPI 463 help 464 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access) 465 support. This option improves performance on systems with more 466 than one NUMA node; on single node systems it is generally better 467 to leave it disabled. 468 469config NODES_SHIFT 470 int 471 default "6" 472 depends on NUMA 473 474config ARCH_FORCE_MAX_ORDER 475 int "Maximum zone order" 476 default "13" if PAGE_SIZE_64KB 477 default "11" if PAGE_SIZE_16KB 478 default "10" 479 help 480 The kernel memory allocator divides physically contiguous memory 481 blocks into "zones", where each zone is a power of two number of 482 pages. This option selects the largest power of two that the kernel 483 keeps in the memory allocator. If you need to allocate very large 484 blocks of physically contiguous memory, then you may need to 485 increase this value. 486 487 The page size is not necessarily 4KB. Keep this in mind 488 when choosing a value for this option. 489 490config ARCH_IOREMAP 491 bool "Enable LoongArch DMW-based ioremap()" 492 help 493 We use generic TLB-based ioremap() by default since it has page 494 protection support. However, you can enable LoongArch DMW-based 495 ioremap() for better performance. 496 497config ARCH_WRITECOMBINE 498 bool "Enable WriteCombine (WUC) for ioremap()" 499 help 500 LoongArch maintains cache coherency in hardware, but when paired 501 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which 502 is similar to WriteCombine) is out of the scope of cache coherency 503 machanism for PCIe devices (this is a PCIe protocol violation, which 504 may be fixed in newer chipsets). 505 506 This means WUC can only used for write-only memory regions now, so 507 this option is disabled by default, making WUC silently fallback to 508 SUC for ioremap(). You can enable this option if the kernel is ensured 509 to run on hardware without this bug. 510 511 You can override this setting via writecombine=on/off boot parameter. 512 513config ARCH_STRICT_ALIGN 514 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT 515 default y 516 help 517 Not all LoongArch cores support h/w unaligned access, we can use 518 -mstrict-align build parameter to prevent unaligned accesses. 519 520 CPUs with h/w unaligned access support: 521 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000. 522 523 CPUs without h/w unaligned access support: 524 Loongson-2K500/2K1000. 525 526 This option is enabled by default to make the kernel be able to run 527 on all LoongArch systems. But you can disable it manually if you want 528 to run kernel only on systems with h/w unaligned access support in 529 order to optimise for performance. 530 531config CPU_HAS_FPU 532 bool 533 default y 534 535config CPU_HAS_LSX 536 bool "Support for the Loongson SIMD Extension" 537 depends on AS_HAS_LSX_EXTENSION 538 help 539 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers 540 and a set of SIMD instructions to operate on them. When this option 541 is enabled the kernel will support allocating & switching LSX 542 vector register contexts. If you know that your kernel will only be 543 running on CPUs which do not support LSX or that your userland will 544 not be making use of it then you may wish to say N here to reduce 545 the size & complexity of your kernel. 546 547 If unsure, say Y. 548 549config CPU_HAS_LASX 550 bool "Support for the Loongson Advanced SIMD Extension" 551 depends on CPU_HAS_LSX 552 depends on AS_HAS_LASX_EXTENSION 553 help 554 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector 555 registers and a set of SIMD instructions to operate on them. When this 556 option is enabled the kernel will support allocating & switching LASX 557 vector register contexts. If you know that your kernel will only be 558 running on CPUs which do not support LASX or that your userland will 559 not be making use of it then you may wish to say N here to reduce 560 the size & complexity of your kernel. 561 562 If unsure, say Y. 563 564config CPU_HAS_LBT 565 bool "Support for the Loongson Binary Translation Extension" 566 depends on AS_HAS_LBT_EXTENSION 567 help 568 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 569 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). 570 Enabling this option allows the kernel to allocate and switch registers 571 specific to LBT. 572 573 If you want to use this feature, such as the Loongson Architecture 574 Translator (LAT), say Y. 575 576config CPU_HAS_PREFETCH 577 bool 578 default y 579 580config ARCH_SUPPORTS_KEXEC 581 def_bool y 582 583config ARCH_SUPPORTS_CRASH_DUMP 584 def_bool y 585 586config ARCH_SELECTS_CRASH_DUMP 587 def_bool y 588 depends on CRASH_DUMP 589 select RELOCATABLE 590 591config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 592 def_bool CRASH_CORE 593 594config RELOCATABLE 595 bool "Relocatable kernel" 596 help 597 This builds the kernel as a Position Independent Executable (PIE), 598 which retains all relocation metadata required, so as to relocate 599 the kernel binary at runtime to a different virtual address from 600 its link address. 601 602config RANDOMIZE_BASE 603 bool "Randomize the address of the kernel (KASLR)" 604 depends on RELOCATABLE 605 help 606 Randomizes the physical and virtual address at which the 607 kernel image is loaded, as a security feature that 608 deters exploit attempts relying on knowledge of the location 609 of kernel internals. 610 611 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 612 613 If unsure, say N. 614 615config RANDOMIZE_BASE_MAX_OFFSET 616 hex "Maximum KASLR offset" if EXPERT 617 depends on RANDOMIZE_BASE 618 range 0x0 0x10000000 619 default "0x01000000" 620 help 621 When KASLR is active, this provides the maximum offset that will 622 be applied to the kernel image. It should be set according to the 623 amount of physical RAM available in the target system. 624 625 This is limited by the size of the lower address memory, 256MB. 626 627endmenu 628 629config ARCH_SELECT_MEMORY_MODEL 630 def_bool y 631 632config ARCH_FLATMEM_ENABLE 633 def_bool y 634 depends on !NUMA 635 636config ARCH_SPARSEMEM_ENABLE 637 def_bool y 638 select SPARSEMEM_VMEMMAP_ENABLE 639 help 640 Say Y to support efficient handling of sparse physical memory, 641 for architectures which are either NUMA (Non-Uniform Memory Access) 642 or have huge holes in the physical address space for other reasons. 643 See <file:Documentation/mm/numa.rst> for more. 644 645config ARCH_MEMORY_PROBE 646 def_bool y 647 depends on MEMORY_HOTPLUG 648 649config MMU 650 bool 651 default y 652 653config ARCH_MMAP_RND_BITS_MIN 654 default 12 655 656config ARCH_MMAP_RND_BITS_MAX 657 default 18 658 659config ARCH_SUPPORTS_UPROBES 660 def_bool y 661 662config KASAN_SHADOW_OFFSET 663 hex 664 default 0x0 665 depends on KASAN 666 667menu "Power management options" 668 669config ARCH_SUSPEND_POSSIBLE 670 def_bool y 671 672config ARCH_HIBERNATION_POSSIBLE 673 def_bool y 674 675source "kernel/power/Kconfig" 676source "drivers/acpi/Kconfig" 677 678endmenu 679 680source "arch/loongarch/kvm/Kconfig" 681