1# SPDX-License-Identifier: GPL-2.0 2config LOONGARCH 3 bool 4 default y 5 select ACPI 6 select ACPI_GENERIC_GSI if ACPI 7 select ACPI_MCFG if ACPI 8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 9 select ACPI_PPTT if ACPI 10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 11 select ARCH_BINFMT_ELF_STATE 12 select ARCH_DISABLE_KASAN_INLINE 13 select ARCH_ENABLE_MEMORY_HOTPLUG 14 select ARCH_ENABLE_MEMORY_HOTREMOVE 15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 17 select ARCH_HAS_CPU_FINALIZE_INIT 18 select ARCH_HAS_CURRENT_STACK_POINTER 19 select ARCH_HAS_DEBUG_VM_PGTABLE 20 select ARCH_HAS_FAST_MULTIPLIER 21 select ARCH_HAS_FORTIFY_SOURCE 22 select ARCH_HAS_KCOV 23 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU 24 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 25 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 26 select ARCH_HAS_PTE_DEVMAP 27 select ARCH_HAS_PTE_SPECIAL 28 select ARCH_HAS_SET_MEMORY 29 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 30 select ARCH_INLINE_READ_LOCK if !PREEMPTION 31 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 32 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 33 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 34 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 35 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 36 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 37 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 38 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 39 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 40 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 41 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 42 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 43 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 44 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 45 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 46 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 47 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 48 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 49 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 50 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 51 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 52 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 53 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 54 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 55 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 56 select ARCH_KEEP_MEMBLOCK 57 select ARCH_MIGHT_HAVE_PC_PARPORT 58 select ARCH_MIGHT_HAVE_PC_SERIO 59 select ARCH_SPARSEMEM_ENABLE 60 select ARCH_STACKWALK 61 select ARCH_SUPPORTS_ACPI 62 select ARCH_SUPPORTS_ATOMIC_RMW 63 select ARCH_SUPPORTS_HUGETLBFS 64 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 65 select ARCH_SUPPORTS_LTO_CLANG 66 select ARCH_SUPPORTS_LTO_CLANG_THIN 67 select ARCH_SUPPORTS_NUMA_BALANCING 68 select ARCH_USE_BUILTIN_BSWAP 69 select ARCH_USE_CMPXCHG_LOCKREF 70 select ARCH_USE_QUEUED_RWLOCKS 71 select ARCH_USE_QUEUED_SPINLOCKS 72 select ARCH_WANT_DEFAULT_BPF_JIT 73 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 74 select ARCH_WANT_LD_ORPHAN_WARN 75 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 76 select ARCH_WANTS_NO_INSTR 77 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 78 select BUILDTIME_TABLE_SORT 79 select COMMON_CLK 80 select CPU_PM 81 select EFI 82 select GENERIC_CLOCKEVENTS 83 select GENERIC_CMOS_UPDATE 84 select GENERIC_CPU_AUTOPROBE 85 select GENERIC_CPU_DEVICES 86 select GENERIC_CPU_VULNERABILITIES 87 select GENERIC_ENTRY 88 select GENERIC_GETTIMEOFDAY 89 select GENERIC_IOREMAP if !ARCH_IOREMAP 90 select GENERIC_IRQ_MATRIX_ALLOCATOR 91 select GENERIC_IRQ_MULTI_HANDLER 92 select GENERIC_IRQ_PROBE 93 select GENERIC_IRQ_SHOW 94 select GENERIC_LIB_ASHLDI3 95 select GENERIC_LIB_ASHRDI3 96 select GENERIC_LIB_CMPDI2 97 select GENERIC_LIB_LSHRDI3 98 select GENERIC_LIB_UCMPDI2 99 select GENERIC_LIB_DEVMEM_IS_ALLOWED 100 select GENERIC_PCI_IOMAP 101 select GENERIC_SCHED_CLOCK 102 select GENERIC_SMP_IDLE_THREAD 103 select GENERIC_TIME_VSYSCALL 104 select GENERIC_VDSO_TIME_NS 105 select GPIOLIB 106 select HAS_IOPORT 107 select HAVE_ARCH_AUDITSYSCALL 108 select HAVE_ARCH_JUMP_LABEL 109 select HAVE_ARCH_JUMP_LABEL_RELATIVE 110 select HAVE_ARCH_KASAN 111 select HAVE_ARCH_KFENCE 112 select HAVE_ARCH_KGDB if PERF_EVENTS 113 select HAVE_ARCH_MMAP_RND_BITS if MMU 114 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 115 select HAVE_ARCH_SECCOMP 116 select HAVE_ARCH_SECCOMP_FILTER 117 select HAVE_ARCH_TRACEHOOK 118 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 119 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD 120 select HAVE_ASM_MODVERSIONS 121 select HAVE_CONTEXT_TRACKING_USER 122 select HAVE_C_RECORDMCOUNT 123 select HAVE_DEBUG_KMEMLEAK 124 select HAVE_DEBUG_STACKOVERFLOW 125 select HAVE_DMA_CONTIGUOUS 126 select HAVE_DYNAMIC_FTRACE 127 select HAVE_DYNAMIC_FTRACE_WITH_ARGS 128 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 129 select HAVE_DYNAMIC_FTRACE_WITH_REGS 130 select HAVE_EBPF_JIT 131 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN 132 select HAVE_EXIT_THREAD 133 select HAVE_GUP_FAST 134 select HAVE_FTRACE_MCOUNT_RECORD 135 select HAVE_FUNCTION_ARG_ACCESS_API 136 select HAVE_FUNCTION_ERROR_INJECTION 137 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 138 select HAVE_FUNCTION_GRAPH_TRACER 139 select HAVE_FUNCTION_TRACER 140 select HAVE_GCC_PLUGINS 141 select HAVE_GENERIC_VDSO 142 select HAVE_HW_BREAKPOINT if PERF_EVENTS 143 select HAVE_IOREMAP_PROT 144 select HAVE_IRQ_EXIT_ON_IRQ_STACK 145 select HAVE_IRQ_TIME_ACCOUNTING 146 select HAVE_KPROBES 147 select HAVE_KPROBES_ON_FTRACE 148 select HAVE_KRETPROBES 149 select HAVE_LIVEPATCH 150 select HAVE_MOD_ARCH_SPECIFIC 151 select HAVE_NMI 152 select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB 153 select HAVE_PCI 154 select HAVE_PERF_EVENTS 155 select HAVE_PERF_REGS 156 select HAVE_PERF_USER_STACK_DUMP 157 select HAVE_PREEMPT_DYNAMIC_KEY 158 select HAVE_REGS_AND_STACK_ACCESS_API 159 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC 160 select HAVE_RETHOOK 161 select HAVE_RSEQ 162 select HAVE_RUST 163 select HAVE_SAMPLE_FTRACE_DIRECT 164 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 165 select HAVE_SETUP_PER_CPU_AREA if NUMA 166 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 167 select HAVE_STACKPROTECTOR 168 select HAVE_SYSCALL_TRACEPOINTS 169 select HAVE_TIF_NOHZ 170 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP 171 select IRQ_FORCED_THREADING 172 select IRQ_LOONGARCH_CPU 173 select LOCK_MM_AND_FIND_VMA 174 select MMU_GATHER_MERGE_VMAS if MMU 175 select MODULES_USE_ELF_RELA if MODULES 176 select NEED_PER_CPU_EMBED_FIRST_CHUNK 177 select NEED_PER_CPU_PAGE_FIRST_CHUNK 178 select OF 179 select OF_EARLY_FLATTREE 180 select PCI 181 select PCI_DOMAINS_GENERIC 182 select PCI_ECAM if ACPI 183 select PCI_LOONGSON 184 select PCI_MSI_ARCH_FALLBACKS 185 select PCI_QUIRKS 186 select PERF_USE_VMALLOC 187 select RTC_LIB 188 select SPARSE_IRQ 189 select SYSCTL_ARCH_UNALIGN_ALLOW 190 select SYSCTL_ARCH_UNALIGN_NO_WARN 191 select SYSCTL_EXCEPTION_TRACE 192 select SWIOTLB 193 select TRACE_IRQFLAGS_SUPPORT 194 select USE_PERCPU_NUMA_NODE_ID 195 select USER_STACKTRACE_SUPPORT 196 select ZONE_DMA32 197 198config 32BIT 199 bool 200 201config 64BIT 202 def_bool y 203 204config GENERIC_BUG 205 def_bool y 206 depends on BUG 207 208config GENERIC_BUG_RELATIVE_POINTERS 209 def_bool y 210 depends on GENERIC_BUG 211 212config GENERIC_CALIBRATE_DELAY 213 def_bool y 214 215config GENERIC_CSUM 216 def_bool y 217 218config GENERIC_HWEIGHT 219 def_bool y 220 221config L1_CACHE_SHIFT 222 int 223 default "6" 224 225config LOCKDEP_SUPPORT 226 bool 227 default y 228 229config STACKTRACE_SUPPORT 230 bool 231 default y 232 233# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the 234# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that 235# are shared between architectures, and specifically expecting the symbols. 236config MACH_LOONGSON32 237 def_bool 32BIT 238 239config MACH_LOONGSON64 240 def_bool 64BIT 241 242config FIX_EARLYCON_MEM 243 def_bool y 244 245config PGTABLE_2LEVEL 246 bool 247 248config PGTABLE_3LEVEL 249 bool 250 251config PGTABLE_4LEVEL 252 bool 253 254config PGTABLE_LEVELS 255 int 256 default 2 if PGTABLE_2LEVEL 257 default 3 if PGTABLE_3LEVEL 258 default 4 if PGTABLE_4LEVEL 259 260config SCHED_OMIT_FRAME_POINTER 261 bool 262 default y 263 264config AS_HAS_EXPLICIT_RELOCS 265 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) 266 267config AS_HAS_FCSR_CLASS 268 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 269 270config AS_HAS_THIN_ADD_SUB 271 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM 272 273config AS_HAS_LSX_EXTENSION 274 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) 275 276config AS_HAS_LASX_EXTENSION 277 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) 278 279config AS_HAS_LBT_EXTENSION 280 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) 281 282config AS_HAS_LVZ_EXTENSION 283 def_bool $(as-instr,hvcl 0) 284 285menu "Kernel type and options" 286 287source "kernel/Kconfig.hz" 288 289choice 290 prompt "Page Table Layout" 291 default 16KB_2LEVEL if 32BIT 292 default 16KB_3LEVEL if 64BIT 293 help 294 Allows choosing the page table layout, which is a combination 295 of page size and page table levels. The size of virtual memory 296 address space are determined by the page table layout. 297 298config 4KB_3LEVEL 299 bool "4KB with 3 levels" 300 select HAVE_PAGE_SIZE_4KB 301 select PGTABLE_3LEVEL 302 help 303 This option selects 4KB page size with 3 level page tables, which 304 support a maximum of 39 bits of application virtual memory. 305 306config 4KB_4LEVEL 307 bool "4KB with 4 levels" 308 select HAVE_PAGE_SIZE_4KB 309 select PGTABLE_4LEVEL 310 help 311 This option selects 4KB page size with 4 level page tables, which 312 support a maximum of 48 bits of application virtual memory. 313 314config 16KB_2LEVEL 315 bool "16KB with 2 levels" 316 select HAVE_PAGE_SIZE_16KB 317 select PGTABLE_2LEVEL 318 help 319 This option selects 16KB page size with 2 level page tables, which 320 support a maximum of 36 bits of application virtual memory. 321 322config 16KB_3LEVEL 323 bool "16KB with 3 levels" 324 select HAVE_PAGE_SIZE_16KB 325 select PGTABLE_3LEVEL 326 help 327 This option selects 16KB page size with 3 level page tables, which 328 support a maximum of 47 bits of application virtual memory. 329 330config 64KB_2LEVEL 331 bool "64KB with 2 levels" 332 select HAVE_PAGE_SIZE_64KB 333 select PGTABLE_2LEVEL 334 help 335 This option selects 64KB page size with 2 level page tables, which 336 support a maximum of 42 bits of application virtual memory. 337 338config 64KB_3LEVEL 339 bool "64KB with 3 levels" 340 select HAVE_PAGE_SIZE_64KB 341 select PGTABLE_3LEVEL 342 help 343 This option selects 64KB page size with 3 level page tables, which 344 support a maximum of 55 bits of application virtual memory. 345 346endchoice 347 348config CMDLINE 349 string "Built-in kernel command line" 350 help 351 For most platforms, the arguments for the kernel's command line 352 are provided at run-time, during boot. However, there are cases 353 where either no arguments are being provided or the provided 354 arguments are insufficient or even invalid. 355 356 When that occurs, it is possible to define a built-in command 357 line here and choose how the kernel should use it later on. 358 359choice 360 prompt "Kernel command line type" 361 default CMDLINE_BOOTLOADER 362 help 363 Choose how the kernel will handle the provided built-in command 364 line. 365 366config CMDLINE_BOOTLOADER 367 bool "Use bootloader kernel arguments if available" 368 help 369 Prefer the command-line passed by the boot loader if available. 370 Use the built-in command line as fallback in case we get nothing 371 during boot. This is the default behaviour. 372 373config CMDLINE_EXTEND 374 bool "Use built-in to extend bootloader kernel arguments" 375 help 376 The command-line arguments provided during boot will be 377 appended to the built-in command line. This is useful in 378 cases where the provided arguments are insufficient and 379 you don't want to or cannot modify them. 380 381config CMDLINE_FORCE 382 bool "Always use the built-in kernel command string" 383 help 384 Always use the built-in command line, even if we get one during 385 boot. This is useful in case you need to override the provided 386 command line on systems where you don't have or want control 387 over it. 388 389endchoice 390 391config BUILTIN_DTB 392 bool "Enable built-in dtb in kernel" 393 depends on OF 394 help 395 Some existing systems do not provide a canonical device tree to 396 the kernel at boot time. Let's provide a device tree table in the 397 kernel, keyed by the dts filename, containing the relevant DTBs. 398 399 Built-in DTBs are generic enough and can be used as references. 400 401config BUILTIN_DTB_NAME 402 string "Source file for built-in dtb" 403 depends on BUILTIN_DTB 404 help 405 Base name (without suffix, relative to arch/loongarch/boot/dts/) 406 for the DTS file that will be used to produce the DTB linked into 407 the kernel. 408 409config DMI 410 bool "Enable DMI scanning" 411 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 412 default y 413 help 414 This enables SMBIOS/DMI feature for systems, and scanning of 415 DMI to identify machine quirks. 416 417config EFI 418 bool "EFI runtime service support" 419 select UCS2_STRING 420 select EFI_RUNTIME_WRAPPERS 421 help 422 This enables the kernel to use EFI runtime services that are 423 available (such as the EFI variable services). 424 425config EFI_STUB 426 bool "EFI boot stub support" 427 default y 428 depends on EFI 429 select EFI_GENERIC_STUB 430 help 431 This kernel feature allows the kernel to be loaded directly by 432 EFI firmware without the use of a bootloader. 433 434config SCHED_SMT 435 bool "SMT scheduler support" 436 depends on SMP 437 default y 438 help 439 Improves scheduler's performance when there are multiple 440 threads in one physical core. 441 442config SMP 443 bool "Multi-Processing support" 444 help 445 This enables support for systems with more than one CPU. If you have 446 a system with only one CPU, say N. If you have a system with more 447 than one CPU, say Y. 448 449 If you say N here, the kernel will run on uni- and multiprocessor 450 machines, but will use only one CPU of a multiprocessor machine. If 451 you say Y here, the kernel will run on many, but not all, 452 uniprocessor machines. On a uniprocessor machine, the kernel 453 will run faster if you say N here. 454 455 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. 456 457 If you don't know what to do here, say N. 458 459config HOTPLUG_CPU 460 bool "Support for hot-pluggable CPUs" 461 depends on SMP 462 select GENERIC_IRQ_MIGRATION 463 help 464 Say Y here to allow turning CPUs off and on. CPUs can be 465 controlled through /sys/devices/system/cpu. 466 (Note: power management support will enable this option 467 automatically on SMP systems. ) 468 Say N if you want to disable CPU hotplug. 469 470config NR_CPUS 471 int "Maximum number of CPUs (2-256)" 472 range 2 256 473 depends on SMP 474 default "64" 475 help 476 This allows you to specify the maximum number of CPUs which this 477 kernel will support. 478 479config NUMA 480 bool "NUMA Support" 481 select SMP 482 help 483 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access) 484 support. This option improves performance on systems with more 485 than one NUMA node; on single node systems it is generally better 486 to leave it disabled. 487 488config NODES_SHIFT 489 int 490 default "6" 491 depends on NUMA 492 493config ARCH_FORCE_MAX_ORDER 494 int "Maximum zone order" 495 default "13" if PAGE_SIZE_64KB 496 default "11" if PAGE_SIZE_16KB 497 default "10" 498 help 499 The kernel memory allocator divides physically contiguous memory 500 blocks into "zones", where each zone is a power of two number of 501 pages. This option selects the largest power of two that the kernel 502 keeps in the memory allocator. If you need to allocate very large 503 blocks of physically contiguous memory, then you may need to 504 increase this value. 505 506 The page size is not necessarily 4KB. Keep this in mind 507 when choosing a value for this option. 508 509config ARCH_IOREMAP 510 bool "Enable LoongArch DMW-based ioremap()" 511 help 512 We use generic TLB-based ioremap() by default since it has page 513 protection support. However, you can enable LoongArch DMW-based 514 ioremap() for better performance. 515 516config ARCH_WRITECOMBINE 517 bool "Enable WriteCombine (WUC) for ioremap()" 518 help 519 LoongArch maintains cache coherency in hardware, but when paired 520 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which 521 is similar to WriteCombine) is out of the scope of cache coherency 522 machanism for PCIe devices (this is a PCIe protocol violation, which 523 may be fixed in newer chipsets). 524 525 This means WUC can only used for write-only memory regions now, so 526 this option is disabled by default, making WUC silently fallback to 527 SUC for ioremap(). You can enable this option if the kernel is ensured 528 to run on hardware without this bug. 529 530 You can override this setting via writecombine=on/off boot parameter. 531 532config ARCH_STRICT_ALIGN 533 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT 534 default y 535 help 536 Not all LoongArch cores support h/w unaligned access, we can use 537 -mstrict-align build parameter to prevent unaligned accesses. 538 539 CPUs with h/w unaligned access support: 540 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000. 541 542 CPUs without h/w unaligned access support: 543 Loongson-2K500/2K1000. 544 545 This option is enabled by default to make the kernel be able to run 546 on all LoongArch systems. But you can disable it manually if you want 547 to run kernel only on systems with h/w unaligned access support in 548 order to optimise for performance. 549 550config CPU_HAS_FPU 551 bool 552 default y 553 554config CPU_HAS_LSX 555 bool "Support for the Loongson SIMD Extension" 556 depends on AS_HAS_LSX_EXTENSION 557 help 558 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers 559 and a set of SIMD instructions to operate on them. When this option 560 is enabled the kernel will support allocating & switching LSX 561 vector register contexts. If you know that your kernel will only be 562 running on CPUs which do not support LSX or that your userland will 563 not be making use of it then you may wish to say N here to reduce 564 the size & complexity of your kernel. 565 566 If unsure, say Y. 567 568config CPU_HAS_LASX 569 bool "Support for the Loongson Advanced SIMD Extension" 570 depends on CPU_HAS_LSX 571 depends on AS_HAS_LASX_EXTENSION 572 help 573 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector 574 registers and a set of SIMD instructions to operate on them. When this 575 option is enabled the kernel will support allocating & switching LASX 576 vector register contexts. If you know that your kernel will only be 577 running on CPUs which do not support LASX or that your userland will 578 not be making use of it then you may wish to say N here to reduce 579 the size & complexity of your kernel. 580 581 If unsure, say Y. 582 583config CPU_HAS_LBT 584 bool "Support for the Loongson Binary Translation Extension" 585 depends on AS_HAS_LBT_EXTENSION 586 help 587 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 588 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). 589 Enabling this option allows the kernel to allocate and switch registers 590 specific to LBT. 591 592 If you want to use this feature, such as the Loongson Architecture 593 Translator (LAT), say Y. 594 595config CPU_HAS_PREFETCH 596 bool 597 default y 598 599config ARCH_SUPPORTS_KEXEC 600 def_bool y 601 602config ARCH_SUPPORTS_CRASH_DUMP 603 def_bool y 604 605config ARCH_SELECTS_CRASH_DUMP 606 def_bool y 607 depends on CRASH_DUMP 608 select RELOCATABLE 609 610config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 611 def_bool CRASH_RESERVE 612 613config RELOCATABLE 614 bool "Relocatable kernel" 615 select ARCH_HAS_RELR 616 help 617 This builds the kernel as a Position Independent Executable (PIE), 618 which retains all relocation metadata required, so as to relocate 619 the kernel binary at runtime to a different virtual address from 620 its link address. 621 622config RANDOMIZE_BASE 623 bool "Randomize the address of the kernel (KASLR)" 624 depends on RELOCATABLE 625 help 626 Randomizes the physical and virtual address at which the 627 kernel image is loaded, as a security feature that 628 deters exploit attempts relying on knowledge of the location 629 of kernel internals. 630 631 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 632 633 If unsure, say N. 634 635config RANDOMIZE_BASE_MAX_OFFSET 636 hex "Maximum KASLR offset" if EXPERT 637 depends on RANDOMIZE_BASE 638 range 0x0 0x10000000 639 default "0x01000000" 640 help 641 When KASLR is active, this provides the maximum offset that will 642 be applied to the kernel image. It should be set according to the 643 amount of physical RAM available in the target system. 644 645 This is limited by the size of the lower address memory, 256MB. 646 647source "kernel/livepatch/Kconfig" 648 649config PARAVIRT 650 bool "Enable paravirtualization code" 651 depends on AS_HAS_LVZ_EXTENSION 652 help 653 This changes the kernel so it can modify itself when it is run 654 under a hypervisor, potentially improving performance significantly 655 over full virtualization. However, when run without a hypervisor 656 the kernel is theoretically slower and slightly larger. 657 658config PARAVIRT_TIME_ACCOUNTING 659 bool "Paravirtual steal time accounting" 660 depends on PARAVIRT 661 help 662 Select this option to enable fine granularity task steal time 663 accounting. Time spent executing other tasks in parallel with 664 the current vCPU is discounted from the vCPU power. To account for 665 that, there can be a small performance impact. 666 667 If in doubt, say N here. 668 669endmenu 670 671config ARCH_SELECT_MEMORY_MODEL 672 def_bool y 673 674config ARCH_FLATMEM_ENABLE 675 def_bool y 676 depends on !NUMA 677 678config ARCH_SPARSEMEM_ENABLE 679 def_bool y 680 select SPARSEMEM_VMEMMAP_ENABLE 681 help 682 Say Y to support efficient handling of sparse physical memory, 683 for architectures which are either NUMA (Non-Uniform Memory Access) 684 or have huge holes in the physical address space for other reasons. 685 See <file:Documentation/mm/numa.rst> for more. 686 687config ARCH_MEMORY_PROBE 688 def_bool y 689 depends on MEMORY_HOTPLUG 690 691config MMU 692 bool 693 default y 694 695config ARCH_MMAP_RND_BITS_MIN 696 default 12 697 698config ARCH_MMAP_RND_BITS_MAX 699 default 18 700 701config ARCH_SUPPORTS_UPROBES 702 def_bool y 703 704config KASAN_SHADOW_OFFSET 705 hex 706 default 0x0 707 depends on KASAN 708 709menu "Power management options" 710 711config ARCH_SUSPEND_POSSIBLE 712 def_bool y 713 714config ARCH_HIBERNATION_POSSIBLE 715 def_bool y 716 717source "kernel/power/Kconfig" 718source "drivers/acpi/Kconfig" 719source "drivers/cpufreq/Kconfig" 720 721endmenu 722 723source "arch/loongarch/kvm/Kconfig" 724