1# SPDX-License-Identifier: GPL-2.0 2config LOONGARCH 3 bool 4 default y 5 select ACPI 6 select ACPI_GENERIC_GSI if ACPI 7 select ACPI_MCFG if ACPI 8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 9 select ACPI_PPTT if ACPI 10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 11 select ARCH_BINFMT_ELF_STATE 12 select ARCH_DISABLE_KASAN_INLINE 13 select ARCH_ENABLE_MEMORY_HOTPLUG 14 select ARCH_ENABLE_MEMORY_HOTREMOVE 15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 17 select ARCH_HAS_CPU_FINALIZE_INIT 18 select ARCH_HAS_FORTIFY_SOURCE 19 select ARCH_HAS_KCOV 20 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 21 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 22 select ARCH_HAS_PTE_SPECIAL 23 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 24 select ARCH_INLINE_READ_LOCK if !PREEMPTION 25 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 26 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 27 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 28 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 29 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 30 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 31 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 32 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 33 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 34 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 35 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 36 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 37 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 38 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 39 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 40 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 41 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 42 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 43 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 44 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 45 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 46 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 47 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 48 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 49 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 50 select ARCH_KEEP_MEMBLOCK 51 select ARCH_MIGHT_HAVE_PC_PARPORT 52 select ARCH_MIGHT_HAVE_PC_SERIO 53 select ARCH_SPARSEMEM_ENABLE 54 select ARCH_STACKWALK 55 select ARCH_SUPPORTS_ACPI 56 select ARCH_SUPPORTS_ATOMIC_RMW 57 select ARCH_SUPPORTS_HUGETLBFS 58 select ARCH_SUPPORTS_LTO_CLANG 59 select ARCH_SUPPORTS_LTO_CLANG_THIN 60 select ARCH_SUPPORTS_NUMA_BALANCING 61 select ARCH_USE_BUILTIN_BSWAP 62 select ARCH_USE_CMPXCHG_LOCKREF 63 select ARCH_USE_QUEUED_RWLOCKS 64 select ARCH_USE_QUEUED_SPINLOCKS 65 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 66 select ARCH_WANT_LD_ORPHAN_WARN 67 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 68 select ARCH_WANTS_NO_INSTR 69 select BUILDTIME_TABLE_SORT 70 select COMMON_CLK 71 select CPU_PM 72 select EFI 73 select GENERIC_CLOCKEVENTS 74 select GENERIC_CMOS_UPDATE 75 select GENERIC_CPU_AUTOPROBE 76 select GENERIC_CPU_DEVICES 77 select GENERIC_ENTRY 78 select GENERIC_GETTIMEOFDAY 79 select GENERIC_IOREMAP if !ARCH_IOREMAP 80 select GENERIC_IRQ_MULTI_HANDLER 81 select GENERIC_IRQ_PROBE 82 select GENERIC_IRQ_SHOW 83 select GENERIC_LIB_ASHLDI3 84 select GENERIC_LIB_ASHRDI3 85 select GENERIC_LIB_CMPDI2 86 select GENERIC_LIB_LSHRDI3 87 select GENERIC_LIB_UCMPDI2 88 select GENERIC_LIB_DEVMEM_IS_ALLOWED 89 select GENERIC_PCI_IOMAP 90 select GENERIC_SCHED_CLOCK 91 select GENERIC_SMP_IDLE_THREAD 92 select GENERIC_TIME_VSYSCALL 93 select GENERIC_VDSO_TIME_NS 94 select GPIOLIB 95 select HAS_IOPORT 96 select HAVE_ARCH_AUDITSYSCALL 97 select HAVE_ARCH_JUMP_LABEL 98 select HAVE_ARCH_JUMP_LABEL_RELATIVE 99 select HAVE_ARCH_KASAN 100 select HAVE_ARCH_KFENCE 101 select HAVE_ARCH_KGDB if PERF_EVENTS 102 select HAVE_ARCH_MMAP_RND_BITS if MMU 103 select HAVE_ARCH_SECCOMP 104 select HAVE_ARCH_SECCOMP_FILTER 105 select HAVE_ARCH_TRACEHOOK 106 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 107 select HAVE_ASM_MODVERSIONS 108 select HAVE_CONTEXT_TRACKING_USER 109 select HAVE_C_RECORDMCOUNT 110 select HAVE_DEBUG_KMEMLEAK 111 select HAVE_DEBUG_STACKOVERFLOW 112 select HAVE_DMA_CONTIGUOUS 113 select HAVE_DYNAMIC_FTRACE 114 select HAVE_DYNAMIC_FTRACE_WITH_ARGS 115 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 116 select HAVE_DYNAMIC_FTRACE_WITH_REGS 117 select HAVE_EBPF_JIT 118 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN 119 select HAVE_EXIT_THREAD 120 select HAVE_FAST_GUP 121 select HAVE_FTRACE_MCOUNT_RECORD 122 select HAVE_FUNCTION_ARG_ACCESS_API 123 select HAVE_FUNCTION_ERROR_INJECTION 124 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 125 select HAVE_FUNCTION_GRAPH_TRACER 126 select HAVE_FUNCTION_TRACER 127 select HAVE_GCC_PLUGINS 128 select HAVE_GENERIC_VDSO 129 select HAVE_HW_BREAKPOINT if PERF_EVENTS 130 select HAVE_IOREMAP_PROT 131 select HAVE_IRQ_EXIT_ON_IRQ_STACK 132 select HAVE_IRQ_TIME_ACCOUNTING 133 select HAVE_KPROBES 134 select HAVE_KPROBES_ON_FTRACE 135 select HAVE_KRETPROBES 136 select HAVE_KVM 137 select HAVE_MOD_ARCH_SPECIFIC 138 select HAVE_NMI 139 select HAVE_PCI 140 select HAVE_PERF_EVENTS 141 select HAVE_PERF_REGS 142 select HAVE_PERF_USER_STACK_DUMP 143 select HAVE_PREEMPT_DYNAMIC_KEY 144 select HAVE_REGS_AND_STACK_ACCESS_API 145 select HAVE_RETHOOK 146 select HAVE_RSEQ 147 select HAVE_RUST 148 select HAVE_SAMPLE_FTRACE_DIRECT 149 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 150 select HAVE_SETUP_PER_CPU_AREA if NUMA 151 select HAVE_STACKPROTECTOR 152 select HAVE_SYSCALL_TRACEPOINTS 153 select HAVE_TIF_NOHZ 154 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP 155 select IRQ_FORCED_THREADING 156 select IRQ_LOONGARCH_CPU 157 select LOCK_MM_AND_FIND_VMA 158 select MMU_GATHER_MERGE_VMAS if MMU 159 select MODULES_USE_ELF_RELA if MODULES 160 select NEED_PER_CPU_EMBED_FIRST_CHUNK 161 select NEED_PER_CPU_PAGE_FIRST_CHUNK 162 select OF 163 select OF_EARLY_FLATTREE 164 select PCI 165 select PCI_DOMAINS_GENERIC 166 select PCI_ECAM if ACPI 167 select PCI_LOONGSON 168 select PCI_MSI_ARCH_FALLBACKS 169 select PCI_QUIRKS 170 select PERF_USE_VMALLOC 171 select RTC_LIB 172 select SMP 173 select SPARSE_IRQ 174 select SYSCTL_ARCH_UNALIGN_ALLOW 175 select SYSCTL_ARCH_UNALIGN_NO_WARN 176 select SYSCTL_EXCEPTION_TRACE 177 select SWIOTLB 178 select TRACE_IRQFLAGS_SUPPORT 179 select USE_PERCPU_NUMA_NODE_ID 180 select USER_STACKTRACE_SUPPORT 181 select ZONE_DMA32 182 183config 32BIT 184 bool 185 186config 64BIT 187 def_bool y 188 189config GENERIC_BUG 190 def_bool y 191 depends on BUG 192 193config GENERIC_BUG_RELATIVE_POINTERS 194 def_bool y 195 depends on GENERIC_BUG 196 197config GENERIC_CALIBRATE_DELAY 198 def_bool y 199 200config GENERIC_CSUM 201 def_bool y 202 203config GENERIC_HWEIGHT 204 def_bool y 205 206config L1_CACHE_SHIFT 207 int 208 default "6" 209 210config LOCKDEP_SUPPORT 211 bool 212 default y 213 214config STACKTRACE_SUPPORT 215 bool 216 default y 217 218# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the 219# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that 220# are shared between architectures, and specifically expecting the symbols. 221config MACH_LOONGSON32 222 def_bool 32BIT 223 224config MACH_LOONGSON64 225 def_bool 64BIT 226 227config FIX_EARLYCON_MEM 228 def_bool y 229 230config PGTABLE_2LEVEL 231 bool 232 233config PGTABLE_3LEVEL 234 bool 235 236config PGTABLE_4LEVEL 237 bool 238 239config PGTABLE_LEVELS 240 int 241 default 2 if PGTABLE_2LEVEL 242 default 3 if PGTABLE_3LEVEL 243 default 4 if PGTABLE_4LEVEL 244 245config SCHED_OMIT_FRAME_POINTER 246 bool 247 default y 248 249config AS_HAS_EXPLICIT_RELOCS 250 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) 251 252config AS_HAS_FCSR_CLASS 253 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 254 255config AS_HAS_LSX_EXTENSION 256 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) 257 258config AS_HAS_LASX_EXTENSION 259 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) 260 261config AS_HAS_LBT_EXTENSION 262 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) 263 264config AS_HAS_LVZ_EXTENSION 265 def_bool $(as-instr,hvcl 0) 266 267menu "Kernel type and options" 268 269source "kernel/Kconfig.hz" 270 271choice 272 prompt "Page Table Layout" 273 default 16KB_2LEVEL if 32BIT 274 default 16KB_3LEVEL if 64BIT 275 help 276 Allows choosing the page table layout, which is a combination 277 of page size and page table levels. The size of virtual memory 278 address space are determined by the page table layout. 279 280config 4KB_3LEVEL 281 bool "4KB with 3 levels" 282 select HAVE_PAGE_SIZE_4KB 283 select PGTABLE_3LEVEL 284 help 285 This option selects 4KB page size with 3 level page tables, which 286 support a maximum of 39 bits of application virtual memory. 287 288config 4KB_4LEVEL 289 bool "4KB with 4 levels" 290 select HAVE_PAGE_SIZE_4KB 291 select PGTABLE_4LEVEL 292 help 293 This option selects 4KB page size with 4 level page tables, which 294 support a maximum of 48 bits of application virtual memory. 295 296config 16KB_2LEVEL 297 bool "16KB with 2 levels" 298 select HAVE_PAGE_SIZE_16KB 299 select PGTABLE_2LEVEL 300 help 301 This option selects 16KB page size with 2 level page tables, which 302 support a maximum of 36 bits of application virtual memory. 303 304config 16KB_3LEVEL 305 bool "16KB with 3 levels" 306 select HAVE_PAGE_SIZE_16KB 307 select PGTABLE_3LEVEL 308 help 309 This option selects 16KB page size with 3 level page tables, which 310 support a maximum of 47 bits of application virtual memory. 311 312config 64KB_2LEVEL 313 bool "64KB with 2 levels" 314 select HAVE_PAGE_SIZE_64KB 315 select PGTABLE_2LEVEL 316 help 317 This option selects 64KB page size with 2 level page tables, which 318 support a maximum of 42 bits of application virtual memory. 319 320config 64KB_3LEVEL 321 bool "64KB with 3 levels" 322 select HAVE_PAGE_SIZE_64KB 323 select PGTABLE_3LEVEL 324 help 325 This option selects 64KB page size with 3 level page tables, which 326 support a maximum of 55 bits of application virtual memory. 327 328endchoice 329 330config CMDLINE 331 string "Built-in kernel command line" 332 help 333 For most platforms, the arguments for the kernel's command line 334 are provided at run-time, during boot. However, there are cases 335 where either no arguments are being provided or the provided 336 arguments are insufficient or even invalid. 337 338 When that occurs, it is possible to define a built-in command 339 line here and choose how the kernel should use it later on. 340 341choice 342 prompt "Kernel command line type" 343 default CMDLINE_BOOTLOADER 344 help 345 Choose how the kernel will handle the provided built-in command 346 line. 347 348config CMDLINE_BOOTLOADER 349 bool "Use bootloader kernel arguments if available" 350 help 351 Prefer the command-line passed by the boot loader if available. 352 Use the built-in command line as fallback in case we get nothing 353 during boot. This is the default behaviour. 354 355config CMDLINE_EXTEND 356 bool "Use built-in to extend bootloader kernel arguments" 357 help 358 The command-line arguments provided during boot will be 359 appended to the built-in command line. This is useful in 360 cases where the provided arguments are insufficient and 361 you don't want to or cannot modify them. 362 363config CMDLINE_FORCE 364 bool "Always use the built-in kernel command string" 365 help 366 Always use the built-in command line, even if we get one during 367 boot. This is useful in case you need to override the provided 368 command line on systems where you don't have or want control 369 over it. 370 371endchoice 372 373config BUILTIN_DTB 374 bool "Enable built-in dtb in kernel" 375 depends on OF 376 help 377 Some existing systems do not provide a canonical device tree to 378 the kernel at boot time. Let's provide a device tree table in the 379 kernel, keyed by the dts filename, containing the relevant DTBs. 380 381 Built-in DTBs are generic enough and can be used as references. 382 383config BUILTIN_DTB_NAME 384 string "Source file for built-in dtb" 385 depends on BUILTIN_DTB 386 help 387 Base name (without suffix, relative to arch/loongarch/boot/dts/) 388 for the DTS file that will be used to produce the DTB linked into 389 the kernel. 390 391config DMI 392 bool "Enable DMI scanning" 393 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 394 default y 395 help 396 This enables SMBIOS/DMI feature for systems, and scanning of 397 DMI to identify machine quirks. 398 399config EFI 400 bool "EFI runtime service support" 401 select UCS2_STRING 402 select EFI_RUNTIME_WRAPPERS 403 help 404 This enables the kernel to use EFI runtime services that are 405 available (such as the EFI variable services). 406 407config EFI_STUB 408 bool "EFI boot stub support" 409 default y 410 depends on EFI 411 select EFI_GENERIC_STUB 412 help 413 This kernel feature allows the kernel to be loaded directly by 414 EFI firmware without the use of a bootloader. 415 416config SCHED_SMT 417 bool "SMT scheduler support" 418 default y 419 help 420 Improves scheduler's performance when there are multiple 421 threads in one physical core. 422 423config SMP 424 bool "Multi-Processing support" 425 help 426 This enables support for systems with more than one CPU. If you have 427 a system with only one CPU, say N. If you have a system with more 428 than one CPU, say Y. 429 430 If you say N here, the kernel will run on uni- and multiprocessor 431 machines, but will use only one CPU of a multiprocessor machine. If 432 you say Y here, the kernel will run on many, but not all, 433 uniprocessor machines. On a uniprocessor machine, the kernel 434 will run faster if you say N here. 435 436 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. 437 438 If you don't know what to do here, say N. 439 440config HOTPLUG_CPU 441 bool "Support for hot-pluggable CPUs" 442 depends on SMP 443 select GENERIC_IRQ_MIGRATION 444 help 445 Say Y here to allow turning CPUs off and on. CPUs can be 446 controlled through /sys/devices/system/cpu. 447 (Note: power management support will enable this option 448 automatically on SMP systems. ) 449 Say N if you want to disable CPU hotplug. 450 451config NR_CPUS 452 int "Maximum number of CPUs (2-256)" 453 range 2 256 454 depends on SMP 455 default "64" 456 help 457 This allows you to specify the maximum number of CPUs which this 458 kernel will support. 459 460config NUMA 461 bool "NUMA Support" 462 select SMP 463 select ACPI_NUMA if ACPI 464 help 465 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access) 466 support. This option improves performance on systems with more 467 than one NUMA node; on single node systems it is generally better 468 to leave it disabled. 469 470config NODES_SHIFT 471 int 472 default "6" 473 depends on NUMA 474 475config ARCH_FORCE_MAX_ORDER 476 int "Maximum zone order" 477 default "13" if PAGE_SIZE_64KB 478 default "11" if PAGE_SIZE_16KB 479 default "10" 480 help 481 The kernel memory allocator divides physically contiguous memory 482 blocks into "zones", where each zone is a power of two number of 483 pages. This option selects the largest power of two that the kernel 484 keeps in the memory allocator. If you need to allocate very large 485 blocks of physically contiguous memory, then you may need to 486 increase this value. 487 488 The page size is not necessarily 4KB. Keep this in mind 489 when choosing a value for this option. 490 491config ARCH_IOREMAP 492 bool "Enable LoongArch DMW-based ioremap()" 493 help 494 We use generic TLB-based ioremap() by default since it has page 495 protection support. However, you can enable LoongArch DMW-based 496 ioremap() for better performance. 497 498config ARCH_WRITECOMBINE 499 bool "Enable WriteCombine (WUC) for ioremap()" 500 help 501 LoongArch maintains cache coherency in hardware, but when paired 502 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which 503 is similar to WriteCombine) is out of the scope of cache coherency 504 machanism for PCIe devices (this is a PCIe protocol violation, which 505 may be fixed in newer chipsets). 506 507 This means WUC can only used for write-only memory regions now, so 508 this option is disabled by default, making WUC silently fallback to 509 SUC for ioremap(). You can enable this option if the kernel is ensured 510 to run on hardware without this bug. 511 512 You can override this setting via writecombine=on/off boot parameter. 513 514config ARCH_STRICT_ALIGN 515 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT 516 default y 517 help 518 Not all LoongArch cores support h/w unaligned access, we can use 519 -mstrict-align build parameter to prevent unaligned accesses. 520 521 CPUs with h/w unaligned access support: 522 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000. 523 524 CPUs without h/w unaligned access support: 525 Loongson-2K500/2K1000. 526 527 This option is enabled by default to make the kernel be able to run 528 on all LoongArch systems. But you can disable it manually if you want 529 to run kernel only on systems with h/w unaligned access support in 530 order to optimise for performance. 531 532config CPU_HAS_FPU 533 bool 534 default y 535 536config CPU_HAS_LSX 537 bool "Support for the Loongson SIMD Extension" 538 depends on AS_HAS_LSX_EXTENSION 539 help 540 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers 541 and a set of SIMD instructions to operate on them. When this option 542 is enabled the kernel will support allocating & switching LSX 543 vector register contexts. If you know that your kernel will only be 544 running on CPUs which do not support LSX or that your userland will 545 not be making use of it then you may wish to say N here to reduce 546 the size & complexity of your kernel. 547 548 If unsure, say Y. 549 550config CPU_HAS_LASX 551 bool "Support for the Loongson Advanced SIMD Extension" 552 depends on CPU_HAS_LSX 553 depends on AS_HAS_LASX_EXTENSION 554 help 555 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector 556 registers and a set of SIMD instructions to operate on them. When this 557 option is enabled the kernel will support allocating & switching LASX 558 vector register contexts. If you know that your kernel will only be 559 running on CPUs which do not support LASX or that your userland will 560 not be making use of it then you may wish to say N here to reduce 561 the size & complexity of your kernel. 562 563 If unsure, say Y. 564 565config CPU_HAS_LBT 566 bool "Support for the Loongson Binary Translation Extension" 567 depends on AS_HAS_LBT_EXTENSION 568 help 569 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 570 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). 571 Enabling this option allows the kernel to allocate and switch registers 572 specific to LBT. 573 574 If you want to use this feature, such as the Loongson Architecture 575 Translator (LAT), say Y. 576 577config CPU_HAS_PREFETCH 578 bool 579 default y 580 581config ARCH_SUPPORTS_KEXEC 582 def_bool y 583 584config ARCH_SUPPORTS_CRASH_DUMP 585 def_bool y 586 587config ARCH_SELECTS_CRASH_DUMP 588 def_bool y 589 depends on CRASH_DUMP 590 select RELOCATABLE 591 592config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 593 def_bool CRASH_CORE 594 595config RELOCATABLE 596 bool "Relocatable kernel" 597 help 598 This builds the kernel as a Position Independent Executable (PIE), 599 which retains all relocation metadata required, so as to relocate 600 the kernel binary at runtime to a different virtual address from 601 its link address. 602 603config RANDOMIZE_BASE 604 bool "Randomize the address of the kernel (KASLR)" 605 depends on RELOCATABLE 606 help 607 Randomizes the physical and virtual address at which the 608 kernel image is loaded, as a security feature that 609 deters exploit attempts relying on knowledge of the location 610 of kernel internals. 611 612 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 613 614 If unsure, say N. 615 616config RANDOMIZE_BASE_MAX_OFFSET 617 hex "Maximum KASLR offset" if EXPERT 618 depends on RANDOMIZE_BASE 619 range 0x0 0x10000000 620 default "0x01000000" 621 help 622 When KASLR is active, this provides the maximum offset that will 623 be applied to the kernel image. It should be set according to the 624 amount of physical RAM available in the target system. 625 626 This is limited by the size of the lower address memory, 256MB. 627 628endmenu 629 630config ARCH_SELECT_MEMORY_MODEL 631 def_bool y 632 633config ARCH_FLATMEM_ENABLE 634 def_bool y 635 depends on !NUMA 636 637config ARCH_SPARSEMEM_ENABLE 638 def_bool y 639 select SPARSEMEM_VMEMMAP_ENABLE 640 help 641 Say Y to support efficient handling of sparse physical memory, 642 for architectures which are either NUMA (Non-Uniform Memory Access) 643 or have huge holes in the physical address space for other reasons. 644 See <file:Documentation/mm/numa.rst> for more. 645 646config ARCH_MEMORY_PROBE 647 def_bool y 648 depends on MEMORY_HOTPLUG 649 650config MMU 651 bool 652 default y 653 654config ARCH_MMAP_RND_BITS_MIN 655 default 12 656 657config ARCH_MMAP_RND_BITS_MAX 658 default 18 659 660config ARCH_SUPPORTS_UPROBES 661 def_bool y 662 663config KASAN_SHADOW_OFFSET 664 hex 665 default 0x0 666 depends on KASAN 667 668menu "Power management options" 669 670config ARCH_SUSPEND_POSSIBLE 671 def_bool y 672 673config ARCH_HIBERNATION_POSSIBLE 674 def_bool y 675 676source "kernel/power/Kconfig" 677source "drivers/acpi/Kconfig" 678 679endmenu 680 681source "arch/loongarch/kvm/Kconfig" 682