1# SPDX-License-Identifier: GPL-2.0 2config LOONGARCH 3 bool 4 default y 5 select ACPI 6 select ACPI_GENERIC_GSI if ACPI 7 select ACPI_MCFG if ACPI 8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 9 select ACPI_PPTT if ACPI 10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 11 select ARCH_BINFMT_ELF_STATE 12 select ARCH_DISABLE_KASAN_INLINE 13 select ARCH_ENABLE_MEMORY_HOTPLUG 14 select ARCH_ENABLE_MEMORY_HOTREMOVE 15 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 16 select ARCH_HAS_CPU_FINALIZE_INIT 17 select ARCH_HAS_FORTIFY_SOURCE 18 select ARCH_HAS_KCOV 19 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 20 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 21 select ARCH_HAS_PTE_SPECIAL 22 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 23 select ARCH_INLINE_READ_LOCK if !PREEMPTION 24 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 25 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 26 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 27 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 28 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 29 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 30 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 31 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 32 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 33 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 34 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 35 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 36 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 37 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 38 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 39 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 40 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 41 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 42 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 43 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 44 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 45 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 46 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 47 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 48 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 49 select ARCH_KEEP_MEMBLOCK 50 select ARCH_MIGHT_HAVE_PC_PARPORT 51 select ARCH_MIGHT_HAVE_PC_SERIO 52 select ARCH_SPARSEMEM_ENABLE 53 select ARCH_STACKWALK 54 select ARCH_SUPPORTS_ACPI 55 select ARCH_SUPPORTS_ATOMIC_RMW 56 select ARCH_SUPPORTS_HUGETLBFS 57 select ARCH_SUPPORTS_LTO_CLANG 58 select ARCH_SUPPORTS_LTO_CLANG_THIN 59 select ARCH_SUPPORTS_NUMA_BALANCING 60 select ARCH_USE_BUILTIN_BSWAP 61 select ARCH_USE_CMPXCHG_LOCKREF 62 select ARCH_USE_QUEUED_RWLOCKS 63 select ARCH_USE_QUEUED_SPINLOCKS 64 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 65 select ARCH_WANT_LD_ORPHAN_WARN 66 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 67 select ARCH_WANTS_NO_INSTR 68 select BUILDTIME_TABLE_SORT 69 select COMMON_CLK 70 select CPU_PM 71 select EFI 72 select GENERIC_CLOCKEVENTS 73 select GENERIC_CMOS_UPDATE 74 select GENERIC_CPU_AUTOPROBE 75 select GENERIC_CPU_DEVICES 76 select GENERIC_ENTRY 77 select GENERIC_GETTIMEOFDAY 78 select GENERIC_IOREMAP if !ARCH_IOREMAP 79 select GENERIC_IRQ_MULTI_HANDLER 80 select GENERIC_IRQ_PROBE 81 select GENERIC_IRQ_SHOW 82 select GENERIC_LIB_ASHLDI3 83 select GENERIC_LIB_ASHRDI3 84 select GENERIC_LIB_CMPDI2 85 select GENERIC_LIB_LSHRDI3 86 select GENERIC_LIB_UCMPDI2 87 select GENERIC_LIB_DEVMEM_IS_ALLOWED 88 select GENERIC_PCI_IOMAP 89 select GENERIC_SCHED_CLOCK 90 select GENERIC_SMP_IDLE_THREAD 91 select GENERIC_TIME_VSYSCALL 92 select GENERIC_VDSO_TIME_NS 93 select GPIOLIB 94 select HAS_IOPORT 95 select HAVE_ARCH_AUDITSYSCALL 96 select HAVE_ARCH_JUMP_LABEL 97 select HAVE_ARCH_JUMP_LABEL_RELATIVE 98 select HAVE_ARCH_KASAN 99 select HAVE_ARCH_KFENCE 100 select HAVE_ARCH_KGDB if PERF_EVENTS 101 select HAVE_ARCH_MMAP_RND_BITS if MMU 102 select HAVE_ARCH_SECCOMP_FILTER 103 select HAVE_ARCH_TRACEHOOK 104 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 105 select HAVE_ASM_MODVERSIONS 106 select HAVE_CONTEXT_TRACKING_USER 107 select HAVE_C_RECORDMCOUNT 108 select HAVE_DEBUG_KMEMLEAK 109 select HAVE_DEBUG_STACKOVERFLOW 110 select HAVE_DMA_CONTIGUOUS 111 select HAVE_DYNAMIC_FTRACE 112 select HAVE_DYNAMIC_FTRACE_WITH_ARGS 113 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 114 select HAVE_DYNAMIC_FTRACE_WITH_REGS 115 select HAVE_EBPF_JIT 116 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN 117 select HAVE_EXIT_THREAD 118 select HAVE_FAST_GUP 119 select HAVE_FTRACE_MCOUNT_RECORD 120 select HAVE_FUNCTION_ARG_ACCESS_API 121 select HAVE_FUNCTION_ERROR_INJECTION 122 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 123 select HAVE_FUNCTION_GRAPH_TRACER 124 select HAVE_FUNCTION_TRACER 125 select HAVE_GCC_PLUGINS 126 select HAVE_GENERIC_VDSO 127 select HAVE_HW_BREAKPOINT if PERF_EVENTS 128 select HAVE_IOREMAP_PROT 129 select HAVE_IRQ_EXIT_ON_IRQ_STACK 130 select HAVE_IRQ_TIME_ACCOUNTING 131 select HAVE_KPROBES 132 select HAVE_KPROBES_ON_FTRACE 133 select HAVE_KRETPROBES 134 select HAVE_KVM 135 select HAVE_MOD_ARCH_SPECIFIC 136 select HAVE_NMI 137 select HAVE_PCI 138 select HAVE_PERF_EVENTS 139 select HAVE_PERF_REGS 140 select HAVE_PERF_USER_STACK_DUMP 141 select HAVE_PREEMPT_DYNAMIC_KEY 142 select HAVE_REGS_AND_STACK_ACCESS_API 143 select HAVE_RETHOOK 144 select HAVE_RSEQ 145 select HAVE_RUST 146 select HAVE_SAMPLE_FTRACE_DIRECT 147 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 148 select HAVE_SETUP_PER_CPU_AREA if NUMA 149 select HAVE_STACKPROTECTOR 150 select HAVE_SYSCALL_TRACEPOINTS 151 select HAVE_TIF_NOHZ 152 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP 153 select IRQ_FORCED_THREADING 154 select IRQ_LOONGARCH_CPU 155 select LOCK_MM_AND_FIND_VMA 156 select MMU_GATHER_MERGE_VMAS if MMU 157 select MODULES_USE_ELF_RELA if MODULES 158 select NEED_PER_CPU_EMBED_FIRST_CHUNK 159 select NEED_PER_CPU_PAGE_FIRST_CHUNK 160 select OF 161 select OF_EARLY_FLATTREE 162 select PCI 163 select PCI_DOMAINS_GENERIC 164 select PCI_ECAM if ACPI 165 select PCI_LOONGSON 166 select PCI_MSI_ARCH_FALLBACKS 167 select PCI_QUIRKS 168 select PERF_USE_VMALLOC 169 select RTC_LIB 170 select SMP 171 select SPARSE_IRQ 172 select SYSCTL_ARCH_UNALIGN_ALLOW 173 select SYSCTL_ARCH_UNALIGN_NO_WARN 174 select SYSCTL_EXCEPTION_TRACE 175 select SWIOTLB 176 select TRACE_IRQFLAGS_SUPPORT 177 select USE_PERCPU_NUMA_NODE_ID 178 select USER_STACKTRACE_SUPPORT 179 select ZONE_DMA32 180 181config 32BIT 182 bool 183 184config 64BIT 185 def_bool y 186 187config GENERIC_BUG 188 def_bool y 189 depends on BUG 190 191config GENERIC_BUG_RELATIVE_POINTERS 192 def_bool y 193 depends on GENERIC_BUG 194 195config GENERIC_CALIBRATE_DELAY 196 def_bool y 197 198config GENERIC_CSUM 199 def_bool y 200 201config GENERIC_HWEIGHT 202 def_bool y 203 204config L1_CACHE_SHIFT 205 int 206 default "6" 207 208config LOCKDEP_SUPPORT 209 bool 210 default y 211 212config STACKTRACE_SUPPORT 213 bool 214 default y 215 216# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the 217# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that 218# are shared between architectures, and specifically expecting the symbols. 219config MACH_LOONGSON32 220 def_bool 32BIT 221 222config MACH_LOONGSON64 223 def_bool 64BIT 224 225config FIX_EARLYCON_MEM 226 def_bool y 227 228config PAGE_SIZE_4KB 229 bool 230 231config PAGE_SIZE_16KB 232 bool 233 234config PAGE_SIZE_64KB 235 bool 236 237config PGTABLE_2LEVEL 238 bool 239 240config PGTABLE_3LEVEL 241 bool 242 243config PGTABLE_4LEVEL 244 bool 245 246config PGTABLE_LEVELS 247 int 248 default 2 if PGTABLE_2LEVEL 249 default 3 if PGTABLE_3LEVEL 250 default 4 if PGTABLE_4LEVEL 251 252config SCHED_OMIT_FRAME_POINTER 253 bool 254 default y 255 256config AS_HAS_EXPLICIT_RELOCS 257 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) 258 259config AS_HAS_FCSR_CLASS 260 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 261 262config AS_HAS_LSX_EXTENSION 263 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) 264 265config AS_HAS_LASX_EXTENSION 266 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) 267 268config AS_HAS_LBT_EXTENSION 269 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) 270 271config AS_HAS_LVZ_EXTENSION 272 def_bool $(as-instr,hvcl 0) 273 274menu "Kernel type and options" 275 276source "kernel/Kconfig.hz" 277 278choice 279 prompt "Page Table Layout" 280 default 16KB_2LEVEL if 32BIT 281 default 16KB_3LEVEL if 64BIT 282 help 283 Allows choosing the page table layout, which is a combination 284 of page size and page table levels. The size of virtual memory 285 address space are determined by the page table layout. 286 287config 4KB_3LEVEL 288 bool "4KB with 3 levels" 289 select PAGE_SIZE_4KB 290 select PGTABLE_3LEVEL 291 help 292 This option selects 4KB page size with 3 level page tables, which 293 support a maximum of 39 bits of application virtual memory. 294 295config 4KB_4LEVEL 296 bool "4KB with 4 levels" 297 select PAGE_SIZE_4KB 298 select PGTABLE_4LEVEL 299 help 300 This option selects 4KB page size with 4 level page tables, which 301 support a maximum of 48 bits of application virtual memory. 302 303config 16KB_2LEVEL 304 bool "16KB with 2 levels" 305 select PAGE_SIZE_16KB 306 select PGTABLE_2LEVEL 307 help 308 This option selects 16KB page size with 2 level page tables, which 309 support a maximum of 36 bits of application virtual memory. 310 311config 16KB_3LEVEL 312 bool "16KB with 3 levels" 313 select PAGE_SIZE_16KB 314 select PGTABLE_3LEVEL 315 help 316 This option selects 16KB page size with 3 level page tables, which 317 support a maximum of 47 bits of application virtual memory. 318 319config 64KB_2LEVEL 320 bool "64KB with 2 levels" 321 select PAGE_SIZE_64KB 322 select PGTABLE_2LEVEL 323 help 324 This option selects 64KB page size with 2 level page tables, which 325 support a maximum of 42 bits of application virtual memory. 326 327config 64KB_3LEVEL 328 bool "64KB with 3 levels" 329 select PAGE_SIZE_64KB 330 select PGTABLE_3LEVEL 331 help 332 This option selects 64KB page size with 3 level page tables, which 333 support a maximum of 55 bits of application virtual memory. 334 335endchoice 336 337config CMDLINE 338 string "Built-in kernel command line" 339 help 340 For most platforms, the arguments for the kernel's command line 341 are provided at run-time, during boot. However, there are cases 342 where either no arguments are being provided or the provided 343 arguments are insufficient or even invalid. 344 345 When that occurs, it is possible to define a built-in command 346 line here and choose how the kernel should use it later on. 347 348choice 349 prompt "Kernel command line type" 350 default CMDLINE_BOOTLOADER 351 help 352 Choose how the kernel will handle the provided built-in command 353 line. 354 355config CMDLINE_BOOTLOADER 356 bool "Use bootloader kernel arguments if available" 357 help 358 Prefer the command-line passed by the boot loader if available. 359 Use the built-in command line as fallback in case we get nothing 360 during boot. This is the default behaviour. 361 362config CMDLINE_EXTEND 363 bool "Use built-in to extend bootloader kernel arguments" 364 help 365 The command-line arguments provided during boot will be 366 appended to the built-in command line. This is useful in 367 cases where the provided arguments are insufficient and 368 you don't want to or cannot modify them. 369 370config CMDLINE_FORCE 371 bool "Always use the built-in kernel command string" 372 help 373 Always use the built-in command line, even if we get one during 374 boot. This is useful in case you need to override the provided 375 command line on systems where you don't have or want control 376 over it. 377 378endchoice 379 380config BUILTIN_DTB 381 bool "Enable built-in dtb in kernel" 382 depends on OF 383 help 384 Some existing systems do not provide a canonical device tree to 385 the kernel at boot time. Let's provide a device tree table in the 386 kernel, keyed by the dts filename, containing the relevant DTBs. 387 388 Built-in DTBs are generic enough and can be used as references. 389 390config BUILTIN_DTB_NAME 391 string "Source file for built-in dtb" 392 depends on BUILTIN_DTB 393 help 394 Base name (without suffix, relative to arch/loongarch/boot/dts/) 395 for the DTS file that will be used to produce the DTB linked into 396 the kernel. 397 398config DMI 399 bool "Enable DMI scanning" 400 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 401 default y 402 help 403 This enables SMBIOS/DMI feature for systems, and scanning of 404 DMI to identify machine quirks. 405 406config EFI 407 bool "EFI runtime service support" 408 select UCS2_STRING 409 select EFI_RUNTIME_WRAPPERS 410 help 411 This enables the kernel to use EFI runtime services that are 412 available (such as the EFI variable services). 413 414config EFI_STUB 415 bool "EFI boot stub support" 416 default y 417 depends on EFI 418 select EFI_GENERIC_STUB 419 help 420 This kernel feature allows the kernel to be loaded directly by 421 EFI firmware without the use of a bootloader. 422 423config SCHED_SMT 424 bool "SMT scheduler support" 425 default y 426 help 427 Improves scheduler's performance when there are multiple 428 threads in one physical core. 429 430config SMP 431 bool "Multi-Processing support" 432 help 433 This enables support for systems with more than one CPU. If you have 434 a system with only one CPU, say N. If you have a system with more 435 than one CPU, say Y. 436 437 If you say N here, the kernel will run on uni- and multiprocessor 438 machines, but will use only one CPU of a multiprocessor machine. If 439 you say Y here, the kernel will run on many, but not all, 440 uniprocessor machines. On a uniprocessor machine, the kernel 441 will run faster if you say N here. 442 443 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. 444 445 If you don't know what to do here, say N. 446 447config HOTPLUG_CPU 448 bool "Support for hot-pluggable CPUs" 449 depends on SMP 450 select GENERIC_IRQ_MIGRATION 451 help 452 Say Y here to allow turning CPUs off and on. CPUs can be 453 controlled through /sys/devices/system/cpu. 454 (Note: power management support will enable this option 455 automatically on SMP systems. ) 456 Say N if you want to disable CPU hotplug. 457 458config NR_CPUS 459 int "Maximum number of CPUs (2-256)" 460 range 2 256 461 depends on SMP 462 default "64" 463 help 464 This allows you to specify the maximum number of CPUs which this 465 kernel will support. 466 467config NUMA 468 bool "NUMA Support" 469 select SMP 470 select ACPI_NUMA if ACPI 471 help 472 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access) 473 support. This option improves performance on systems with more 474 than one NUMA node; on single node systems it is generally better 475 to leave it disabled. 476 477config NODES_SHIFT 478 int 479 default "6" 480 depends on NUMA 481 482config ARCH_FORCE_MAX_ORDER 483 int "Maximum zone order" 484 default "13" if PAGE_SIZE_64KB 485 default "11" if PAGE_SIZE_16KB 486 default "10" 487 help 488 The kernel memory allocator divides physically contiguous memory 489 blocks into "zones", where each zone is a power of two number of 490 pages. This option selects the largest power of two that the kernel 491 keeps in the memory allocator. If you need to allocate very large 492 blocks of physically contiguous memory, then you may need to 493 increase this value. 494 495 The page size is not necessarily 4KB. Keep this in mind 496 when choosing a value for this option. 497 498config ARCH_IOREMAP 499 bool "Enable LoongArch DMW-based ioremap()" 500 help 501 We use generic TLB-based ioremap() by default since it has page 502 protection support. However, you can enable LoongArch DMW-based 503 ioremap() for better performance. 504 505config ARCH_WRITECOMBINE 506 bool "Enable WriteCombine (WUC) for ioremap()" 507 help 508 LoongArch maintains cache coherency in hardware, but when paired 509 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which 510 is similar to WriteCombine) is out of the scope of cache coherency 511 machanism for PCIe devices (this is a PCIe protocol violation, which 512 may be fixed in newer chipsets). 513 514 This means WUC can only used for write-only memory regions now, so 515 this option is disabled by default, making WUC silently fallback to 516 SUC for ioremap(). You can enable this option if the kernel is ensured 517 to run on hardware without this bug. 518 519 You can override this setting via writecombine=on/off boot parameter. 520 521config ARCH_STRICT_ALIGN 522 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT 523 default y 524 help 525 Not all LoongArch cores support h/w unaligned access, we can use 526 -mstrict-align build parameter to prevent unaligned accesses. 527 528 CPUs with h/w unaligned access support: 529 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000. 530 531 CPUs without h/w unaligned access support: 532 Loongson-2K500/2K1000. 533 534 This option is enabled by default to make the kernel be able to run 535 on all LoongArch systems. But you can disable it manually if you want 536 to run kernel only on systems with h/w unaligned access support in 537 order to optimise for performance. 538 539config CPU_HAS_FPU 540 bool 541 default y 542 543config CPU_HAS_LSX 544 bool "Support for the Loongson SIMD Extension" 545 depends on AS_HAS_LSX_EXTENSION 546 help 547 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers 548 and a set of SIMD instructions to operate on them. When this option 549 is enabled the kernel will support allocating & switching LSX 550 vector register contexts. If you know that your kernel will only be 551 running on CPUs which do not support LSX or that your userland will 552 not be making use of it then you may wish to say N here to reduce 553 the size & complexity of your kernel. 554 555 If unsure, say Y. 556 557config CPU_HAS_LASX 558 bool "Support for the Loongson Advanced SIMD Extension" 559 depends on CPU_HAS_LSX 560 depends on AS_HAS_LASX_EXTENSION 561 help 562 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector 563 registers and a set of SIMD instructions to operate on them. When this 564 option is enabled the kernel will support allocating & switching LASX 565 vector register contexts. If you know that your kernel will only be 566 running on CPUs which do not support LASX or that your userland will 567 not be making use of it then you may wish to say N here to reduce 568 the size & complexity of your kernel. 569 570 If unsure, say Y. 571 572config CPU_HAS_LBT 573 bool "Support for the Loongson Binary Translation Extension" 574 depends on AS_HAS_LBT_EXTENSION 575 help 576 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 577 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). 578 Enabling this option allows the kernel to allocate and switch registers 579 specific to LBT. 580 581 If you want to use this feature, such as the Loongson Architecture 582 Translator (LAT), say Y. 583 584config CPU_HAS_PREFETCH 585 bool 586 default y 587 588config ARCH_SUPPORTS_KEXEC 589 def_bool y 590 591config ARCH_SUPPORTS_CRASH_DUMP 592 def_bool y 593 594config ARCH_SELECTS_CRASH_DUMP 595 def_bool y 596 depends on CRASH_DUMP 597 select RELOCATABLE 598 599config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 600 def_bool CRASH_CORE 601 602config RELOCATABLE 603 bool "Relocatable kernel" 604 help 605 This builds the kernel as a Position Independent Executable (PIE), 606 which retains all relocation metadata required, so as to relocate 607 the kernel binary at runtime to a different virtual address from 608 its link address. 609 610config RANDOMIZE_BASE 611 bool "Randomize the address of the kernel (KASLR)" 612 depends on RELOCATABLE 613 help 614 Randomizes the physical and virtual address at which the 615 kernel image is loaded, as a security feature that 616 deters exploit attempts relying on knowledge of the location 617 of kernel internals. 618 619 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 620 621 If unsure, say N. 622 623config RANDOMIZE_BASE_MAX_OFFSET 624 hex "Maximum KASLR offset" if EXPERT 625 depends on RANDOMIZE_BASE 626 range 0x0 0x10000000 627 default "0x01000000" 628 help 629 When KASLR is active, this provides the maximum offset that will 630 be applied to the kernel image. It should be set according to the 631 amount of physical RAM available in the target system. 632 633 This is limited by the size of the lower address memory, 256MB. 634 635config SECCOMP 636 bool "Enable seccomp to safely compute untrusted bytecode" 637 depends on PROC_FS 638 default y 639 help 640 This kernel feature is useful for number crunching applications 641 that may need to compute untrusted bytecode during their 642 execution. By using pipes or other transports made available to 643 the process as file descriptors supporting the read/write 644 syscalls, it's possible to isolate those applications in 645 their own address space using seccomp. Once seccomp is 646 enabled via /proc/<pid>/seccomp, it cannot be disabled 647 and the task is only allowed to execute a few safe syscalls 648 defined by each seccomp mode. 649 650 If unsure, say Y. Only embedded should say N here. 651 652endmenu 653 654config ARCH_SELECT_MEMORY_MODEL 655 def_bool y 656 657config ARCH_FLATMEM_ENABLE 658 def_bool y 659 depends on !NUMA 660 661config ARCH_SPARSEMEM_ENABLE 662 def_bool y 663 select SPARSEMEM_VMEMMAP_ENABLE 664 help 665 Say Y to support efficient handling of sparse physical memory, 666 for architectures which are either NUMA (Non-Uniform Memory Access) 667 or have huge holes in the physical address space for other reasons. 668 See <file:Documentation/mm/numa.rst> for more. 669 670config ARCH_ENABLE_THP_MIGRATION 671 def_bool y 672 depends on TRANSPARENT_HUGEPAGE 673 674config ARCH_MEMORY_PROBE 675 def_bool y 676 depends on MEMORY_HOTPLUG 677 678config MMU 679 bool 680 default y 681 682config ARCH_MMAP_RND_BITS_MIN 683 default 12 684 685config ARCH_MMAP_RND_BITS_MAX 686 default 18 687 688config ARCH_SUPPORTS_UPROBES 689 def_bool y 690 691config KASAN_SHADOW_OFFSET 692 hex 693 default 0x0 694 depends on KASAN 695 696menu "Power management options" 697 698config ARCH_SUSPEND_POSSIBLE 699 def_bool y 700 701config ARCH_HIBERNATION_POSSIBLE 702 def_bool y 703 704source "kernel/power/Kconfig" 705source "drivers/acpi/Kconfig" 706 707endmenu 708 709source "arch/loongarch/kvm/Kconfig" 710