1# SPDX-License-Identifier: GPL-2.0 2config LOONGARCH 3 bool 4 default y 5 select ACPI 6 select ACPI_GENERIC_GSI if ACPI 7 select ACPI_MCFG if ACPI 8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 9 select ACPI_PPTT if ACPI 10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 11 select ARCH_BINFMT_ELF_STATE 12 select ARCH_DISABLE_KASAN_INLINE 13 select ARCH_ENABLE_MEMORY_HOTPLUG 14 select ARCH_ENABLE_MEMORY_HOTREMOVE 15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 17 select ARCH_HAS_CPU_FINALIZE_INIT 18 select ARCH_HAS_FORTIFY_SOURCE 19 select ARCH_HAS_KCOV 20 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 21 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 22 select ARCH_HAS_PTE_SPECIAL 23 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 24 select ARCH_INLINE_READ_LOCK if !PREEMPTION 25 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 26 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 27 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 28 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 29 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 30 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 31 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 32 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 33 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 34 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 35 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 36 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 37 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 38 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 39 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 40 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 41 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 42 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 43 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 44 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 45 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 46 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 47 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 48 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 49 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 50 select ARCH_KEEP_MEMBLOCK 51 select ARCH_MIGHT_HAVE_PC_PARPORT 52 select ARCH_MIGHT_HAVE_PC_SERIO 53 select ARCH_SPARSEMEM_ENABLE 54 select ARCH_STACKWALK 55 select ARCH_SUPPORTS_ACPI 56 select ARCH_SUPPORTS_ATOMIC_RMW 57 select ARCH_SUPPORTS_HUGETLBFS 58 select ARCH_SUPPORTS_LTO_CLANG 59 select ARCH_SUPPORTS_LTO_CLANG_THIN 60 select ARCH_SUPPORTS_NUMA_BALANCING 61 select ARCH_USE_BUILTIN_BSWAP 62 select ARCH_USE_CMPXCHG_LOCKREF 63 select ARCH_USE_QUEUED_RWLOCKS 64 select ARCH_USE_QUEUED_SPINLOCKS 65 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 66 select ARCH_WANT_LD_ORPHAN_WARN 67 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 68 select ARCH_WANTS_NO_INSTR 69 select BUILDTIME_TABLE_SORT 70 select COMMON_CLK 71 select CPU_PM 72 select EFI 73 select GENERIC_CLOCKEVENTS 74 select GENERIC_CMOS_UPDATE 75 select GENERIC_CPU_AUTOPROBE 76 select GENERIC_CPU_DEVICES 77 select GENERIC_ENTRY 78 select GENERIC_GETTIMEOFDAY 79 select GENERIC_IOREMAP if !ARCH_IOREMAP 80 select GENERIC_IRQ_MULTI_HANDLER 81 select GENERIC_IRQ_PROBE 82 select GENERIC_IRQ_SHOW 83 select GENERIC_LIB_ASHLDI3 84 select GENERIC_LIB_ASHRDI3 85 select GENERIC_LIB_CMPDI2 86 select GENERIC_LIB_LSHRDI3 87 select GENERIC_LIB_UCMPDI2 88 select GENERIC_LIB_DEVMEM_IS_ALLOWED 89 select GENERIC_PCI_IOMAP 90 select GENERIC_SCHED_CLOCK 91 select GENERIC_SMP_IDLE_THREAD 92 select GENERIC_TIME_VSYSCALL 93 select GENERIC_VDSO_TIME_NS 94 select GPIOLIB 95 select HAS_IOPORT 96 select HAVE_ARCH_AUDITSYSCALL 97 select HAVE_ARCH_JUMP_LABEL 98 select HAVE_ARCH_JUMP_LABEL_RELATIVE 99 select HAVE_ARCH_KASAN 100 select HAVE_ARCH_KFENCE 101 select HAVE_ARCH_KGDB if PERF_EVENTS 102 select HAVE_ARCH_MMAP_RND_BITS if MMU 103 select HAVE_ARCH_SECCOMP 104 select HAVE_ARCH_SECCOMP_FILTER 105 select HAVE_ARCH_TRACEHOOK 106 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 107 select HAVE_ASM_MODVERSIONS 108 select HAVE_CONTEXT_TRACKING_USER 109 select HAVE_C_RECORDMCOUNT 110 select HAVE_DEBUG_KMEMLEAK 111 select HAVE_DEBUG_STACKOVERFLOW 112 select HAVE_DMA_CONTIGUOUS 113 select HAVE_DYNAMIC_FTRACE 114 select HAVE_DYNAMIC_FTRACE_WITH_ARGS 115 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 116 select HAVE_DYNAMIC_FTRACE_WITH_REGS 117 select HAVE_EBPF_JIT 118 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN 119 select HAVE_EXIT_THREAD 120 select HAVE_FAST_GUP 121 select HAVE_FTRACE_MCOUNT_RECORD 122 select HAVE_FUNCTION_ARG_ACCESS_API 123 select HAVE_FUNCTION_ERROR_INJECTION 124 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 125 select HAVE_FUNCTION_GRAPH_TRACER 126 select HAVE_FUNCTION_TRACER 127 select HAVE_GCC_PLUGINS 128 select HAVE_GENERIC_VDSO 129 select HAVE_HW_BREAKPOINT if PERF_EVENTS 130 select HAVE_IOREMAP_PROT 131 select HAVE_IRQ_EXIT_ON_IRQ_STACK 132 select HAVE_IRQ_TIME_ACCOUNTING 133 select HAVE_KPROBES 134 select HAVE_KPROBES_ON_FTRACE 135 select HAVE_KRETPROBES 136 select HAVE_KVM 137 select HAVE_MOD_ARCH_SPECIFIC 138 select HAVE_NMI 139 select HAVE_PCI 140 select HAVE_PERF_EVENTS 141 select HAVE_PERF_REGS 142 select HAVE_PERF_USER_STACK_DUMP 143 select HAVE_PREEMPT_DYNAMIC_KEY 144 select HAVE_REGS_AND_STACK_ACCESS_API 145 select HAVE_RETHOOK 146 select HAVE_RSEQ 147 select HAVE_RUST 148 select HAVE_SAMPLE_FTRACE_DIRECT 149 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 150 select HAVE_SETUP_PER_CPU_AREA if NUMA 151 select HAVE_STACKPROTECTOR 152 select HAVE_SYSCALL_TRACEPOINTS 153 select HAVE_TIF_NOHZ 154 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP 155 select IRQ_FORCED_THREADING 156 select IRQ_LOONGARCH_CPU 157 select LOCK_MM_AND_FIND_VMA 158 select MMU_GATHER_MERGE_VMAS if MMU 159 select MODULES_USE_ELF_RELA if MODULES 160 select NEED_PER_CPU_EMBED_FIRST_CHUNK 161 select NEED_PER_CPU_PAGE_FIRST_CHUNK 162 select OF 163 select OF_EARLY_FLATTREE 164 select PCI 165 select PCI_DOMAINS_GENERIC 166 select PCI_ECAM if ACPI 167 select PCI_LOONGSON 168 select PCI_MSI_ARCH_FALLBACKS 169 select PCI_QUIRKS 170 select PERF_USE_VMALLOC 171 select RTC_LIB 172 select SMP 173 select SPARSE_IRQ 174 select SYSCTL_ARCH_UNALIGN_ALLOW 175 select SYSCTL_ARCH_UNALIGN_NO_WARN 176 select SYSCTL_EXCEPTION_TRACE 177 select SWIOTLB 178 select TRACE_IRQFLAGS_SUPPORT 179 select USE_PERCPU_NUMA_NODE_ID 180 select USER_STACKTRACE_SUPPORT 181 select ZONE_DMA32 182 183config 32BIT 184 bool 185 186config 64BIT 187 def_bool y 188 189config GENERIC_BUG 190 def_bool y 191 depends on BUG 192 193config GENERIC_BUG_RELATIVE_POINTERS 194 def_bool y 195 depends on GENERIC_BUG 196 197config GENERIC_CALIBRATE_DELAY 198 def_bool y 199 200config GENERIC_CSUM 201 def_bool y 202 203config GENERIC_HWEIGHT 204 def_bool y 205 206config L1_CACHE_SHIFT 207 int 208 default "6" 209 210config LOCKDEP_SUPPORT 211 bool 212 default y 213 214config STACKTRACE_SUPPORT 215 bool 216 default y 217 218# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the 219# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that 220# are shared between architectures, and specifically expecting the symbols. 221config MACH_LOONGSON32 222 def_bool 32BIT 223 224config MACH_LOONGSON64 225 def_bool 64BIT 226 227config FIX_EARLYCON_MEM 228 def_bool y 229 230config PAGE_SIZE_4KB 231 bool 232 233config PAGE_SIZE_16KB 234 bool 235 236config PAGE_SIZE_64KB 237 bool 238 239config PGTABLE_2LEVEL 240 bool 241 242config PGTABLE_3LEVEL 243 bool 244 245config PGTABLE_4LEVEL 246 bool 247 248config PGTABLE_LEVELS 249 int 250 default 2 if PGTABLE_2LEVEL 251 default 3 if PGTABLE_3LEVEL 252 default 4 if PGTABLE_4LEVEL 253 254config SCHED_OMIT_FRAME_POINTER 255 bool 256 default y 257 258config AS_HAS_EXPLICIT_RELOCS 259 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) 260 261config AS_HAS_FCSR_CLASS 262 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 263 264config AS_HAS_LSX_EXTENSION 265 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) 266 267config AS_HAS_LASX_EXTENSION 268 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) 269 270config AS_HAS_LBT_EXTENSION 271 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) 272 273config AS_HAS_LVZ_EXTENSION 274 def_bool $(as-instr,hvcl 0) 275 276menu "Kernel type and options" 277 278source "kernel/Kconfig.hz" 279 280choice 281 prompt "Page Table Layout" 282 default 16KB_2LEVEL if 32BIT 283 default 16KB_3LEVEL if 64BIT 284 help 285 Allows choosing the page table layout, which is a combination 286 of page size and page table levels. The size of virtual memory 287 address space are determined by the page table layout. 288 289config 4KB_3LEVEL 290 bool "4KB with 3 levels" 291 select PAGE_SIZE_4KB 292 select PGTABLE_3LEVEL 293 help 294 This option selects 4KB page size with 3 level page tables, which 295 support a maximum of 39 bits of application virtual memory. 296 297config 4KB_4LEVEL 298 bool "4KB with 4 levels" 299 select PAGE_SIZE_4KB 300 select PGTABLE_4LEVEL 301 help 302 This option selects 4KB page size with 4 level page tables, which 303 support a maximum of 48 bits of application virtual memory. 304 305config 16KB_2LEVEL 306 bool "16KB with 2 levels" 307 select PAGE_SIZE_16KB 308 select PGTABLE_2LEVEL 309 help 310 This option selects 16KB page size with 2 level page tables, which 311 support a maximum of 36 bits of application virtual memory. 312 313config 16KB_3LEVEL 314 bool "16KB with 3 levels" 315 select PAGE_SIZE_16KB 316 select PGTABLE_3LEVEL 317 help 318 This option selects 16KB page size with 3 level page tables, which 319 support a maximum of 47 bits of application virtual memory. 320 321config 64KB_2LEVEL 322 bool "64KB with 2 levels" 323 select PAGE_SIZE_64KB 324 select PGTABLE_2LEVEL 325 help 326 This option selects 64KB page size with 2 level page tables, which 327 support a maximum of 42 bits of application virtual memory. 328 329config 64KB_3LEVEL 330 bool "64KB with 3 levels" 331 select PAGE_SIZE_64KB 332 select PGTABLE_3LEVEL 333 help 334 This option selects 64KB page size with 3 level page tables, which 335 support a maximum of 55 bits of application virtual memory. 336 337endchoice 338 339config CMDLINE 340 string "Built-in kernel command line" 341 help 342 For most platforms, the arguments for the kernel's command line 343 are provided at run-time, during boot. However, there are cases 344 where either no arguments are being provided or the provided 345 arguments are insufficient or even invalid. 346 347 When that occurs, it is possible to define a built-in command 348 line here and choose how the kernel should use it later on. 349 350choice 351 prompt "Kernel command line type" 352 default CMDLINE_BOOTLOADER 353 help 354 Choose how the kernel will handle the provided built-in command 355 line. 356 357config CMDLINE_BOOTLOADER 358 bool "Use bootloader kernel arguments if available" 359 help 360 Prefer the command-line passed by the boot loader if available. 361 Use the built-in command line as fallback in case we get nothing 362 during boot. This is the default behaviour. 363 364config CMDLINE_EXTEND 365 bool "Use built-in to extend bootloader kernel arguments" 366 help 367 The command-line arguments provided during boot will be 368 appended to the built-in command line. This is useful in 369 cases where the provided arguments are insufficient and 370 you don't want to or cannot modify them. 371 372config CMDLINE_FORCE 373 bool "Always use the built-in kernel command string" 374 help 375 Always use the built-in command line, even if we get one during 376 boot. This is useful in case you need to override the provided 377 command line on systems where you don't have or want control 378 over it. 379 380endchoice 381 382config BUILTIN_DTB 383 bool "Enable built-in dtb in kernel" 384 depends on OF 385 help 386 Some existing systems do not provide a canonical device tree to 387 the kernel at boot time. Let's provide a device tree table in the 388 kernel, keyed by the dts filename, containing the relevant DTBs. 389 390 Built-in DTBs are generic enough and can be used as references. 391 392config BUILTIN_DTB_NAME 393 string "Source file for built-in dtb" 394 depends on BUILTIN_DTB 395 help 396 Base name (without suffix, relative to arch/loongarch/boot/dts/) 397 for the DTS file that will be used to produce the DTB linked into 398 the kernel. 399 400config DMI 401 bool "Enable DMI scanning" 402 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 403 default y 404 help 405 This enables SMBIOS/DMI feature for systems, and scanning of 406 DMI to identify machine quirks. 407 408config EFI 409 bool "EFI runtime service support" 410 select UCS2_STRING 411 select EFI_RUNTIME_WRAPPERS 412 help 413 This enables the kernel to use EFI runtime services that are 414 available (such as the EFI variable services). 415 416config EFI_STUB 417 bool "EFI boot stub support" 418 default y 419 depends on EFI 420 select EFI_GENERIC_STUB 421 help 422 This kernel feature allows the kernel to be loaded directly by 423 EFI firmware without the use of a bootloader. 424 425config SCHED_SMT 426 bool "SMT scheduler support" 427 default y 428 help 429 Improves scheduler's performance when there are multiple 430 threads in one physical core. 431 432config SMP 433 bool "Multi-Processing support" 434 help 435 This enables support for systems with more than one CPU. If you have 436 a system with only one CPU, say N. If you have a system with more 437 than one CPU, say Y. 438 439 If you say N here, the kernel will run on uni- and multiprocessor 440 machines, but will use only one CPU of a multiprocessor machine. If 441 you say Y here, the kernel will run on many, but not all, 442 uniprocessor machines. On a uniprocessor machine, the kernel 443 will run faster if you say N here. 444 445 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. 446 447 If you don't know what to do here, say N. 448 449config HOTPLUG_CPU 450 bool "Support for hot-pluggable CPUs" 451 depends on SMP 452 select GENERIC_IRQ_MIGRATION 453 help 454 Say Y here to allow turning CPUs off and on. CPUs can be 455 controlled through /sys/devices/system/cpu. 456 (Note: power management support will enable this option 457 automatically on SMP systems. ) 458 Say N if you want to disable CPU hotplug. 459 460config NR_CPUS 461 int "Maximum number of CPUs (2-256)" 462 range 2 256 463 depends on SMP 464 default "64" 465 help 466 This allows you to specify the maximum number of CPUs which this 467 kernel will support. 468 469config NUMA 470 bool "NUMA Support" 471 select SMP 472 select ACPI_NUMA if ACPI 473 help 474 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access) 475 support. This option improves performance on systems with more 476 than one NUMA node; on single node systems it is generally better 477 to leave it disabled. 478 479config NODES_SHIFT 480 int 481 default "6" 482 depends on NUMA 483 484config ARCH_FORCE_MAX_ORDER 485 int "Maximum zone order" 486 default "13" if PAGE_SIZE_64KB 487 default "11" if PAGE_SIZE_16KB 488 default "10" 489 help 490 The kernel memory allocator divides physically contiguous memory 491 blocks into "zones", where each zone is a power of two number of 492 pages. This option selects the largest power of two that the kernel 493 keeps in the memory allocator. If you need to allocate very large 494 blocks of physically contiguous memory, then you may need to 495 increase this value. 496 497 The page size is not necessarily 4KB. Keep this in mind 498 when choosing a value for this option. 499 500config ARCH_IOREMAP 501 bool "Enable LoongArch DMW-based ioremap()" 502 help 503 We use generic TLB-based ioremap() by default since it has page 504 protection support. However, you can enable LoongArch DMW-based 505 ioremap() for better performance. 506 507config ARCH_WRITECOMBINE 508 bool "Enable WriteCombine (WUC) for ioremap()" 509 help 510 LoongArch maintains cache coherency in hardware, but when paired 511 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which 512 is similar to WriteCombine) is out of the scope of cache coherency 513 machanism for PCIe devices (this is a PCIe protocol violation, which 514 may be fixed in newer chipsets). 515 516 This means WUC can only used for write-only memory regions now, so 517 this option is disabled by default, making WUC silently fallback to 518 SUC for ioremap(). You can enable this option if the kernel is ensured 519 to run on hardware without this bug. 520 521 You can override this setting via writecombine=on/off boot parameter. 522 523config ARCH_STRICT_ALIGN 524 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT 525 default y 526 help 527 Not all LoongArch cores support h/w unaligned access, we can use 528 -mstrict-align build parameter to prevent unaligned accesses. 529 530 CPUs with h/w unaligned access support: 531 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000. 532 533 CPUs without h/w unaligned access support: 534 Loongson-2K500/2K1000. 535 536 This option is enabled by default to make the kernel be able to run 537 on all LoongArch systems. But you can disable it manually if you want 538 to run kernel only on systems with h/w unaligned access support in 539 order to optimise for performance. 540 541config CPU_HAS_FPU 542 bool 543 default y 544 545config CPU_HAS_LSX 546 bool "Support for the Loongson SIMD Extension" 547 depends on AS_HAS_LSX_EXTENSION 548 help 549 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers 550 and a set of SIMD instructions to operate on them. When this option 551 is enabled the kernel will support allocating & switching LSX 552 vector register contexts. If you know that your kernel will only be 553 running on CPUs which do not support LSX or that your userland will 554 not be making use of it then you may wish to say N here to reduce 555 the size & complexity of your kernel. 556 557 If unsure, say Y. 558 559config CPU_HAS_LASX 560 bool "Support for the Loongson Advanced SIMD Extension" 561 depends on CPU_HAS_LSX 562 depends on AS_HAS_LASX_EXTENSION 563 help 564 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector 565 registers and a set of SIMD instructions to operate on them. When this 566 option is enabled the kernel will support allocating & switching LASX 567 vector register contexts. If you know that your kernel will only be 568 running on CPUs which do not support LASX or that your userland will 569 not be making use of it then you may wish to say N here to reduce 570 the size & complexity of your kernel. 571 572 If unsure, say Y. 573 574config CPU_HAS_LBT 575 bool "Support for the Loongson Binary Translation Extension" 576 depends on AS_HAS_LBT_EXTENSION 577 help 578 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 579 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). 580 Enabling this option allows the kernel to allocate and switch registers 581 specific to LBT. 582 583 If you want to use this feature, such as the Loongson Architecture 584 Translator (LAT), say Y. 585 586config CPU_HAS_PREFETCH 587 bool 588 default y 589 590config ARCH_SUPPORTS_KEXEC 591 def_bool y 592 593config ARCH_SUPPORTS_CRASH_DUMP 594 def_bool y 595 596config ARCH_SELECTS_CRASH_DUMP 597 def_bool y 598 depends on CRASH_DUMP 599 select RELOCATABLE 600 601config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 602 def_bool CRASH_CORE 603 604config RELOCATABLE 605 bool "Relocatable kernel" 606 help 607 This builds the kernel as a Position Independent Executable (PIE), 608 which retains all relocation metadata required, so as to relocate 609 the kernel binary at runtime to a different virtual address from 610 its link address. 611 612config RANDOMIZE_BASE 613 bool "Randomize the address of the kernel (KASLR)" 614 depends on RELOCATABLE 615 help 616 Randomizes the physical and virtual address at which the 617 kernel image is loaded, as a security feature that 618 deters exploit attempts relying on knowledge of the location 619 of kernel internals. 620 621 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 622 623 If unsure, say N. 624 625config RANDOMIZE_BASE_MAX_OFFSET 626 hex "Maximum KASLR offset" if EXPERT 627 depends on RANDOMIZE_BASE 628 range 0x0 0x10000000 629 default "0x01000000" 630 help 631 When KASLR is active, this provides the maximum offset that will 632 be applied to the kernel image. It should be set according to the 633 amount of physical RAM available in the target system. 634 635 This is limited by the size of the lower address memory, 256MB. 636 637endmenu 638 639config ARCH_SELECT_MEMORY_MODEL 640 def_bool y 641 642config ARCH_FLATMEM_ENABLE 643 def_bool y 644 depends on !NUMA 645 646config ARCH_SPARSEMEM_ENABLE 647 def_bool y 648 select SPARSEMEM_VMEMMAP_ENABLE 649 help 650 Say Y to support efficient handling of sparse physical memory, 651 for architectures which are either NUMA (Non-Uniform Memory Access) 652 or have huge holes in the physical address space for other reasons. 653 See <file:Documentation/mm/numa.rst> for more. 654 655config ARCH_MEMORY_PROBE 656 def_bool y 657 depends on MEMORY_HOTPLUG 658 659config MMU 660 bool 661 default y 662 663config ARCH_MMAP_RND_BITS_MIN 664 default 12 665 666config ARCH_MMAP_RND_BITS_MAX 667 default 18 668 669config ARCH_SUPPORTS_UPROBES 670 def_bool y 671 672config KASAN_SHADOW_OFFSET 673 hex 674 default 0x0 675 depends on KASAN 676 677menu "Power management options" 678 679config ARCH_SUSPEND_POSSIBLE 680 def_bool y 681 682config ARCH_HIBERNATION_POSSIBLE 683 def_bool y 684 685source "kernel/power/Kconfig" 686source "drivers/acpi/Kconfig" 687 688endmenu 689 690source "arch/loongarch/kvm/Kconfig" 691