xref: /linux/arch/csky/include/asm/pgtable.h (revision f7536442353d1b6bb0c7c8ad1ec549d9fa215106)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __ASM_CSKY_PGTABLE_H
4 #define __ASM_CSKY_PGTABLE_H
5 
6 #include <asm/fixmap.h>
7 #include <asm/memory.h>
8 #include <asm/addrspace.h>
9 #include <abi/pgtable-bits.h>
10 #include <asm-generic/pgtable-nopmd.h>
11 
12 #define PGDIR_SHIFT		22
13 #define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
14 #define PGDIR_MASK		(~(PGDIR_SIZE-1))
15 
16 #define USER_PTRS_PER_PGD	(PAGE_OFFSET/PGDIR_SIZE)
17 
18 /*
19  * C-SKY is two-level paging structure:
20  */
21 
22 #define PTRS_PER_PGD	(PAGE_SIZE / sizeof(pgd_t))
23 #define PTRS_PER_PMD	1
24 #define PTRS_PER_PTE	(PAGE_SIZE / sizeof(pte_t))
25 
26 #define pte_ERROR(e) \
27 	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
28 #define pgd_ERROR(e) \
29 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
30 
31 #define pmd_pfn(pmd)	(pmd_phys(pmd) >> PAGE_SHIFT)
32 #define pmd_page(pmd)	(pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
33 #define pte_clear(mm, addr, ptep)	set_pte((ptep), \
34 	(((unsigned int) addr >= PAGE_OFFSET) ? __pte(_PAGE_GLOBAL) : __pte(0)))
35 #define pte_none(pte)		(!(pte_val(pte) & ~_PAGE_GLOBAL))
36 #define pte_present(pte)	(pte_val(pte) & _PAGE_PRESENT)
37 #define pte_pfn(x)	((unsigned long)((x).pte_low >> PAGE_SHIFT))
38 #define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \
39 				| pgprot_val(prot))
40 
41 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
42 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
43 
44 #define pte_page(x)			pfn_to_page(pte_pfn(x))
45 #define __mk_pte(page_nr, pgprot)	__pte(((page_nr) << PAGE_SHIFT) | \
46 					pgprot_val(pgprot))
47 
48 /*
49  * C-SKY only has VALID and DIRTY bit in hardware. So we need to use the
50  * two bits emulate PRESENT, READ, WRITE, EXEC, MODIFIED, ACCESSED.
51  */
52 #define _PAGE_BASE	(_PAGE_PRESENT | _PAGE_ACCESSED)
53 
54 #define PAGE_NONE	__pgprot(_PAGE_PROT_NONE)
55 #define PAGE_READ	__pgprot(_PAGE_BASE | _PAGE_READ | \
56 				_CACHE_CACHED)
57 #define PAGE_WRITE	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE | \
58 				_CACHE_CACHED)
59 #define PAGE_SHARED PAGE_WRITE
60 
61 #define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
62 				_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
63 				_PAGE_GLOBAL | \
64 				_CACHE_CACHED)
65 
66 #define _PAGE_IOREMAP		(_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
67 				_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
68 				_PAGE_GLOBAL | \
69 				_CACHE_UNCACHED | _PAGE_SO)
70 
71 #define _PAGE_CHG_MASK	(~(unsigned long) \
72 				(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
73 				_CACHE_MASK | _PAGE_GLOBAL))
74 
75 #define MAX_SWAPFILES_CHECK() \
76 		BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
77 
78 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
79 #define ZERO_PAGE(vaddr)	(virt_to_page(empty_zero_page))
80 
81 extern void load_pgd(unsigned long pg_dir);
82 extern pte_t invalid_pte_table[PTRS_PER_PTE];
83 
84 static inline void set_pte(pte_t *p, pte_t pte)
85 {
86 	*p = pte;
87 #if defined(CONFIG_CPU_NEED_TLBSYNC)
88 	dcache_wb_line((u32)p);
89 #endif
90 	/* prevent out of order excution */
91 	smp_mb();
92 }
93 #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
94 
95 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
96 {
97 	unsigned long ptr;
98 
99 	ptr = pmd_val(pmd);
100 
101 	return __va(ptr);
102 }
103 
104 #define pmd_phys(pmd) pmd_val(pmd)
105 
106 static inline void set_pmd(pmd_t *p, pmd_t pmd)
107 {
108 	*p = pmd;
109 #if defined(CONFIG_CPU_NEED_TLBSYNC)
110 	dcache_wb_line((u32)p);
111 #endif
112 	/* prevent specul excute */
113 	smp_mb();
114 }
115 
116 
117 static inline int pmd_none(pmd_t pmd)
118 {
119 	return pmd_val(pmd) == __pa(invalid_pte_table);
120 }
121 
122 #define pmd_bad(pmd)	(pmd_val(pmd) & ~PAGE_MASK)
123 
124 static inline int pmd_present(pmd_t pmd)
125 {
126 	return (pmd_val(pmd) != __pa(invalid_pte_table));
127 }
128 
129 static inline void pmd_clear(pmd_t *p)
130 {
131 	pmd_val(*p) = (__pa(invalid_pte_table));
132 #if defined(CONFIG_CPU_NEED_TLBSYNC)
133 	dcache_wb_line((u32)p);
134 #endif
135 }
136 
137 /*
138  * The following only work if pte_present() is true.
139  * Undefined behaviour if not..
140  */
141 static inline int pte_read(pte_t pte)
142 {
143 	return pte.pte_low & _PAGE_READ;
144 }
145 
146 static inline int pte_write(pte_t pte)
147 {
148 	return (pte).pte_low & _PAGE_WRITE;
149 }
150 
151 static inline int pte_dirty(pte_t pte)
152 {
153 	return (pte).pte_low & _PAGE_MODIFIED;
154 }
155 
156 static inline int pte_young(pte_t pte)
157 {
158 	return (pte).pte_low & _PAGE_ACCESSED;
159 }
160 
161 static inline pte_t pte_wrprotect(pte_t pte)
162 {
163 	pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_DIRTY);
164 	return pte;
165 }
166 
167 static inline pte_t pte_mkclean(pte_t pte)
168 {
169 	pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_DIRTY);
170 	return pte;
171 }
172 
173 static inline pte_t pte_mkold(pte_t pte)
174 {
175 	pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_VALID);
176 	return pte;
177 }
178 
179 static inline pte_t pte_mkwrite(pte_t pte)
180 {
181 	pte_val(pte) |= _PAGE_WRITE;
182 	if (pte_val(pte) & _PAGE_MODIFIED)
183 		pte_val(pte) |= _PAGE_DIRTY;
184 	return pte;
185 }
186 
187 static inline pte_t pte_mkdirty(pte_t pte)
188 {
189 	pte_val(pte) |= _PAGE_MODIFIED;
190 	if (pte_val(pte) & _PAGE_WRITE)
191 		pte_val(pte) |= _PAGE_DIRTY;
192 	return pte;
193 }
194 
195 static inline pte_t pte_mkyoung(pte_t pte)
196 {
197 	pte_val(pte) |= _PAGE_ACCESSED;
198 	if (pte_val(pte) & _PAGE_READ)
199 		pte_val(pte) |= _PAGE_VALID;
200 	return pte;
201 }
202 
203 #define __HAVE_PHYS_MEM_ACCESS_PROT
204 struct file;
205 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
206 				     unsigned long size, pgprot_t vma_prot);
207 
208 /*
209  * Macro to make mark a page protection value as "uncacheable".  Note
210  * that "protection" is really a misnomer here as the protection value
211  * contains the memory attribute bits, dirty bits, and various other
212  * bits as well.
213  */
214 #define pgprot_noncached pgprot_noncached
215 
216 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
217 {
218 	unsigned long prot = pgprot_val(_prot);
219 
220 	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED | _PAGE_SO;
221 
222 	return __pgprot(prot);
223 }
224 
225 #define pgprot_writecombine pgprot_writecombine
226 static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
227 {
228 	unsigned long prot = pgprot_val(_prot);
229 
230 	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
231 
232 	return __pgprot(prot);
233 }
234 
235 /*
236  * Conversion functions: convert a page and protection to a page entry,
237  * and a page entry and page directory to the page they refer to.
238  */
239 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
240 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
241 {
242 	return __pte((pte_val(pte) & _PAGE_CHG_MASK) |
243 		     (pgprot_val(newprot)));
244 }
245 
246 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
247 extern void paging_init(void);
248 
249 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
250 		      pte_t *pte);
251 
252 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
253 #define kern_addr_valid(addr)	(1)
254 
255 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
256 	remap_pfn_range(vma, vaddr, pfn, size, prot)
257 
258 #endif /* __ASM_CSKY_PGTABLE_H */
259