xref: /linux/arch/csky/include/asm/pgtable.h (revision 5b0764a53235d3c77e1ed674e836e1b3fe1a4b1f) 
1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __ASM_CSKY_PGTABLE_H
4 #define __ASM_CSKY_PGTABLE_H
5 
6 #include <asm/fixmap.h>
7 #include <asm/memory.h>
8 #include <asm/addrspace.h>
9 #include <abi/pgtable-bits.h>
10 #include <asm-generic/pgtable-nopmd.h>
11 
12 #define PGDIR_SHIFT		22
13 #define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
14 #define PGDIR_MASK		(~(PGDIR_SIZE-1))
15 
16 #define USER_PTRS_PER_PGD	(PAGE_OFFSET/PGDIR_SIZE)
17 
18 /*
19  * C-SKY is two-level paging structure:
20  */
21 
22 #define PTRS_PER_PGD	(PAGE_SIZE / sizeof(pgd_t))
23 #define PTRS_PER_PMD	1
24 #define PTRS_PER_PTE	(PAGE_SIZE / sizeof(pte_t))
25 
26 
27 #define PFN_PTE_SHIFT	PAGE_SHIFT
28 #define pmd_pfn(pmd)	(pmd_phys(pmd) >> PAGE_SHIFT)
29 #define pmd_page(pmd)	(pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
30 #define pte_clear(mm, addr, ptep)	set_pte((ptep), \
31 	(((unsigned int) addr >= PAGE_OFFSET) ? __pte(_PAGE_GLOBAL) : __pte(0)))
32 #define pte_none(pte)		(!(pte_val(pte) & ~_PAGE_GLOBAL))
33 #define pte_present(pte)	(pte_val(pte) & _PAGE_PRESENT)
34 #define pte_pfn(x)	((unsigned long)((x).pte_low >> PAGE_SHIFT))
35 #define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \
36 				| pgprot_val(prot))
37 
38 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
39 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
40 
41 #define pte_page(x)			pfn_to_page(pte_pfn(x))
42 #define __mk_pte(page_nr, pgprot)	__pte(((page_nr) << PAGE_SHIFT) | \
43 					pgprot_val(pgprot))
44 
45 /*
46  * C-SKY only has VALID and DIRTY bit in hardware. So we need to use the
47  * two bits emulate PRESENT, READ, WRITE, EXEC, MODIFIED, ACCESSED.
48  */
49 #define _PAGE_BASE	(_PAGE_PRESENT | _PAGE_ACCESSED)
50 
51 #define PAGE_NONE	__pgprot(_PAGE_PROT_NONE)
52 #define PAGE_READ	__pgprot(_PAGE_BASE | _PAGE_READ | \
53 				_CACHE_CACHED)
54 #define PAGE_WRITE	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE | \
55 				_CACHE_CACHED)
56 #define PAGE_SHARED PAGE_WRITE
57 
58 #define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
59 				_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
60 				_PAGE_GLOBAL | \
61 				_CACHE_CACHED)
62 
63 #define _PAGE_IOREMAP		(_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
64 				_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
65 				_PAGE_GLOBAL | \
66 				_CACHE_UNCACHED | _PAGE_SO)
67 
68 #define _PAGE_CHG_MASK	(~(unsigned long) \
69 				(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
70 				_CACHE_MASK | _PAGE_GLOBAL))
71 
72 #define MAX_SWAPFILES_CHECK() \
73 		BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
74 
75 extern void load_pgd(unsigned long pg_dir);
76 extern pte_t invalid_pte_table[PTRS_PER_PTE];
77 
78 static inline void set_pte(pte_t *p, pte_t pte)
79 {
80 	*p = pte;
81 #if defined(CONFIG_CPU_NEED_TLBSYNC)
82 	dcache_wb_line((u32)p);
83 #endif
84 	/* prevent out of order excution */
85 	smp_mb();
86 }
87 
88 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
89 {
90 	unsigned long ptr;
91 
92 	ptr = pmd_val(pmd);
93 
94 	return __va(ptr);
95 }
96 
97 #define pmd_phys(pmd) pmd_val(pmd)
98 
99 static inline void set_pmd(pmd_t *p, pmd_t pmd)
100 {
101 	*p = pmd;
102 #if defined(CONFIG_CPU_NEED_TLBSYNC)
103 	dcache_wb_line((u32)p);
104 #endif
105 	/* prevent specul excute */
106 	smp_mb();
107 }
108 
109 
110 static inline int pmd_none(pmd_t pmd)
111 {
112 	return pmd_val(pmd) == __pa(invalid_pte_table);
113 }
114 
115 #define pmd_bad(pmd)	(pmd_val(pmd) & ~PAGE_MASK)
116 
117 static inline int pmd_present(pmd_t pmd)
118 {
119 	return (pmd_val(pmd) != __pa(invalid_pte_table));
120 }
121 
122 static inline void pmd_clear(pmd_t *p)
123 {
124 	pmd_val(*p) = (__pa(invalid_pte_table));
125 #if defined(CONFIG_CPU_NEED_TLBSYNC)
126 	dcache_wb_line((u32)p);
127 #endif
128 }
129 
130 /*
131  * The following only work if pte_present() is true.
132  * Undefined behaviour if not..
133  */
134 static inline int pte_read(pte_t pte)
135 {
136 	return pte.pte_low & _PAGE_READ;
137 }
138 
139 static inline int pte_write(pte_t pte)
140 {
141 	return (pte).pte_low & _PAGE_WRITE;
142 }
143 
144 static inline int pte_dirty(pte_t pte)
145 {
146 	return (pte).pte_low & _PAGE_MODIFIED;
147 }
148 
149 static inline int pte_young(pte_t pte)
150 {
151 	return (pte).pte_low & _PAGE_ACCESSED;
152 }
153 
154 static inline pte_t pte_wrprotect(pte_t pte)
155 {
156 	pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_DIRTY);
157 	return pte;
158 }
159 
160 static inline pte_t pte_mkclean(pte_t pte)
161 {
162 	pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_DIRTY);
163 	return pte;
164 }
165 
166 static inline pte_t pte_mkold(pte_t pte)
167 {
168 	pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_VALID);
169 	return pte;
170 }
171 
172 static inline pte_t pte_mkwrite_novma(pte_t pte)
173 {
174 	pte_val(pte) |= _PAGE_WRITE;
175 	if (pte_val(pte) & _PAGE_MODIFIED)
176 		pte_val(pte) |= _PAGE_DIRTY;
177 	return pte;
178 }
179 
180 static inline pte_t pte_mkdirty(pte_t pte)
181 {
182 	pte_val(pte) |= _PAGE_MODIFIED;
183 	if (pte_val(pte) & _PAGE_WRITE)
184 		pte_val(pte) |= _PAGE_DIRTY;
185 	return pte;
186 }
187 
188 static inline pte_t pte_mkyoung(pte_t pte)
189 {
190 	pte_val(pte) |= _PAGE_ACCESSED;
191 	if (pte_val(pte) & _PAGE_READ)
192 		pte_val(pte) |= _PAGE_VALID;
193 	return pte;
194 }
195 
196 static inline bool pte_swp_exclusive(pte_t pte)
197 {
198 	return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
199 }
200 
201 static inline pte_t pte_swp_mkexclusive(pte_t pte)
202 {
203 	pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;
204 	return pte;
205 }
206 
207 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
208 {
209 	pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;
210 	return pte;
211 }
212 
213 #define __HAVE_PHYS_MEM_ACCESS_PROT
214 struct file;
215 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
216 				     unsigned long size, pgprot_t vma_prot);
217 
218 /*
219  * Macro to make mark a page protection value as "uncacheable".  Note
220  * that "protection" is really a misnomer here as the protection value
221  * contains the memory attribute bits, dirty bits, and various other
222  * bits as well.
223  */
224 #define pgprot_noncached pgprot_noncached
225 
226 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
227 {
228 	unsigned long prot = pgprot_val(_prot);
229 
230 	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED | _PAGE_SO;
231 
232 	return __pgprot(prot);
233 }
234 
235 #define pgprot_writecombine pgprot_writecombine
236 static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
237 {
238 	unsigned long prot = pgprot_val(_prot);
239 
240 	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
241 
242 	return __pgprot(prot);
243 }
244 
245 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
246 {
247 	return __pte((pte_val(pte) & _PAGE_CHG_MASK) |
248 		     (pgprot_val(newprot)));
249 }
250 
251 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
252 extern void paging_init(void);
253 
254 void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,
255 		unsigned long address, pte_t *pte, unsigned int nr);
256 #define update_mmu_cache(vma, addr, ptep) \
257 	update_mmu_cache_range(NULL, vma, addr, ptep, 1)
258 
259 #endif /* __ASM_CSKY_PGTABLE_H */
260