1 /* SPDX-License-Identifier: GPL-2.0 */ 2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4 #ifndef __ASM_CSKY_IO_H 5 #define __ASM_CSKY_IO_H 6 7 #include <asm/pgtable.h> 8 #include <linux/types.h> 9 #include <linux/version.h> 10 11 /* 12 * I/O memory access primitives. Reads are ordered relative to any 13 * following Normal memory access. Writes are ordered relative to any prior 14 * Normal memory access. 15 * 16 * For CACHEV1 (807, 810), store instruction could fast retire, so we need 17 * another mb() to prevent st fast retire. 18 * 19 * For CACHEV2 (860), store instruction with PAGE_ATTR_NO_BUFFERABLE won't 20 * fast retire. 21 */ 22 #define readb(c) ({ u8 __v = readb_relaxed(c); rmb(); __v; }) 23 #define readw(c) ({ u16 __v = readw_relaxed(c); rmb(); __v; }) 24 #define readl(c) ({ u32 __v = readl_relaxed(c); rmb(); __v; }) 25 26 #ifdef CONFIG_CPU_HAS_CACHEV2 27 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); }) 28 #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); }) 29 #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); }) 30 #else 31 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); mb(); }) 32 #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); mb(); }) 33 #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); mb(); }) 34 #endif 35 36 /* 37 * I/O memory mapping functions. 38 */ 39 #define ioremap_wc(addr, size) \ 40 ioremap_prot((addr), (size), \ 41 (_PAGE_IOREMAP & ~_CACHE_MASK) | _CACHE_UNCACHED) 42 43 #include <asm-generic/io.h> 44 45 #endif /* __ASM_CSKY_IO_H */ 46