xref: /linux/arch/csky/include/asm/io.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
100a9730eSGuo Ren /* SPDX-License-Identifier: GPL-2.0 */
200a9730eSGuo Ren 
300a9730eSGuo Ren #ifndef __ASM_CSKY_IO_H
400a9730eSGuo Ren #define __ASM_CSKY_IO_H
500a9730eSGuo Ren 
6ca5999fdSMike Rapoport #include <linux/pgtable.h>
700a9730eSGuo Ren #include <linux/types.h>
800a9730eSGuo Ren 
996354ad7SGuo Ren /*
1096354ad7SGuo Ren  * I/O memory access primitives. Reads are ordered relative to any
1196354ad7SGuo Ren  * following Normal memory access. Writes are ordered relative to any prior
1296354ad7SGuo Ren  * Normal memory access.
1396354ad7SGuo Ren  *
1496354ad7SGuo Ren  * For CACHEV1 (807, 810), store instruction could fast retire, so we need
1596354ad7SGuo Ren  * another mb() to prevent st fast retire.
1696354ad7SGuo Ren  *
1796354ad7SGuo Ren  * For CACHEV2 (860), store instruction with PAGE_ATTR_NO_BUFFERABLE won't
1896354ad7SGuo Ren  * fast retire.
1996354ad7SGuo Ren  */
2096354ad7SGuo Ren #define readb(c)		({ u8  __v = readb_relaxed(c); rmb(); __v; })
2196354ad7SGuo Ren #define readw(c)		({ u16 __v = readw_relaxed(c); rmb(); __v; })
2296354ad7SGuo Ren #define readl(c)		({ u32 __v = readl_relaxed(c); rmb(); __v; })
2396354ad7SGuo Ren 
2496354ad7SGuo Ren #ifdef CONFIG_CPU_HAS_CACHEV2
2596354ad7SGuo Ren #define writeb(v,c)		({ wmb(); writeb_relaxed((v),(c)); })
2696354ad7SGuo Ren #define writew(v,c)		({ wmb(); writew_relaxed((v),(c)); })
2796354ad7SGuo Ren #define writel(v,c)		({ wmb(); writel_relaxed((v),(c)); })
2896354ad7SGuo Ren #else
2996354ad7SGuo Ren #define writeb(v,c)		({ wmb(); writeb_relaxed((v),(c)); mb(); })
3096354ad7SGuo Ren #define writew(v,c)		({ wmb(); writew_relaxed((v),(c)); mb(); })
3196354ad7SGuo Ren #define writel(v,c)		({ wmb(); writel_relaxed((v),(c)); mb(); })
3296354ad7SGuo Ren #endif
3396354ad7SGuo Ren 
345336c179SGuo Ren /*
35*8318f7c2SGuo Ren  * String version of I/O memory access operations.
36*8318f7c2SGuo Ren  */
37*8318f7c2SGuo Ren extern void __memcpy_fromio(void *, const volatile void __iomem *, size_t);
38*8318f7c2SGuo Ren extern void __memcpy_toio(volatile void __iomem *, const void *, size_t);
39*8318f7c2SGuo Ren extern void __memset_io(volatile void __iomem *, int, size_t);
40*8318f7c2SGuo Ren 
41*8318f7c2SGuo Ren #define memset_io(c,v,l)        __memset_io((c),(v),(l))
42*8318f7c2SGuo Ren #define memcpy_fromio(a,c,l)    __memcpy_fromio((a),(c),(l))
43*8318f7c2SGuo Ren #define memcpy_toio(c,a,l)      __memcpy_toio((c),(a),(l))
44*8318f7c2SGuo Ren 
45*8318f7c2SGuo Ren /*
465336c179SGuo Ren  * I/O memory mapping functions.
475336c179SGuo Ren  */
480055f67bSChristoph Hellwig #define ioremap_wc(addr, size) \
490055f67bSChristoph Hellwig 	ioremap_prot((addr), (size), \
500055f67bSChristoph Hellwig 		(_PAGE_IOREMAP & ~_CACHE_MASK) | _CACHE_UNCACHED)
5100a9730eSGuo Ren 
5200a9730eSGuo Ren #include <asm-generic/io.h>
5300a9730eSGuo Ren 
5400a9730eSGuo Ren #endif /* __ASM_CSKY_IO_H */
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