xref: /linux/arch/csky/include/asm/cache.h (revision 8795a739e5c72abeec51caf36b6df2b37e5720c5)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __ASM_CSKY_CACHE_H
4 #define __ASM_CSKY_CACHE_H
5 
6 /* bytes per L1 cache line */
7 #define L1_CACHE_SHIFT	CONFIG_L1_CACHE_SHIFT
8 
9 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
10 
11 #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
12 
13 #ifndef __ASSEMBLY__
14 
15 void dcache_wb_line(unsigned long start);
16 
17 void icache_inv_range(unsigned long start, unsigned long end);
18 void icache_inv_all(void);
19 
20 void dcache_wb_range(unsigned long start, unsigned long end);
21 void dcache_wbinv_all(void);
22 
23 void cache_wbinv_range(unsigned long start, unsigned long end);
24 void cache_wbinv_all(void);
25 
26 void dma_wbinv_range(unsigned long start, unsigned long end);
27 void dma_inv_range(unsigned long start, unsigned long end);
28 void dma_wb_range(unsigned long start, unsigned long end);
29 
30 #endif
31 #endif  /* __ASM_CSKY_CACHE_H */
32