1# SPDX-License-Identifier: GPL-2.0-only 2config CSKY 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_DMA_PREP_COHERENT 6 select ARCH_HAS_GCOV_PROFILE_ALL 7 select ARCH_HAS_SYNC_DMA_FOR_CPU 8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 9 select ARCH_USE_BUILTIN_BSWAP 10 select ARCH_USE_QUEUED_RWLOCKS 11 select ARCH_USE_QUEUED_SPINLOCKS 12 select ARCH_HAS_CURRENT_STACK_POINTER 13 select ARCH_INLINE_READ_LOCK if !PREEMPTION 14 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 15 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 16 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 17 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 18 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 19 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 20 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 21 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 22 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 23 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 24 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 25 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 26 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 27 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 28 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 29 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 30 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 31 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 32 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 33 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 34 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 35 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 36 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 37 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 38 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 39 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace) 40 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 41 select COMMON_CLK 42 select CLKSRC_MMIO 43 select CSKY_MPINTC if CPU_CK860 44 select CSKY_MP_TIMER if CPU_CK860 45 select CSKY_APB_INTC 46 select DMA_DIRECT_REMAP 47 select IRQ_DOMAIN 48 select DW_APB_TIMER_OF 49 select GENERIC_IOREMAP 50 select GENERIC_LIB_ASHLDI3 51 select GENERIC_LIB_ASHRDI3 52 select GENERIC_LIB_LSHRDI3 53 select GENERIC_LIB_MULDI3 54 select GENERIC_LIB_CMPDI2 55 select GENERIC_LIB_UCMPDI2 56 select GENERIC_ALLOCATOR 57 select GENERIC_ATOMIC64 58 select GENERIC_CPU_DEVICES 59 select GENERIC_IRQ_CHIP 60 select GENERIC_IRQ_PROBE 61 select GENERIC_IRQ_SHOW 62 select GENERIC_IRQ_MULTI_HANDLER 63 select GENERIC_SCHED_CLOCK 64 select GENERIC_SMP_IDLE_THREAD 65 select GENERIC_TIME_VSYSCALL 66 select GENERIC_VDSO_32 67 select GENERIC_GETTIMEOFDAY 68 select GX6605S_TIMER if CPU_CK610 69 select HAVE_ARCH_TRACEHOOK 70 select HAVE_ARCH_AUDITSYSCALL 71 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610 72 select HAVE_ARCH_JUMP_LABEL_RELATIVE 73 select HAVE_ARCH_MMAP_RND_BITS 74 select HAVE_ARCH_SECCOMP_FILTER 75 select HAVE_CONTEXT_TRACKING_USER 76 select HAVE_VIRT_CPU_ACCOUNTING_GEN 77 select HAVE_DEBUG_BUGVERBOSE 78 select HAVE_DEBUG_KMEMLEAK 79 select HAVE_DYNAMIC_FTRACE 80 select HAVE_DYNAMIC_FTRACE_WITH_REGS 81 select HAVE_GENERIC_VDSO 82 select HAVE_FUNCTION_TRACER 83 select HAVE_FUNCTION_GRAPH_TRACER 84 select HAVE_FUNCTION_ERROR_INJECTION 85 select HAVE_FTRACE_MCOUNT_RECORD 86 select HAVE_KERNEL_GZIP 87 select HAVE_KERNEL_LZO 88 select HAVE_KERNEL_LZMA 89 select HAVE_KPROBES if !CPU_CK610 90 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610 91 select HAVE_KRETPROBES if !CPU_CK610 92 select HAVE_PAGE_SIZE_4KB 93 select HAVE_PERF_EVENTS 94 select HAVE_PERF_REGS 95 select HAVE_PERF_USER_STACK_DUMP 96 select HAVE_DMA_CONTIGUOUS 97 select HAVE_REGS_AND_STACK_ACCESS_API 98 select HAVE_STACKPROTECTOR 99 select HAVE_SYSCALL_TRACEPOINTS 100 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU 101 select LOCK_MM_AND_FIND_VMA 102 select MAY_HAVE_SPARSE_IRQ 103 select MODULES_USE_ELF_RELA if MODULES 104 select OF 105 select OF_EARLY_FLATTREE 106 select PERF_USE_VMALLOC if CPU_CK610 107 select RTC_LIB 108 select TIMER_OF 109 select GENERIC_PCI_IOMAP 110 select HAVE_PCI 111 select PCI_DOMAINS_GENERIC if PCI 112 select PCI_SYSCALL if PCI 113 select PCI_MSI if PCI 114 select TRACE_IRQFLAGS_SUPPORT 115 116config LOCKDEP_SUPPORT 117 def_bool y 118 119config ARCH_SUPPORTS_UPROBES 120 def_bool y if !CPU_CK610 121 122config CPU_HAS_CACHEV2 123 bool 124 125config CPU_HAS_FPUV2 126 bool 127 128config CPU_HAS_HILO 129 bool 130 131config CPU_HAS_TLBI 132 bool 133 134config CPU_HAS_LDSTEX 135 bool 136 help 137 For SMP, CPU needs "ldex&stex" instructions for atomic operations. 138 139config CPU_NEED_TLBSYNC 140 bool 141 142config CPU_NEED_SOFTALIGN 143 bool 144 145config CPU_NO_USER_BKPT 146 bool 147 help 148 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because 149 abiv2 is 16/32bit instruction set and "trap 1" is 32bit. 150 So we need a 16bit instruction as user space bkpt, and it will cause an illegal 151 instruction exception. 152 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. 153 154config GENERIC_CALIBRATE_DELAY 155 def_bool y 156 157config GENERIC_CSUM 158 def_bool y 159 160config GENERIC_HWEIGHT 161 def_bool y 162 163config MMU 164 def_bool y 165 166config STACKTRACE_SUPPORT 167 def_bool y 168 169config TIME_LOW_RES 170 def_bool y 171 172config CPU_ASID_BITS 173 int 174 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 175 default "12" if (CPU_CK860) 176 177config L1_CACHE_SHIFT 178 int 179 default "4" if (CPU_CK610) 180 default "5" if (CPU_CK807 || CPU_CK810) 181 default "6" if (CPU_CK860) 182 183config ARCH_MMAP_RND_BITS_MIN 184 default 8 185 186# max bits determined by the following formula: 187# VA_BITS - PAGE_SHIFT - 3 188config ARCH_MMAP_RND_BITS_MAX 189 default 17 190 191menu "Processor type and features" 192 193choice 194 prompt "CPU MODEL" 195 default CPU_CK807 196 197config CPU_CK610 198 bool "CSKY CPU ck610" 199 select CPU_NEED_TLBSYNC 200 select CPU_NEED_SOFTALIGN 201 select CPU_NO_USER_BKPT 202 203config CPU_CK810 204 bool "CSKY CPU ck810" 205 select CPU_HAS_HILO 206 select CPU_NEED_TLBSYNC 207 208config CPU_CK807 209 bool "CSKY CPU ck807" 210 select CPU_HAS_HILO 211 212config CPU_CK860 213 bool "CSKY CPU ck860" 214 select CPU_HAS_TLBI 215 select CPU_HAS_CACHEV2 216 select CPU_HAS_LDSTEX 217 select CPU_HAS_FPUV2 218endchoice 219 220choice 221 prompt "PAGE OFFSET" 222 default PAGE_OFFSET_80000000 223 224config PAGE_OFFSET_80000000 225 bool "PAGE OFFSET 2G (user:kernel = 2:2)" 226 227config PAGE_OFFSET_A0000000 228 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)" 229endchoice 230 231config PAGE_OFFSET 232 hex 233 default 0x80000000 if PAGE_OFFSET_80000000 234 default 0xa0000000 if PAGE_OFFSET_A0000000 235choice 236 237 prompt "C-SKY PMU type" 238 depends on PERF_EVENTS 239 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 240 241config CPU_PMU_NONE 242 bool "None" 243 244config CSKY_PMU_V1 245 bool "Performance Monitoring Unit Ver.1" 246 247endchoice 248 249choice 250 prompt "Power Manager Instruction (wait/doze/stop)" 251 default CPU_PM_NONE 252 253config CPU_PM_NONE 254 bool "None" 255 256config CPU_PM_WAIT 257 bool "wait" 258 259config CPU_PM_DOZE 260 bool "doze" 261 262config CPU_PM_STOP 263 bool "stop" 264endchoice 265 266menuconfig HAVE_TCM 267 bool "Tightly-Coupled/Sram Memory" 268 depends on !COMPILE_TEST 269 help 270 The implementation are not only used by TCM (Tightly-Coupled Memory) 271 but also used by sram on SOC bus. It follow existed linux tcm 272 software interface, so that old tcm application codes could be 273 re-used directly. 274 275if HAVE_TCM 276config ITCM_RAM_BASE 277 hex "ITCM ram base" 278 default 0xffffffff 279 280config ITCM_NR_PAGES 281 int "Page count of ITCM size: NR*4KB" 282 range 1 256 283 default 32 284 285config HAVE_DTCM 286 bool "DTCM Support" 287 288config DTCM_RAM_BASE 289 hex "DTCM ram base" 290 depends on HAVE_DTCM 291 default 0xffffffff 292 293config DTCM_NR_PAGES 294 int "Page count of DTCM size: NR*4KB" 295 depends on HAVE_DTCM 296 range 1 256 297 default 32 298endif 299 300config CPU_HAS_VDSP 301 bool "CPU has VDSP coprocessor" 302 depends on CPU_HAS_FPU && CPU_HAS_FPUV2 303 304config CPU_HAS_FPU 305 bool "CPU has FPU coprocessor" 306 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 307 308config CPU_HAS_ICACHE_INS 309 bool "CPU has Icache invalidate instructions" 310 depends on CPU_HAS_CACHEV2 311 312config CPU_HAS_TEE 313 bool "CPU has Trusted Execution Environment" 314 depends on CPU_CK810 315 316config SMP 317 bool "Symmetric Multi-Processing (SMP) support for C-SKY" 318 depends on CPU_CK860 319 default n 320 321config NR_CPUS 322 int "Maximum number of CPUs (2-32)" 323 range 2 32 324 depends on SMP 325 default "4" 326 327config HIGHMEM 328 bool "High Memory Support" 329 depends on !CPU_CK610 330 select KMAP_LOCAL 331 default y 332 333config DRAM_BASE 334 hex "DRAM start addr (the same with memory-section in dts)" 335 default 0x0 336 337config HOTPLUG_CPU 338 bool "Support for hot-pluggable CPUs" 339 select GENERIC_IRQ_MIGRATION 340 depends on SMP 341 help 342 Say Y here to allow turning CPUs off and on. CPUs can be 343 controlled through /sys/devices/system/cpu/cpu1/hotplug/target. 344 345 Say N if you want to disable CPU hotplug. 346 347config HAVE_EFFICIENT_UNALIGNED_STRING_OPS 348 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2" 349 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 350 help 351 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could 352 deal with unaligned access by hardware. 353 354endmenu 355 356source "arch/csky/Kconfig.platforms" 357 358source "kernel/Kconfig.hz" 359