1 /* 2 * BPF JIT compiler for ARM64 3 * 4 * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #define pr_fmt(fmt) "bpf_jit: " fmt 20 21 #include <linux/bpf.h> 22 #include <linux/filter.h> 23 #include <linux/printk.h> 24 #include <linux/skbuff.h> 25 #include <linux/slab.h> 26 27 #include <asm/byteorder.h> 28 #include <asm/cacheflush.h> 29 #include <asm/debug-monitors.h> 30 #include <asm/set_memory.h> 31 32 #include "bpf_jit.h" 33 34 int bpf_jit_enable __read_mostly; 35 36 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) 37 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) 38 #define TCALL_CNT (MAX_BPF_JIT_REG + 2) 39 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3) 40 41 /* Map BPF registers to A64 registers */ 42 static const int bpf2a64[] = { 43 /* return value from in-kernel function, and exit value from eBPF */ 44 [BPF_REG_0] = A64_R(7), 45 /* arguments from eBPF program to in-kernel function */ 46 [BPF_REG_1] = A64_R(0), 47 [BPF_REG_2] = A64_R(1), 48 [BPF_REG_3] = A64_R(2), 49 [BPF_REG_4] = A64_R(3), 50 [BPF_REG_5] = A64_R(4), 51 /* callee saved registers that in-kernel function will preserve */ 52 [BPF_REG_6] = A64_R(19), 53 [BPF_REG_7] = A64_R(20), 54 [BPF_REG_8] = A64_R(21), 55 [BPF_REG_9] = A64_R(22), 56 /* read-only frame pointer to access stack */ 57 [BPF_REG_FP] = A64_R(25), 58 /* temporary registers for internal BPF JIT */ 59 [TMP_REG_1] = A64_R(10), 60 [TMP_REG_2] = A64_R(11), 61 [TMP_REG_3] = A64_R(12), 62 /* tail_call_cnt */ 63 [TCALL_CNT] = A64_R(26), 64 /* temporary register for blinding constants */ 65 [BPF_REG_AX] = A64_R(9), 66 }; 67 68 struct jit_ctx { 69 const struct bpf_prog *prog; 70 int idx; 71 int epilogue_offset; 72 int *offset; 73 __le32 *image; 74 u32 stack_size; 75 }; 76 77 static inline void emit(const u32 insn, struct jit_ctx *ctx) 78 { 79 if (ctx->image != NULL) 80 ctx->image[ctx->idx] = cpu_to_le32(insn); 81 82 ctx->idx++; 83 } 84 85 static inline void emit_a64_mov_i64(const int reg, const u64 val, 86 struct jit_ctx *ctx) 87 { 88 u64 tmp = val; 89 int shift = 0; 90 91 emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx); 92 tmp >>= 16; 93 shift += 16; 94 while (tmp) { 95 if (tmp & 0xffff) 96 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx); 97 tmp >>= 16; 98 shift += 16; 99 } 100 } 101 102 static inline void emit_a64_mov_i(const int is64, const int reg, 103 const s32 val, struct jit_ctx *ctx) 104 { 105 u16 hi = val >> 16; 106 u16 lo = val & 0xffff; 107 108 if (hi & 0x8000) { 109 if (hi == 0xffff) { 110 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx); 111 } else { 112 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx); 113 emit(A64_MOVK(is64, reg, lo, 0), ctx); 114 } 115 } else { 116 emit(A64_MOVZ(is64, reg, lo, 0), ctx); 117 if (hi) 118 emit(A64_MOVK(is64, reg, hi, 16), ctx); 119 } 120 } 121 122 static inline int bpf2a64_offset(int bpf_to, int bpf_from, 123 const struct jit_ctx *ctx) 124 { 125 int to = ctx->offset[bpf_to]; 126 /* -1 to account for the Branch instruction */ 127 int from = ctx->offset[bpf_from] - 1; 128 129 return to - from; 130 } 131 132 static void jit_fill_hole(void *area, unsigned int size) 133 { 134 __le32 *ptr; 135 /* We are guaranteed to have aligned memory. */ 136 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32)) 137 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT); 138 } 139 140 static inline int epilogue_offset(const struct jit_ctx *ctx) 141 { 142 int to = ctx->epilogue_offset; 143 int from = ctx->idx; 144 145 return to - from; 146 } 147 148 /* Stack must be multiples of 16B */ 149 #define STACK_ALIGN(sz) (((sz) + 15) & ~15) 150 151 /* Tail call offset to jump into */ 152 #define PROLOGUE_OFFSET 7 153 154 static int build_prologue(struct jit_ctx *ctx) 155 { 156 const struct bpf_prog *prog = ctx->prog; 157 const u8 r6 = bpf2a64[BPF_REG_6]; 158 const u8 r7 = bpf2a64[BPF_REG_7]; 159 const u8 r8 = bpf2a64[BPF_REG_8]; 160 const u8 r9 = bpf2a64[BPF_REG_9]; 161 const u8 fp = bpf2a64[BPF_REG_FP]; 162 const u8 tcc = bpf2a64[TCALL_CNT]; 163 const int idx0 = ctx->idx; 164 int cur_offset; 165 166 /* 167 * BPF prog stack layout 168 * 169 * high 170 * original A64_SP => 0:+-----+ BPF prologue 171 * |FP/LR| 172 * current A64_FP => -16:+-----+ 173 * | ... | callee saved registers 174 * BPF fp register => -64:+-----+ <= (BPF_FP) 175 * | | 176 * | ... | BPF prog stack 177 * | | 178 * +-----+ <= (BPF_FP - prog->aux->stack_depth) 179 * |RSVD | JIT scratchpad 180 * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size) 181 * | | 182 * | ... | Function call stack 183 * | | 184 * +-----+ 185 * low 186 * 187 */ 188 189 /* Save FP and LR registers to stay align with ARM64 AAPCS */ 190 emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx); 191 emit(A64_MOV(1, A64_FP, A64_SP), ctx); 192 193 /* Save callee-saved registers */ 194 emit(A64_PUSH(r6, r7, A64_SP), ctx); 195 emit(A64_PUSH(r8, r9, A64_SP), ctx); 196 emit(A64_PUSH(fp, tcc, A64_SP), ctx); 197 198 /* Set up BPF prog stack base register */ 199 emit(A64_MOV(1, fp, A64_SP), ctx); 200 201 /* Initialize tail_call_cnt */ 202 emit(A64_MOVZ(1, tcc, 0, 0), ctx); 203 204 cur_offset = ctx->idx - idx0; 205 if (cur_offset != PROLOGUE_OFFSET) { 206 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n", 207 cur_offset, PROLOGUE_OFFSET); 208 return -1; 209 } 210 211 /* 4 byte extra for skb_copy_bits buffer */ 212 ctx->stack_size = prog->aux->stack_depth + 4; 213 ctx->stack_size = STACK_ALIGN(ctx->stack_size); 214 215 /* Set up function call stack */ 216 emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 217 return 0; 218 } 219 220 static int out_offset = -1; /* initialized on the first pass of build_body() */ 221 static int emit_bpf_tail_call(struct jit_ctx *ctx) 222 { 223 /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */ 224 const u8 r2 = bpf2a64[BPF_REG_2]; 225 const u8 r3 = bpf2a64[BPF_REG_3]; 226 227 const u8 tmp = bpf2a64[TMP_REG_1]; 228 const u8 prg = bpf2a64[TMP_REG_2]; 229 const u8 tcc = bpf2a64[TCALL_CNT]; 230 const int idx0 = ctx->idx; 231 #define cur_offset (ctx->idx - idx0) 232 #define jmp_offset (out_offset - (cur_offset)) 233 size_t off; 234 235 /* if (index >= array->map.max_entries) 236 * goto out; 237 */ 238 off = offsetof(struct bpf_array, map.max_entries); 239 emit_a64_mov_i64(tmp, off, ctx); 240 emit(A64_LDR32(tmp, r2, tmp), ctx); 241 emit(A64_CMP(0, r3, tmp), ctx); 242 emit(A64_B_(A64_COND_GE, jmp_offset), ctx); 243 244 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT) 245 * goto out; 246 * tail_call_cnt++; 247 */ 248 emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx); 249 emit(A64_CMP(1, tcc, tmp), ctx); 250 emit(A64_B_(A64_COND_GT, jmp_offset), ctx); 251 emit(A64_ADD_I(1, tcc, tcc, 1), ctx); 252 253 /* prog = array->ptrs[index]; 254 * if (prog == NULL) 255 * goto out; 256 */ 257 off = offsetof(struct bpf_array, ptrs); 258 emit_a64_mov_i64(tmp, off, ctx); 259 emit(A64_ADD(1, tmp, r2, tmp), ctx); 260 emit(A64_LSL(1, prg, r3, 3), ctx); 261 emit(A64_LDR64(prg, tmp, prg), ctx); 262 emit(A64_CBZ(1, prg, jmp_offset), ctx); 263 264 /* goto *(prog->bpf_func + prologue_offset); */ 265 off = offsetof(struct bpf_prog, bpf_func); 266 emit_a64_mov_i64(tmp, off, ctx); 267 emit(A64_LDR64(tmp, prg, tmp), ctx); 268 emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx); 269 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 270 emit(A64_BR(tmp), ctx); 271 272 /* out: */ 273 if (out_offset == -1) 274 out_offset = cur_offset; 275 if (cur_offset != out_offset) { 276 pr_err_once("tail_call out_offset = %d, expected %d!\n", 277 cur_offset, out_offset); 278 return -1; 279 } 280 return 0; 281 #undef cur_offset 282 #undef jmp_offset 283 } 284 285 static void build_epilogue(struct jit_ctx *ctx) 286 { 287 const u8 r0 = bpf2a64[BPF_REG_0]; 288 const u8 r6 = bpf2a64[BPF_REG_6]; 289 const u8 r7 = bpf2a64[BPF_REG_7]; 290 const u8 r8 = bpf2a64[BPF_REG_8]; 291 const u8 r9 = bpf2a64[BPF_REG_9]; 292 const u8 fp = bpf2a64[BPF_REG_FP]; 293 294 /* We're done with BPF stack */ 295 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 296 297 /* Restore fs (x25) and x26 */ 298 emit(A64_POP(fp, A64_R(26), A64_SP), ctx); 299 300 /* Restore callee-saved register */ 301 emit(A64_POP(r8, r9, A64_SP), ctx); 302 emit(A64_POP(r6, r7, A64_SP), ctx); 303 304 /* Restore FP/LR registers */ 305 emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); 306 307 /* Set return value */ 308 emit(A64_MOV(1, A64_R(0), r0), ctx); 309 310 emit(A64_RET(A64_LR), ctx); 311 } 312 313 /* JITs an eBPF instruction. 314 * Returns: 315 * 0 - successfully JITed an 8-byte eBPF instruction. 316 * >0 - successfully JITed a 16-byte eBPF instruction. 317 * <0 - failed to JIT. 318 */ 319 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 320 { 321 const u8 code = insn->code; 322 const u8 dst = bpf2a64[insn->dst_reg]; 323 const u8 src = bpf2a64[insn->src_reg]; 324 const u8 tmp = bpf2a64[TMP_REG_1]; 325 const u8 tmp2 = bpf2a64[TMP_REG_2]; 326 const u8 tmp3 = bpf2a64[TMP_REG_3]; 327 const s16 off = insn->off; 328 const s32 imm = insn->imm; 329 const int i = insn - ctx->prog->insnsi; 330 const bool is64 = BPF_CLASS(code) == BPF_ALU64; 331 const bool isdw = BPF_SIZE(code) == BPF_DW; 332 u8 jmp_cond; 333 s32 jmp_offset; 334 335 #define check_imm(bits, imm) do { \ 336 if ((((imm) > 0) && ((imm) >> (bits))) || \ 337 (((imm) < 0) && (~(imm) >> (bits)))) { \ 338 pr_info("[%2d] imm=%d(0x%x) out of range\n", \ 339 i, imm, imm); \ 340 return -EINVAL; \ 341 } \ 342 } while (0) 343 #define check_imm19(imm) check_imm(19, imm) 344 #define check_imm26(imm) check_imm(26, imm) 345 346 switch (code) { 347 /* dst = src */ 348 case BPF_ALU | BPF_MOV | BPF_X: 349 case BPF_ALU64 | BPF_MOV | BPF_X: 350 emit(A64_MOV(is64, dst, src), ctx); 351 break; 352 /* dst = dst OP src */ 353 case BPF_ALU | BPF_ADD | BPF_X: 354 case BPF_ALU64 | BPF_ADD | BPF_X: 355 emit(A64_ADD(is64, dst, dst, src), ctx); 356 break; 357 case BPF_ALU | BPF_SUB | BPF_X: 358 case BPF_ALU64 | BPF_SUB | BPF_X: 359 emit(A64_SUB(is64, dst, dst, src), ctx); 360 break; 361 case BPF_ALU | BPF_AND | BPF_X: 362 case BPF_ALU64 | BPF_AND | BPF_X: 363 emit(A64_AND(is64, dst, dst, src), ctx); 364 break; 365 case BPF_ALU | BPF_OR | BPF_X: 366 case BPF_ALU64 | BPF_OR | BPF_X: 367 emit(A64_ORR(is64, dst, dst, src), ctx); 368 break; 369 case BPF_ALU | BPF_XOR | BPF_X: 370 case BPF_ALU64 | BPF_XOR | BPF_X: 371 emit(A64_EOR(is64, dst, dst, src), ctx); 372 break; 373 case BPF_ALU | BPF_MUL | BPF_X: 374 case BPF_ALU64 | BPF_MUL | BPF_X: 375 emit(A64_MUL(is64, dst, dst, src), ctx); 376 break; 377 case BPF_ALU | BPF_DIV | BPF_X: 378 case BPF_ALU64 | BPF_DIV | BPF_X: 379 case BPF_ALU | BPF_MOD | BPF_X: 380 case BPF_ALU64 | BPF_MOD | BPF_X: 381 { 382 const u8 r0 = bpf2a64[BPF_REG_0]; 383 384 /* if (src == 0) return 0 */ 385 jmp_offset = 3; /* skip ahead to else path */ 386 check_imm19(jmp_offset); 387 emit(A64_CBNZ(is64, src, jmp_offset), ctx); 388 emit(A64_MOVZ(1, r0, 0, 0), ctx); 389 jmp_offset = epilogue_offset(ctx); 390 check_imm26(jmp_offset); 391 emit(A64_B(jmp_offset), ctx); 392 /* else */ 393 switch (BPF_OP(code)) { 394 case BPF_DIV: 395 emit(A64_UDIV(is64, dst, dst, src), ctx); 396 break; 397 case BPF_MOD: 398 emit(A64_UDIV(is64, tmp, dst, src), ctx); 399 emit(A64_MUL(is64, tmp, tmp, src), ctx); 400 emit(A64_SUB(is64, dst, dst, tmp), ctx); 401 break; 402 } 403 break; 404 } 405 case BPF_ALU | BPF_LSH | BPF_X: 406 case BPF_ALU64 | BPF_LSH | BPF_X: 407 emit(A64_LSLV(is64, dst, dst, src), ctx); 408 break; 409 case BPF_ALU | BPF_RSH | BPF_X: 410 case BPF_ALU64 | BPF_RSH | BPF_X: 411 emit(A64_LSRV(is64, dst, dst, src), ctx); 412 break; 413 case BPF_ALU | BPF_ARSH | BPF_X: 414 case BPF_ALU64 | BPF_ARSH | BPF_X: 415 emit(A64_ASRV(is64, dst, dst, src), ctx); 416 break; 417 /* dst = -dst */ 418 case BPF_ALU | BPF_NEG: 419 case BPF_ALU64 | BPF_NEG: 420 emit(A64_NEG(is64, dst, dst), ctx); 421 break; 422 /* dst = BSWAP##imm(dst) */ 423 case BPF_ALU | BPF_END | BPF_FROM_LE: 424 case BPF_ALU | BPF_END | BPF_FROM_BE: 425 #ifdef CONFIG_CPU_BIG_ENDIAN 426 if (BPF_SRC(code) == BPF_FROM_BE) 427 goto emit_bswap_uxt; 428 #else /* !CONFIG_CPU_BIG_ENDIAN */ 429 if (BPF_SRC(code) == BPF_FROM_LE) 430 goto emit_bswap_uxt; 431 #endif 432 switch (imm) { 433 case 16: 434 emit(A64_REV16(is64, dst, dst), ctx); 435 /* zero-extend 16 bits into 64 bits */ 436 emit(A64_UXTH(is64, dst, dst), ctx); 437 break; 438 case 32: 439 emit(A64_REV32(is64, dst, dst), ctx); 440 /* upper 32 bits already cleared */ 441 break; 442 case 64: 443 emit(A64_REV64(dst, dst), ctx); 444 break; 445 } 446 break; 447 emit_bswap_uxt: 448 switch (imm) { 449 case 16: 450 /* zero-extend 16 bits into 64 bits */ 451 emit(A64_UXTH(is64, dst, dst), ctx); 452 break; 453 case 32: 454 /* zero-extend 32 bits into 64 bits */ 455 emit(A64_UXTW(is64, dst, dst), ctx); 456 break; 457 case 64: 458 /* nop */ 459 break; 460 } 461 break; 462 /* dst = imm */ 463 case BPF_ALU | BPF_MOV | BPF_K: 464 case BPF_ALU64 | BPF_MOV | BPF_K: 465 emit_a64_mov_i(is64, dst, imm, ctx); 466 break; 467 /* dst = dst OP imm */ 468 case BPF_ALU | BPF_ADD | BPF_K: 469 case BPF_ALU64 | BPF_ADD | BPF_K: 470 emit_a64_mov_i(is64, tmp, imm, ctx); 471 emit(A64_ADD(is64, dst, dst, tmp), ctx); 472 break; 473 case BPF_ALU | BPF_SUB | BPF_K: 474 case BPF_ALU64 | BPF_SUB | BPF_K: 475 emit_a64_mov_i(is64, tmp, imm, ctx); 476 emit(A64_SUB(is64, dst, dst, tmp), ctx); 477 break; 478 case BPF_ALU | BPF_AND | BPF_K: 479 case BPF_ALU64 | BPF_AND | BPF_K: 480 emit_a64_mov_i(is64, tmp, imm, ctx); 481 emit(A64_AND(is64, dst, dst, tmp), ctx); 482 break; 483 case BPF_ALU | BPF_OR | BPF_K: 484 case BPF_ALU64 | BPF_OR | BPF_K: 485 emit_a64_mov_i(is64, tmp, imm, ctx); 486 emit(A64_ORR(is64, dst, dst, tmp), ctx); 487 break; 488 case BPF_ALU | BPF_XOR | BPF_K: 489 case BPF_ALU64 | BPF_XOR | BPF_K: 490 emit_a64_mov_i(is64, tmp, imm, ctx); 491 emit(A64_EOR(is64, dst, dst, tmp), ctx); 492 break; 493 case BPF_ALU | BPF_MUL | BPF_K: 494 case BPF_ALU64 | BPF_MUL | BPF_K: 495 emit_a64_mov_i(is64, tmp, imm, ctx); 496 emit(A64_MUL(is64, dst, dst, tmp), ctx); 497 break; 498 case BPF_ALU | BPF_DIV | BPF_K: 499 case BPF_ALU64 | BPF_DIV | BPF_K: 500 emit_a64_mov_i(is64, tmp, imm, ctx); 501 emit(A64_UDIV(is64, dst, dst, tmp), ctx); 502 break; 503 case BPF_ALU | BPF_MOD | BPF_K: 504 case BPF_ALU64 | BPF_MOD | BPF_K: 505 emit_a64_mov_i(is64, tmp2, imm, ctx); 506 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx); 507 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx); 508 emit(A64_SUB(is64, dst, dst, tmp), ctx); 509 break; 510 case BPF_ALU | BPF_LSH | BPF_K: 511 case BPF_ALU64 | BPF_LSH | BPF_K: 512 emit(A64_LSL(is64, dst, dst, imm), ctx); 513 break; 514 case BPF_ALU | BPF_RSH | BPF_K: 515 case BPF_ALU64 | BPF_RSH | BPF_K: 516 emit(A64_LSR(is64, dst, dst, imm), ctx); 517 break; 518 case BPF_ALU | BPF_ARSH | BPF_K: 519 case BPF_ALU64 | BPF_ARSH | BPF_K: 520 emit(A64_ASR(is64, dst, dst, imm), ctx); 521 break; 522 523 /* JUMP off */ 524 case BPF_JMP | BPF_JA: 525 jmp_offset = bpf2a64_offset(i + off, i, ctx); 526 check_imm26(jmp_offset); 527 emit(A64_B(jmp_offset), ctx); 528 break; 529 /* IF (dst COND src) JUMP off */ 530 case BPF_JMP | BPF_JEQ | BPF_X: 531 case BPF_JMP | BPF_JGT | BPF_X: 532 case BPF_JMP | BPF_JLT | BPF_X: 533 case BPF_JMP | BPF_JGE | BPF_X: 534 case BPF_JMP | BPF_JLE | BPF_X: 535 case BPF_JMP | BPF_JNE | BPF_X: 536 case BPF_JMP | BPF_JSGT | BPF_X: 537 case BPF_JMP | BPF_JSLT | BPF_X: 538 case BPF_JMP | BPF_JSGE | BPF_X: 539 case BPF_JMP | BPF_JSLE | BPF_X: 540 emit(A64_CMP(1, dst, src), ctx); 541 emit_cond_jmp: 542 jmp_offset = bpf2a64_offset(i + off, i, ctx); 543 check_imm19(jmp_offset); 544 switch (BPF_OP(code)) { 545 case BPF_JEQ: 546 jmp_cond = A64_COND_EQ; 547 break; 548 case BPF_JGT: 549 jmp_cond = A64_COND_HI; 550 break; 551 case BPF_JLT: 552 jmp_cond = A64_COND_CC; 553 break; 554 case BPF_JGE: 555 jmp_cond = A64_COND_CS; 556 break; 557 case BPF_JLE: 558 jmp_cond = A64_COND_LS; 559 break; 560 case BPF_JSET: 561 case BPF_JNE: 562 jmp_cond = A64_COND_NE; 563 break; 564 case BPF_JSGT: 565 jmp_cond = A64_COND_GT; 566 break; 567 case BPF_JSLT: 568 jmp_cond = A64_COND_LT; 569 break; 570 case BPF_JSGE: 571 jmp_cond = A64_COND_GE; 572 break; 573 case BPF_JSLE: 574 jmp_cond = A64_COND_LE; 575 break; 576 default: 577 return -EFAULT; 578 } 579 emit(A64_B_(jmp_cond, jmp_offset), ctx); 580 break; 581 case BPF_JMP | BPF_JSET | BPF_X: 582 emit(A64_TST(1, dst, src), ctx); 583 goto emit_cond_jmp; 584 /* IF (dst COND imm) JUMP off */ 585 case BPF_JMP | BPF_JEQ | BPF_K: 586 case BPF_JMP | BPF_JGT | BPF_K: 587 case BPF_JMP | BPF_JLT | BPF_K: 588 case BPF_JMP | BPF_JGE | BPF_K: 589 case BPF_JMP | BPF_JLE | BPF_K: 590 case BPF_JMP | BPF_JNE | BPF_K: 591 case BPF_JMP | BPF_JSGT | BPF_K: 592 case BPF_JMP | BPF_JSLT | BPF_K: 593 case BPF_JMP | BPF_JSGE | BPF_K: 594 case BPF_JMP | BPF_JSLE | BPF_K: 595 emit_a64_mov_i(1, tmp, imm, ctx); 596 emit(A64_CMP(1, dst, tmp), ctx); 597 goto emit_cond_jmp; 598 case BPF_JMP | BPF_JSET | BPF_K: 599 emit_a64_mov_i(1, tmp, imm, ctx); 600 emit(A64_TST(1, dst, tmp), ctx); 601 goto emit_cond_jmp; 602 /* function call */ 603 case BPF_JMP | BPF_CALL: 604 { 605 const u8 r0 = bpf2a64[BPF_REG_0]; 606 const u64 func = (u64)__bpf_call_base + imm; 607 608 emit_a64_mov_i64(tmp, func, ctx); 609 emit(A64_BLR(tmp), ctx); 610 emit(A64_MOV(1, r0, A64_R(0)), ctx); 611 break; 612 } 613 /* tail call */ 614 case BPF_JMP | BPF_TAIL_CALL: 615 if (emit_bpf_tail_call(ctx)) 616 return -EFAULT; 617 break; 618 /* function return */ 619 case BPF_JMP | BPF_EXIT: 620 /* Optimization: when last instruction is EXIT, 621 simply fallthrough to epilogue. */ 622 if (i == ctx->prog->len - 1) 623 break; 624 jmp_offset = epilogue_offset(ctx); 625 check_imm26(jmp_offset); 626 emit(A64_B(jmp_offset), ctx); 627 break; 628 629 /* dst = imm64 */ 630 case BPF_LD | BPF_IMM | BPF_DW: 631 { 632 const struct bpf_insn insn1 = insn[1]; 633 u64 imm64; 634 635 imm64 = (u64)insn1.imm << 32 | (u32)imm; 636 emit_a64_mov_i64(dst, imm64, ctx); 637 638 return 1; 639 } 640 641 /* LDX: dst = *(size *)(src + off) */ 642 case BPF_LDX | BPF_MEM | BPF_W: 643 case BPF_LDX | BPF_MEM | BPF_H: 644 case BPF_LDX | BPF_MEM | BPF_B: 645 case BPF_LDX | BPF_MEM | BPF_DW: 646 emit_a64_mov_i(1, tmp, off, ctx); 647 switch (BPF_SIZE(code)) { 648 case BPF_W: 649 emit(A64_LDR32(dst, src, tmp), ctx); 650 break; 651 case BPF_H: 652 emit(A64_LDRH(dst, src, tmp), ctx); 653 break; 654 case BPF_B: 655 emit(A64_LDRB(dst, src, tmp), ctx); 656 break; 657 case BPF_DW: 658 emit(A64_LDR64(dst, src, tmp), ctx); 659 break; 660 } 661 break; 662 663 /* ST: *(size *)(dst + off) = imm */ 664 case BPF_ST | BPF_MEM | BPF_W: 665 case BPF_ST | BPF_MEM | BPF_H: 666 case BPF_ST | BPF_MEM | BPF_B: 667 case BPF_ST | BPF_MEM | BPF_DW: 668 /* Load imm to a register then store it */ 669 emit_a64_mov_i(1, tmp2, off, ctx); 670 emit_a64_mov_i(1, tmp, imm, ctx); 671 switch (BPF_SIZE(code)) { 672 case BPF_W: 673 emit(A64_STR32(tmp, dst, tmp2), ctx); 674 break; 675 case BPF_H: 676 emit(A64_STRH(tmp, dst, tmp2), ctx); 677 break; 678 case BPF_B: 679 emit(A64_STRB(tmp, dst, tmp2), ctx); 680 break; 681 case BPF_DW: 682 emit(A64_STR64(tmp, dst, tmp2), ctx); 683 break; 684 } 685 break; 686 687 /* STX: *(size *)(dst + off) = src */ 688 case BPF_STX | BPF_MEM | BPF_W: 689 case BPF_STX | BPF_MEM | BPF_H: 690 case BPF_STX | BPF_MEM | BPF_B: 691 case BPF_STX | BPF_MEM | BPF_DW: 692 emit_a64_mov_i(1, tmp, off, ctx); 693 switch (BPF_SIZE(code)) { 694 case BPF_W: 695 emit(A64_STR32(src, dst, tmp), ctx); 696 break; 697 case BPF_H: 698 emit(A64_STRH(src, dst, tmp), ctx); 699 break; 700 case BPF_B: 701 emit(A64_STRB(src, dst, tmp), ctx); 702 break; 703 case BPF_DW: 704 emit(A64_STR64(src, dst, tmp), ctx); 705 break; 706 } 707 break; 708 /* STX XADD: lock *(u32 *)(dst + off) += src */ 709 case BPF_STX | BPF_XADD | BPF_W: 710 /* STX XADD: lock *(u64 *)(dst + off) += src */ 711 case BPF_STX | BPF_XADD | BPF_DW: 712 emit_a64_mov_i(1, tmp, off, ctx); 713 emit(A64_ADD(1, tmp, tmp, dst), ctx); 714 emit(A64_PRFM(tmp, PST, L1, STRM), ctx); 715 emit(A64_LDXR(isdw, tmp2, tmp), ctx); 716 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx); 717 emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx); 718 jmp_offset = -3; 719 check_imm19(jmp_offset); 720 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx); 721 break; 722 723 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */ 724 case BPF_LD | BPF_ABS | BPF_W: 725 case BPF_LD | BPF_ABS | BPF_H: 726 case BPF_LD | BPF_ABS | BPF_B: 727 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */ 728 case BPF_LD | BPF_IND | BPF_W: 729 case BPF_LD | BPF_IND | BPF_H: 730 case BPF_LD | BPF_IND | BPF_B: 731 { 732 const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */ 733 const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */ 734 const u8 fp = bpf2a64[BPF_REG_FP]; 735 const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */ 736 const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */ 737 const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */ 738 const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */ 739 const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */ 740 int size; 741 742 emit(A64_MOV(1, r1, r6), ctx); 743 emit_a64_mov_i(0, r2, imm, ctx); 744 if (BPF_MODE(code) == BPF_IND) 745 emit(A64_ADD(0, r2, r2, src), ctx); 746 switch (BPF_SIZE(code)) { 747 case BPF_W: 748 size = 4; 749 break; 750 case BPF_H: 751 size = 2; 752 break; 753 case BPF_B: 754 size = 1; 755 break; 756 default: 757 return -EINVAL; 758 } 759 emit_a64_mov_i64(r3, size, ctx); 760 emit(A64_SUB_I(1, r4, fp, ctx->stack_size), ctx); 761 emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx); 762 emit(A64_BLR(r5), ctx); 763 emit(A64_MOV(1, r0, A64_R(0)), ctx); 764 765 jmp_offset = epilogue_offset(ctx); 766 check_imm19(jmp_offset); 767 emit(A64_CBZ(1, r0, jmp_offset), ctx); 768 emit(A64_MOV(1, r5, r0), ctx); 769 switch (BPF_SIZE(code)) { 770 case BPF_W: 771 emit(A64_LDR32(r0, r5, A64_ZR), ctx); 772 #ifndef CONFIG_CPU_BIG_ENDIAN 773 emit(A64_REV32(0, r0, r0), ctx); 774 #endif 775 break; 776 case BPF_H: 777 emit(A64_LDRH(r0, r5, A64_ZR), ctx); 778 #ifndef CONFIG_CPU_BIG_ENDIAN 779 emit(A64_REV16(0, r0, r0), ctx); 780 #endif 781 break; 782 case BPF_B: 783 emit(A64_LDRB(r0, r5, A64_ZR), ctx); 784 break; 785 } 786 break; 787 } 788 default: 789 pr_err_once("unknown opcode %02x\n", code); 790 return -EINVAL; 791 } 792 793 return 0; 794 } 795 796 static int build_body(struct jit_ctx *ctx) 797 { 798 const struct bpf_prog *prog = ctx->prog; 799 int i; 800 801 for (i = 0; i < prog->len; i++) { 802 const struct bpf_insn *insn = &prog->insnsi[i]; 803 int ret; 804 805 ret = build_insn(insn, ctx); 806 if (ret > 0) { 807 i++; 808 if (ctx->image == NULL) 809 ctx->offset[i] = ctx->idx; 810 continue; 811 } 812 if (ctx->image == NULL) 813 ctx->offset[i] = ctx->idx; 814 if (ret) 815 return ret; 816 } 817 818 return 0; 819 } 820 821 static int validate_code(struct jit_ctx *ctx) 822 { 823 int i; 824 825 for (i = 0; i < ctx->idx; i++) { 826 u32 a64_insn = le32_to_cpu(ctx->image[i]); 827 828 if (a64_insn == AARCH64_BREAK_FAULT) 829 return -1; 830 } 831 832 return 0; 833 } 834 835 static inline void bpf_flush_icache(void *start, void *end) 836 { 837 flush_icache_range((unsigned long)start, (unsigned long)end); 838 } 839 840 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) 841 { 842 struct bpf_prog *tmp, *orig_prog = prog; 843 struct bpf_binary_header *header; 844 bool tmp_blinded = false; 845 struct jit_ctx ctx; 846 int image_size; 847 u8 *image_ptr; 848 849 if (!bpf_jit_enable) 850 return orig_prog; 851 852 tmp = bpf_jit_blind_constants(prog); 853 /* If blinding was requested and we failed during blinding, 854 * we must fall back to the interpreter. 855 */ 856 if (IS_ERR(tmp)) 857 return orig_prog; 858 if (tmp != prog) { 859 tmp_blinded = true; 860 prog = tmp; 861 } 862 863 memset(&ctx, 0, sizeof(ctx)); 864 ctx.prog = prog; 865 866 ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL); 867 if (ctx.offset == NULL) { 868 prog = orig_prog; 869 goto out; 870 } 871 872 /* 1. Initial fake pass to compute ctx->idx. */ 873 874 /* Fake pass to fill in ctx->offset. */ 875 if (build_body(&ctx)) { 876 prog = orig_prog; 877 goto out_off; 878 } 879 880 if (build_prologue(&ctx)) { 881 prog = orig_prog; 882 goto out_off; 883 } 884 885 ctx.epilogue_offset = ctx.idx; 886 build_epilogue(&ctx); 887 888 /* Now we know the actual image size. */ 889 image_size = sizeof(u32) * ctx.idx; 890 header = bpf_jit_binary_alloc(image_size, &image_ptr, 891 sizeof(u32), jit_fill_hole); 892 if (header == NULL) { 893 prog = orig_prog; 894 goto out_off; 895 } 896 897 /* 2. Now, the actual pass. */ 898 899 ctx.image = (__le32 *)image_ptr; 900 ctx.idx = 0; 901 902 build_prologue(&ctx); 903 904 if (build_body(&ctx)) { 905 bpf_jit_binary_free(header); 906 prog = orig_prog; 907 goto out_off; 908 } 909 910 build_epilogue(&ctx); 911 912 /* 3. Extra pass to validate JITed code. */ 913 if (validate_code(&ctx)) { 914 bpf_jit_binary_free(header); 915 prog = orig_prog; 916 goto out_off; 917 } 918 919 /* And we're done. */ 920 if (bpf_jit_enable > 1) 921 bpf_jit_dump(prog->len, image_size, 2, ctx.image); 922 923 bpf_flush_icache(header, ctx.image + ctx.idx); 924 925 bpf_jit_binary_lock_ro(header); 926 prog->bpf_func = (void *)ctx.image; 927 prog->jited = 1; 928 prog->jited_len = image_size; 929 930 out_off: 931 kfree(ctx.offset); 932 out: 933 if (tmp_blinded) 934 bpf_jit_prog_release_other(prog, prog == orig_prog ? 935 tmp : orig_prog); 936 return prog; 937 } 938