1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/fault.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995-2004 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/bitfield.h> 12 #include <linux/extable.h> 13 #include <linux/kfence.h> 14 #include <linux/signal.h> 15 #include <linux/mm.h> 16 #include <linux/hardirq.h> 17 #include <linux/init.h> 18 #include <linux/kasan.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/page-flags.h> 22 #include <linux/sched/signal.h> 23 #include <linux/sched/debug.h> 24 #include <linux/highmem.h> 25 #include <linux/perf_event.h> 26 #include <linux/preempt.h> 27 #include <linux/hugetlb.h> 28 29 #include <asm/acpi.h> 30 #include <asm/bug.h> 31 #include <asm/cmpxchg.h> 32 #include <asm/cpufeature.h> 33 #include <asm/exception.h> 34 #include <asm/daifflags.h> 35 #include <asm/debug-monitors.h> 36 #include <asm/esr.h> 37 #include <asm/kprobes.h> 38 #include <asm/mte.h> 39 #include <asm/processor.h> 40 #include <asm/sysreg.h> 41 #include <asm/system_misc.h> 42 #include <asm/tlbflush.h> 43 #include <asm/traps.h> 44 45 struct fault_info { 46 int (*fn)(unsigned long far, unsigned int esr, 47 struct pt_regs *regs); 48 int sig; 49 int code; 50 const char *name; 51 }; 52 53 static const struct fault_info fault_info[]; 54 static struct fault_info debug_fault_info[]; 55 56 static inline const struct fault_info *esr_to_fault_info(unsigned int esr) 57 { 58 return fault_info + (esr & ESR_ELx_FSC); 59 } 60 61 static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr) 62 { 63 return debug_fault_info + DBG_ESR_EVT(esr); 64 } 65 66 static void data_abort_decode(unsigned int esr) 67 { 68 pr_alert("Data abort info:\n"); 69 70 if (esr & ESR_ELx_ISV) { 71 pr_alert(" Access size = %u byte(s)\n", 72 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 73 pr_alert(" SSE = %lu, SRT = %lu\n", 74 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 75 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 76 pr_alert(" SF = %lu, AR = %lu\n", 77 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 78 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 79 } else { 80 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 81 } 82 83 pr_alert(" CM = %lu, WnR = %lu\n", 84 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 85 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 86 } 87 88 static void mem_abort_decode(unsigned int esr) 89 { 90 pr_alert("Mem abort info:\n"); 91 92 pr_alert(" ESR = 0x%08x\n", esr); 93 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", 94 ESR_ELx_EC(esr), esr_get_class_string(esr), 95 (esr & ESR_ELx_IL) ? 32 : 16); 96 pr_alert(" SET = %lu, FnV = %lu\n", 97 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 98 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 99 pr_alert(" EA = %lu, S1PTW = %lu\n", 100 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 101 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 102 103 if (esr_is_data_abort(esr)) 104 data_abort_decode(esr); 105 } 106 107 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) 108 { 109 /* Either init_pg_dir or swapper_pg_dir */ 110 if (mm == &init_mm) 111 return __pa_symbol(mm->pgd); 112 113 return (unsigned long)virt_to_phys(mm->pgd); 114 } 115 116 /* 117 * Dump out the page tables associated with 'addr' in the currently active mm. 118 */ 119 static void show_pte(unsigned long addr) 120 { 121 struct mm_struct *mm; 122 pgd_t *pgdp; 123 pgd_t pgd; 124 125 if (is_ttbr0_addr(addr)) { 126 /* TTBR0 */ 127 mm = current->active_mm; 128 if (mm == &init_mm) { 129 pr_alert("[%016lx] user address but active_mm is swapper\n", 130 addr); 131 return; 132 } 133 } else if (is_ttbr1_addr(addr)) { 134 /* TTBR1 */ 135 mm = &init_mm; 136 } else { 137 pr_alert("[%016lx] address between user and kernel address ranges\n", 138 addr); 139 return; 140 } 141 142 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", 143 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 144 vabits_actual, mm_to_pgd_phys(mm)); 145 pgdp = pgd_offset(mm, addr); 146 pgd = READ_ONCE(*pgdp); 147 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 148 149 do { 150 p4d_t *p4dp, p4d; 151 pud_t *pudp, pud; 152 pmd_t *pmdp, pmd; 153 pte_t *ptep, pte; 154 155 if (pgd_none(pgd) || pgd_bad(pgd)) 156 break; 157 158 p4dp = p4d_offset(pgdp, addr); 159 p4d = READ_ONCE(*p4dp); 160 pr_cont(", p4d=%016llx", p4d_val(p4d)); 161 if (p4d_none(p4d) || p4d_bad(p4d)) 162 break; 163 164 pudp = pud_offset(p4dp, addr); 165 pud = READ_ONCE(*pudp); 166 pr_cont(", pud=%016llx", pud_val(pud)); 167 if (pud_none(pud) || pud_bad(pud)) 168 break; 169 170 pmdp = pmd_offset(pudp, addr); 171 pmd = READ_ONCE(*pmdp); 172 pr_cont(", pmd=%016llx", pmd_val(pmd)); 173 if (pmd_none(pmd) || pmd_bad(pmd)) 174 break; 175 176 ptep = pte_offset_map(pmdp, addr); 177 pte = READ_ONCE(*ptep); 178 pr_cont(", pte=%016llx", pte_val(pte)); 179 pte_unmap(ptep); 180 } while(0); 181 182 pr_cont("\n"); 183 } 184 185 /* 186 * This function sets the access flags (dirty, accessed), as well as write 187 * permission, and only to a more permissive setting. 188 * 189 * It needs to cope with hardware update of the accessed/dirty state by other 190 * agents in the system and can safely skip the __sync_icache_dcache() call as, 191 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 192 * 193 * Returns whether or not the PTE actually changed. 194 */ 195 int ptep_set_access_flags(struct vm_area_struct *vma, 196 unsigned long address, pte_t *ptep, 197 pte_t entry, int dirty) 198 { 199 pteval_t old_pteval, pteval; 200 pte_t pte = READ_ONCE(*ptep); 201 202 if (pte_same(pte, entry)) 203 return 0; 204 205 /* only preserve the access flags and write permission */ 206 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 207 208 /* 209 * Setting the flags must be done atomically to avoid racing with the 210 * hardware update of the access/dirty state. The PTE_RDONLY bit must 211 * be set to the most permissive (lowest value) of *ptep and entry 212 * (calculated as: a & b == ~(~a | ~b)). 213 */ 214 pte_val(entry) ^= PTE_RDONLY; 215 pteval = pte_val(pte); 216 do { 217 old_pteval = pteval; 218 pteval ^= PTE_RDONLY; 219 pteval |= pte_val(entry); 220 pteval ^= PTE_RDONLY; 221 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 222 } while (pteval != old_pteval); 223 224 /* Invalidate a stale read-only entry */ 225 if (dirty) 226 flush_tlb_page(vma, address); 227 return 1; 228 } 229 230 static bool is_el1_instruction_abort(unsigned int esr) 231 { 232 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 233 } 234 235 static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr, 236 struct pt_regs *regs) 237 { 238 unsigned int ec = ESR_ELx_EC(esr); 239 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE; 240 241 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR) 242 return false; 243 244 if (fsc_type == ESR_ELx_FSC_PERM) 245 return true; 246 247 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan()) 248 return fsc_type == ESR_ELx_FSC_FAULT && 249 (regs->pstate & PSR_PAN_BIT); 250 251 return false; 252 } 253 254 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, 255 unsigned int esr, 256 struct pt_regs *regs) 257 { 258 unsigned long flags; 259 u64 par, dfsc; 260 261 if (ESR_ELx_EC(esr) != ESR_ELx_EC_DABT_CUR || 262 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT) 263 return false; 264 265 local_irq_save(flags); 266 asm volatile("at s1e1r, %0" :: "r" (addr)); 267 isb(); 268 par = read_sysreg_par(); 269 local_irq_restore(flags); 270 271 /* 272 * If we now have a valid translation, treat the translation fault as 273 * spurious. 274 */ 275 if (!(par & SYS_PAR_EL1_F)) 276 return true; 277 278 /* 279 * If we got a different type of fault from the AT instruction, 280 * treat the translation fault as spurious. 281 */ 282 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); 283 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; 284 } 285 286 static void die_kernel_fault(const char *msg, unsigned long addr, 287 unsigned int esr, struct pt_regs *regs) 288 { 289 bust_spinlocks(1); 290 291 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg, 292 addr); 293 294 mem_abort_decode(esr); 295 296 show_pte(addr); 297 die("Oops", regs, esr); 298 bust_spinlocks(0); 299 do_exit(SIGKILL); 300 } 301 302 #ifdef CONFIG_KASAN_HW_TAGS 303 static void report_tag_fault(unsigned long addr, unsigned int esr, 304 struct pt_regs *regs) 305 { 306 static bool reported; 307 bool is_write; 308 309 if (READ_ONCE(reported)) 310 return; 311 312 /* 313 * This is used for KASAN tests and assumes that no MTE faults 314 * happened before running the tests. 315 */ 316 if (mte_report_once()) 317 WRITE_ONCE(reported, true); 318 319 /* 320 * SAS bits aren't set for all faults reported in EL1, so we can't 321 * find out access size. 322 */ 323 is_write = !!(esr & ESR_ELx_WNR); 324 kasan_report(addr, 0, is_write, regs->pc); 325 } 326 #else 327 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */ 328 static inline void report_tag_fault(unsigned long addr, unsigned int esr, 329 struct pt_regs *regs) { } 330 #endif 331 332 static void do_tag_recovery(unsigned long addr, unsigned int esr, 333 struct pt_regs *regs) 334 { 335 336 report_tag_fault(addr, esr, regs); 337 338 /* 339 * Disable MTE Tag Checking on the local CPU for the current EL. 340 * It will be done lazily on the other CPUs when they will hit a 341 * tag fault. 342 */ 343 sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE); 344 isb(); 345 } 346 347 static bool is_el1_mte_sync_tag_check_fault(unsigned int esr) 348 { 349 unsigned int ec = ESR_ELx_EC(esr); 350 unsigned int fsc = esr & ESR_ELx_FSC; 351 352 if (ec != ESR_ELx_EC_DABT_CUR) 353 return false; 354 355 if (fsc == ESR_ELx_FSC_MTE) 356 return true; 357 358 return false; 359 } 360 361 static void __do_kernel_fault(unsigned long addr, unsigned int esr, 362 struct pt_regs *regs) 363 { 364 const char *msg; 365 366 /* 367 * Are we prepared to handle this kernel fault? 368 * We are almost certainly not prepared to handle instruction faults. 369 */ 370 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 371 return; 372 373 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs), 374 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) 375 return; 376 377 if (is_el1_mte_sync_tag_check_fault(esr)) { 378 do_tag_recovery(addr, esr, regs); 379 380 return; 381 } 382 383 if (is_el1_permission_fault(addr, esr, regs)) { 384 if (esr & ESR_ELx_WNR) 385 msg = "write to read-only memory"; 386 else if (is_el1_instruction_abort(esr)) 387 msg = "execute from non-executable memory"; 388 else 389 msg = "read from unreadable memory"; 390 } else if (addr < PAGE_SIZE) { 391 msg = "NULL pointer dereference"; 392 } else { 393 if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs)) 394 return; 395 396 msg = "paging request"; 397 } 398 399 die_kernel_fault(msg, addr, esr, regs); 400 } 401 402 static void set_thread_esr(unsigned long address, unsigned int esr) 403 { 404 current->thread.fault_address = address; 405 406 /* 407 * If the faulting address is in the kernel, we must sanitize the ESR. 408 * From userspace's point of view, kernel-only mappings don't exist 409 * at all, so we report them as level 0 translation faults. 410 * (This is not quite the way that "no mapping there at all" behaves: 411 * an alignment fault not caused by the memory type would take 412 * precedence over translation fault for a real access to empty 413 * space. Unfortunately we can't easily distinguish "alignment fault 414 * not caused by memory type" from "alignment fault caused by memory 415 * type", so we ignore this wrinkle and just return the translation 416 * fault.) 417 */ 418 if (!is_ttbr0_addr(current->thread.fault_address)) { 419 switch (ESR_ELx_EC(esr)) { 420 case ESR_ELx_EC_DABT_LOW: 421 /* 422 * These bits provide only information about the 423 * faulting instruction, which userspace knows already. 424 * We explicitly clear bits which are architecturally 425 * RES0 in case they are given meanings in future. 426 * We always report the ESR as if the fault was taken 427 * to EL1 and so ISV and the bits in ISS[23:14] are 428 * clear. (In fact it always will be a fault to EL1.) 429 */ 430 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 431 ESR_ELx_CM | ESR_ELx_WNR; 432 esr |= ESR_ELx_FSC_FAULT; 433 break; 434 case ESR_ELx_EC_IABT_LOW: 435 /* 436 * Claim a level 0 translation fault. 437 * All other bits are architecturally RES0 for faults 438 * reported with that DFSC value, so we clear them. 439 */ 440 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 441 esr |= ESR_ELx_FSC_FAULT; 442 break; 443 default: 444 /* 445 * This should never happen (entry.S only brings us 446 * into this code for insn and data aborts from a lower 447 * exception level). Fail safe by not providing an ESR 448 * context record at all. 449 */ 450 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr); 451 esr = 0; 452 break; 453 } 454 } 455 456 current->thread.fault_code = esr; 457 } 458 459 static void do_bad_area(unsigned long far, unsigned int esr, 460 struct pt_regs *regs) 461 { 462 unsigned long addr = untagged_addr(far); 463 464 /* 465 * If we are in kernel mode at this point, we have no context to 466 * handle this fault with. 467 */ 468 if (user_mode(regs)) { 469 const struct fault_info *inf = esr_to_fault_info(esr); 470 471 set_thread_esr(addr, esr); 472 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name); 473 } else { 474 __do_kernel_fault(addr, esr, regs); 475 } 476 } 477 478 #define VM_FAULT_BADMAP 0x010000 479 #define VM_FAULT_BADACCESS 0x020000 480 481 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, 482 unsigned int mm_flags, unsigned long vm_flags, 483 struct pt_regs *regs) 484 { 485 struct vm_area_struct *vma = find_vma(mm, addr); 486 487 if (unlikely(!vma)) 488 return VM_FAULT_BADMAP; 489 490 /* 491 * Ok, we have a good vm_area for this memory access, so we can handle 492 * it. 493 */ 494 if (unlikely(vma->vm_start > addr)) { 495 if (!(vma->vm_flags & VM_GROWSDOWN)) 496 return VM_FAULT_BADMAP; 497 if (expand_stack(vma, addr)) 498 return VM_FAULT_BADMAP; 499 } 500 501 /* 502 * Check that the permissions on the VMA allow for the fault which 503 * occurred. 504 */ 505 if (!(vma->vm_flags & vm_flags)) 506 return VM_FAULT_BADACCESS; 507 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags, regs); 508 } 509 510 static bool is_el0_instruction_abort(unsigned int esr) 511 { 512 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 513 } 514 515 /* 516 * Note: not valid for EL1 DC IVAC, but we never use that such that it 517 * should fault. EL0 cannot issue DC IVAC (undef). 518 */ 519 static bool is_write_abort(unsigned int esr) 520 { 521 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); 522 } 523 524 static int __kprobes do_page_fault(unsigned long far, unsigned int esr, 525 struct pt_regs *regs) 526 { 527 const struct fault_info *inf; 528 struct mm_struct *mm = current->mm; 529 vm_fault_t fault; 530 unsigned long vm_flags; 531 unsigned int mm_flags = FAULT_FLAG_DEFAULT; 532 unsigned long addr = untagged_addr(far); 533 534 if (kprobe_page_fault(regs, esr)) 535 return 0; 536 537 /* 538 * If we're in an interrupt or have no user context, we must not take 539 * the fault. 540 */ 541 if (faulthandler_disabled() || !mm) 542 goto no_context; 543 544 if (user_mode(regs)) 545 mm_flags |= FAULT_FLAG_USER; 546 547 /* 548 * vm_flags tells us what bits we must have in vma->vm_flags 549 * for the fault to be benign, __do_page_fault() would check 550 * vma->vm_flags & vm_flags and returns an error if the 551 * intersection is empty 552 */ 553 if (is_el0_instruction_abort(esr)) { 554 /* It was exec fault */ 555 vm_flags = VM_EXEC; 556 mm_flags |= FAULT_FLAG_INSTRUCTION; 557 } else if (is_write_abort(esr)) { 558 /* It was write fault */ 559 vm_flags = VM_WRITE; 560 mm_flags |= FAULT_FLAG_WRITE; 561 } else { 562 /* It was read fault */ 563 vm_flags = VM_READ; 564 /* Write implies read */ 565 vm_flags |= VM_WRITE; 566 /* If EPAN is absent then exec implies read */ 567 if (!cpus_have_const_cap(ARM64_HAS_EPAN)) 568 vm_flags |= VM_EXEC; 569 } 570 571 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) { 572 if (is_el1_instruction_abort(esr)) 573 die_kernel_fault("execution of user memory", 574 addr, esr, regs); 575 576 if (!search_exception_tables(regs->pc)) 577 die_kernel_fault("access to user memory outside uaccess routines", 578 addr, esr, regs); 579 } 580 581 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 582 583 /* 584 * As per x86, we may deadlock here. However, since the kernel only 585 * validly references user space from well defined areas of the code, 586 * we can bug out early if this is from code which shouldn't. 587 */ 588 if (!mmap_read_trylock(mm)) { 589 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 590 goto no_context; 591 retry: 592 mmap_read_lock(mm); 593 } else { 594 /* 595 * The above mmap_read_trylock() might have succeeded in which 596 * case, we'll have missed the might_sleep() from down_read(). 597 */ 598 might_sleep(); 599 #ifdef CONFIG_DEBUG_VM 600 if (!user_mode(regs) && !search_exception_tables(regs->pc)) { 601 mmap_read_unlock(mm); 602 goto no_context; 603 } 604 #endif 605 } 606 607 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs); 608 609 /* Quick path to respond to signals */ 610 if (fault_signal_pending(fault, regs)) { 611 if (!user_mode(regs)) 612 goto no_context; 613 return 0; 614 } 615 616 if (fault & VM_FAULT_RETRY) { 617 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) { 618 mm_flags |= FAULT_FLAG_TRIED; 619 goto retry; 620 } 621 } 622 mmap_read_unlock(mm); 623 624 /* 625 * Handle the "normal" (no error) case first. 626 */ 627 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 628 VM_FAULT_BADACCESS)))) 629 return 0; 630 631 /* 632 * If we are in kernel mode at this point, we have no context to 633 * handle this fault with. 634 */ 635 if (!user_mode(regs)) 636 goto no_context; 637 638 if (fault & VM_FAULT_OOM) { 639 /* 640 * We ran out of memory, call the OOM killer, and return to 641 * userspace (which will retry the fault, or kill us if we got 642 * oom-killed). 643 */ 644 pagefault_out_of_memory(); 645 return 0; 646 } 647 648 inf = esr_to_fault_info(esr); 649 set_thread_esr(addr, esr); 650 if (fault & VM_FAULT_SIGBUS) { 651 /* 652 * We had some memory, but were unable to successfully fix up 653 * this page fault. 654 */ 655 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name); 656 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) { 657 unsigned int lsb; 658 659 lsb = PAGE_SHIFT; 660 if (fault & VM_FAULT_HWPOISON_LARGE) 661 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 662 663 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name); 664 } else { 665 /* 666 * Something tried to access memory that isn't in our memory 667 * map. 668 */ 669 arm64_force_sig_fault(SIGSEGV, 670 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, 671 far, inf->name); 672 } 673 674 return 0; 675 676 no_context: 677 __do_kernel_fault(addr, esr, regs); 678 return 0; 679 } 680 681 static int __kprobes do_translation_fault(unsigned long far, 682 unsigned int esr, 683 struct pt_regs *regs) 684 { 685 unsigned long addr = untagged_addr(far); 686 687 if (is_ttbr0_addr(addr)) 688 return do_page_fault(far, esr, regs); 689 690 do_bad_area(far, esr, regs); 691 return 0; 692 } 693 694 static int do_alignment_fault(unsigned long far, unsigned int esr, 695 struct pt_regs *regs) 696 { 697 do_bad_area(far, esr, regs); 698 return 0; 699 } 700 701 static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs) 702 { 703 return 1; /* "fault" */ 704 } 705 706 static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs) 707 { 708 const struct fault_info *inf; 709 unsigned long siaddr; 710 711 inf = esr_to_fault_info(esr); 712 713 if (user_mode(regs) && apei_claim_sea(regs) == 0) { 714 /* 715 * APEI claimed this as a firmware-first notification. 716 * Some processing deferred to task_work before ret_to_user(). 717 */ 718 return 0; 719 } 720 721 if (esr & ESR_ELx_FnV) { 722 siaddr = 0; 723 } else { 724 /* 725 * The architecture specifies that the tag bits of FAR_EL1 are 726 * UNKNOWN for synchronous external aborts. Mask them out now 727 * so that userspace doesn't see them. 728 */ 729 siaddr = untagged_addr(far); 730 } 731 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); 732 733 return 0; 734 } 735 736 static int do_tag_check_fault(unsigned long far, unsigned int esr, 737 struct pt_regs *regs) 738 { 739 /* 740 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN 741 * for tag check faults. Set them to corresponding bits in the untagged 742 * address. 743 */ 744 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); 745 do_bad_area(far, esr, regs); 746 return 0; 747 } 748 749 static const struct fault_info fault_info[] = { 750 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 751 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 752 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 753 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 754 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 755 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 756 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 757 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 758 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 759 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 760 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 761 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 762 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 763 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 764 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 765 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 766 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 767 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" }, 768 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 769 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 770 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 771 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 772 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 773 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 774 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 775 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 776 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 777 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 778 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 779 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 780 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 781 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 782 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 783 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 784 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 785 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 786 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 787 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 788 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 789 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 790 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 791 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 792 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 793 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 794 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 795 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 796 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 797 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 798 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 799 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 800 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 801 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 802 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 803 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 804 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 805 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 806 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 807 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 808 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 809 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 810 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 811 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 812 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 813 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 814 }; 815 816 void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs) 817 { 818 const struct fault_info *inf = esr_to_fault_info(esr); 819 unsigned long addr = untagged_addr(far); 820 821 if (!inf->fn(far, esr, regs)) 822 return; 823 824 if (!user_mode(regs)) { 825 pr_alert("Unhandled fault at 0x%016lx\n", addr); 826 mem_abort_decode(esr); 827 show_pte(addr); 828 } 829 830 /* 831 * At this point we have an unrecognized fault type whose tag bits may 832 * have been defined as UNKNOWN. Therefore we only expose the untagged 833 * address to the signal handler. 834 */ 835 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr); 836 } 837 NOKPROBE_SYMBOL(do_mem_abort); 838 839 void do_el0_irq_bp_hardening(void) 840 { 841 /* PC has already been checked in entry.S */ 842 arm64_apply_bp_hardening(); 843 } 844 NOKPROBE_SYMBOL(do_el0_irq_bp_hardening); 845 846 void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs) 847 { 848 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN, 849 addr, esr); 850 } 851 NOKPROBE_SYMBOL(do_sp_pc_abort); 852 853 int __init early_brk64(unsigned long addr, unsigned int esr, 854 struct pt_regs *regs); 855 856 /* 857 * __refdata because early_brk64 is __init, but the reference to it is 858 * clobbered at arch_initcall time. 859 * See traps.c and debug-monitors.c:debug_traps_init(). 860 */ 861 static struct fault_info __refdata debug_fault_info[] = { 862 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 863 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 864 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 865 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 866 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 867 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 868 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 869 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 870 }; 871 872 void __init hook_debug_fault_code(int nr, 873 int (*fn)(unsigned long, unsigned int, struct pt_regs *), 874 int sig, int code, const char *name) 875 { 876 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 877 878 debug_fault_info[nr].fn = fn; 879 debug_fault_info[nr].sig = sig; 880 debug_fault_info[nr].code = code; 881 debug_fault_info[nr].name = name; 882 } 883 884 /* 885 * In debug exception context, we explicitly disable preemption despite 886 * having interrupts disabled. 887 * This serves two purposes: it makes it much less likely that we would 888 * accidentally schedule in exception context and it will force a warning 889 * if we somehow manage to schedule by accident. 890 */ 891 static void debug_exception_enter(struct pt_regs *regs) 892 { 893 preempt_disable(); 894 895 /* This code is a bit fragile. Test it. */ 896 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); 897 } 898 NOKPROBE_SYMBOL(debug_exception_enter); 899 900 static void debug_exception_exit(struct pt_regs *regs) 901 { 902 preempt_enable_no_resched(); 903 } 904 NOKPROBE_SYMBOL(debug_exception_exit); 905 906 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr, 907 struct pt_regs *regs) 908 { 909 const struct fault_info *inf = esr_to_debug_fault_info(esr); 910 unsigned long pc = instruction_pointer(regs); 911 912 debug_exception_enter(regs); 913 914 if (user_mode(regs) && !is_ttbr0_addr(pc)) 915 arm64_apply_bp_hardening(); 916 917 if (inf->fn(addr_if_watchpoint, esr, regs)) { 918 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr); 919 } 920 921 debug_exception_exit(regs); 922 } 923 NOKPROBE_SYMBOL(do_debug_exception); 924