1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2019 Arm Ltd. 3 4 #include <linux/arm-smccc.h> 5 #include <linux/kvm_host.h> 6 7 #include <asm/kvm_emulate.h> 8 9 #include <kvm/arm_hypercalls.h> 10 #include <kvm/arm_psci.h> 11 12 #define KVM_ARM_SMCCC_STD_FEATURES \ 13 GENMASK(KVM_REG_ARM_STD_BMAP_BIT_COUNT - 1, 0) 14 #define KVM_ARM_SMCCC_STD_HYP_FEATURES \ 15 GENMASK(KVM_REG_ARM_STD_HYP_BMAP_BIT_COUNT - 1, 0) 16 #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES \ 17 GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT - 1, 0) 18 #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2 \ 19 GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_2_BIT_COUNT - 1, 0) 20 21 static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val) 22 { 23 struct system_time_snapshot systime_snapshot; 24 u64 cycles = ~0UL; 25 u32 feature; 26 27 /* 28 * system time and counter value must captured at the same 29 * time to keep consistency and precision. 30 */ 31 ktime_get_snapshot_id(CLOCK_REALTIME, &systime_snapshot); 32 33 /* 34 * This is only valid if the current clocksource is the 35 * architected counter, as this is the only one the guest 36 * can see. 37 */ 38 if (systime_snapshot.cs_id != CSID_ARM_ARCH_COUNTER) 39 return; 40 41 /* 42 * The guest selects one of the two reference counters 43 * (virtual or physical) with the first argument of the SMCCC 44 * call. In case the identifier is not supported, error out. 45 */ 46 feature = smccc_get_arg1(vcpu); 47 switch (feature) { 48 case KVM_PTP_VIRT_COUNTER: 49 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.voffset; 50 break; 51 case KVM_PTP_PHYS_COUNTER: 52 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.poffset; 53 break; 54 default: 55 return; 56 } 57 58 /* 59 * This relies on the top bit of val[0] never being set for 60 * valid values of system time, because that is *really* far 61 * in the future (about 292 years from 1970, and at that stage 62 * nobody will give a damn about it). 63 */ 64 val[0] = upper_32_bits(systime_snapshot.systime); 65 val[1] = lower_32_bits(systime_snapshot.systime); 66 val[2] = upper_32_bits(cycles); 67 val[3] = lower_32_bits(cycles); 68 } 69 70 static bool kvm_smccc_default_allowed(u32 func_id) 71 { 72 switch (func_id) { 73 /* 74 * List of function-ids that are not gated with the bitmapped 75 * feature firmware registers, and are to be allowed for 76 * servicing the call by default. 77 */ 78 case ARM_SMCCC_VERSION_FUNC_ID: 79 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID: 80 return true; 81 default: 82 /* PSCI 0.2 and up is in the 0:0x1f range */ 83 if (ARM_SMCCC_OWNER_NUM(func_id) == ARM_SMCCC_OWNER_STANDARD && 84 ARM_SMCCC_FUNC_NUM(func_id) <= 0x1f) 85 return true; 86 87 /* 88 * KVM's PSCI 0.1 doesn't comply with SMCCC, and has 89 * its own function-id base and range 90 */ 91 if (func_id >= KVM_PSCI_FN(0) && func_id <= KVM_PSCI_FN(3)) 92 return true; 93 94 return false; 95 } 96 } 97 98 static bool kvm_smccc_test_fw_bmap(struct kvm_vcpu *vcpu, u32 func_id) 99 { 100 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 101 102 switch (func_id) { 103 case ARM_SMCCC_TRNG_VERSION: 104 case ARM_SMCCC_TRNG_FEATURES: 105 case ARM_SMCCC_TRNG_GET_UUID: 106 case ARM_SMCCC_TRNG_RND32: 107 case ARM_SMCCC_TRNG_RND64: 108 return test_bit(KVM_REG_ARM_STD_BIT_TRNG_V1_0, 109 &smccc_feat->std_bmap); 110 case ARM_SMCCC_HV_PV_TIME_FEATURES: 111 case ARM_SMCCC_HV_PV_TIME_ST: 112 return test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME, 113 &smccc_feat->std_hyp_bmap); 114 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: 115 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID: 116 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT, 117 &smccc_feat->vendor_hyp_bmap); 118 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: 119 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_PTP, 120 &smccc_feat->vendor_hyp_bmap); 121 default: 122 return false; 123 } 124 } 125 126 #define SMC32_ARCH_RANGE_BEGIN ARM_SMCCC_VERSION_FUNC_ID 127 #define SMC32_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 128 ARM_SMCCC_SMC_32, \ 129 0, ARM_SMCCC_FUNC_MASK) 130 131 #define SMC64_ARCH_RANGE_BEGIN ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 132 ARM_SMCCC_SMC_64, \ 133 0, 0) 134 #define SMC64_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 135 ARM_SMCCC_SMC_64, \ 136 0, ARM_SMCCC_FUNC_MASK) 137 138 static int kvm_smccc_filter_insert_reserved(struct kvm *kvm) 139 { 140 int r; 141 142 /* 143 * Prevent userspace from handling any SMCCC calls in the architecture 144 * range, avoiding the risk of misrepresenting Spectre mitigation status 145 * to the guest. 146 */ 147 r = mtree_insert_range(&kvm->arch.smccc_filter, 148 SMC32_ARCH_RANGE_BEGIN, SMC32_ARCH_RANGE_END, 149 xa_mk_value(KVM_SMCCC_FILTER_HANDLE), 150 GFP_KERNEL_ACCOUNT); 151 if (r) 152 goto out_destroy; 153 154 r = mtree_insert_range(&kvm->arch.smccc_filter, 155 SMC64_ARCH_RANGE_BEGIN, SMC64_ARCH_RANGE_END, 156 xa_mk_value(KVM_SMCCC_FILTER_HANDLE), 157 GFP_KERNEL_ACCOUNT); 158 if (r) 159 goto out_destroy; 160 161 return 0; 162 out_destroy: 163 mtree_destroy(&kvm->arch.smccc_filter); 164 return r; 165 } 166 167 static bool kvm_smccc_filter_configured(struct kvm *kvm) 168 { 169 return !mtree_empty(&kvm->arch.smccc_filter); 170 } 171 172 static int kvm_smccc_set_filter(struct kvm *kvm, struct kvm_smccc_filter __user *uaddr) 173 { 174 const void *zero_page = page_to_virt(ZERO_PAGE(0)); 175 struct kvm_smccc_filter filter; 176 u32 start, end; 177 int r; 178 179 if (copy_from_user(&filter, uaddr, sizeof(filter))) 180 return -EFAULT; 181 182 if (memcmp(filter.pad, zero_page, sizeof(filter.pad))) 183 return -EINVAL; 184 185 start = filter.base; 186 end = start + filter.nr_functions - 1; 187 188 if (!filter.nr_functions || end < start || 189 filter.action >= NR_SMCCC_FILTER_ACTIONS) 190 return -EINVAL; 191 192 mutex_lock(&kvm->arch.config_lock); 193 194 if (kvm_vm_has_ran_once(kvm)) { 195 r = -EBUSY; 196 goto out_unlock; 197 } 198 199 if (!kvm_smccc_filter_configured(kvm)) { 200 r = kvm_smccc_filter_insert_reserved(kvm); 201 if (WARN_ON_ONCE(r)) 202 goto out_unlock; 203 } 204 205 r = mtree_insert_range(&kvm->arch.smccc_filter, start, end, 206 xa_mk_value(filter.action), GFP_KERNEL_ACCOUNT); 207 out_unlock: 208 mutex_unlock(&kvm->arch.config_lock); 209 return r; 210 } 211 212 static u8 kvm_smccc_filter_get_action(struct kvm *kvm, u32 func_id) 213 { 214 unsigned long idx = func_id; 215 void *val; 216 217 if (!kvm_smccc_filter_configured(kvm)) 218 return KVM_SMCCC_FILTER_HANDLE; 219 220 /* 221 * But where's the error handling, you say? 222 * 223 * mt_find() returns NULL if no entry was found, which just so happens 224 * to match KVM_SMCCC_FILTER_HANDLE. 225 */ 226 val = mt_find(&kvm->arch.smccc_filter, &idx, idx); 227 return xa_to_value(val); 228 } 229 230 static u8 kvm_smccc_get_action(struct kvm_vcpu *vcpu, u32 func_id) 231 { 232 /* 233 * Intervening actions in the SMCCC filter take precedence over the 234 * pseudo-firmware register bitmaps. 235 */ 236 u8 action = kvm_smccc_filter_get_action(vcpu->kvm, func_id); 237 if (action != KVM_SMCCC_FILTER_HANDLE) 238 return action; 239 240 if (kvm_smccc_test_fw_bmap(vcpu, func_id) || 241 kvm_smccc_default_allowed(func_id)) 242 return KVM_SMCCC_FILTER_HANDLE; 243 244 return KVM_SMCCC_FILTER_DENY; 245 } 246 247 static void kvm_prepare_hypercall_exit(struct kvm_vcpu *vcpu, u32 func_id) 248 { 249 u8 ec = ESR_ELx_EC(kvm_vcpu_get_esr(vcpu)); 250 struct kvm_run *run = vcpu->run; 251 u64 flags = 0; 252 253 if (ec == ESR_ELx_EC_SMC32 || ec == ESR_ELx_EC_SMC64) 254 flags |= KVM_HYPERCALL_EXIT_SMC; 255 256 if (!kvm_vcpu_trap_il_is32bit(vcpu)) 257 flags |= KVM_HYPERCALL_EXIT_16BIT; 258 259 run->exit_reason = KVM_EXIT_HYPERCALL; 260 run->hypercall = (typeof(run->hypercall)) { 261 .nr = func_id, 262 .flags = flags, 263 }; 264 } 265 266 int kvm_smccc_call_handler(struct kvm_vcpu *vcpu) 267 { 268 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 269 u32 func_id = smccc_get_function(vcpu); 270 u64 val[4] = {SMCCC_RET_NOT_SUPPORTED}; 271 u32 feature; 272 u8 action; 273 gpa_t gpa; 274 uuid_t uuid; 275 276 action = kvm_smccc_get_action(vcpu, func_id); 277 switch (action) { 278 case KVM_SMCCC_FILTER_HANDLE: 279 break; 280 case KVM_SMCCC_FILTER_DENY: 281 goto out; 282 case KVM_SMCCC_FILTER_FWD_TO_USER: 283 kvm_prepare_hypercall_exit(vcpu, func_id); 284 return 0; 285 default: 286 WARN_RATELIMIT(1, "Unhandled SMCCC filter action: %d\n", action); 287 goto out; 288 } 289 290 switch (func_id) { 291 case ARM_SMCCC_VERSION_FUNC_ID: 292 val[0] = ARM_SMCCC_VERSION_1_1; 293 break; 294 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID: 295 feature = smccc_get_arg1(vcpu); 296 switch (feature) { 297 case ARM_SMCCC_ARCH_WORKAROUND_1: 298 switch (arm64_get_spectre_v2_state()) { 299 case SPECTRE_VULNERABLE: 300 break; 301 case SPECTRE_MITIGATED: 302 val[0] = SMCCC_RET_SUCCESS; 303 break; 304 case SPECTRE_UNAFFECTED: 305 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED; 306 break; 307 } 308 break; 309 case ARM_SMCCC_ARCH_WORKAROUND_2: 310 switch (arm64_get_spectre_v4_state()) { 311 case SPECTRE_VULNERABLE: 312 break; 313 case SPECTRE_MITIGATED: 314 /* 315 * SSBS everywhere: Indicate no firmware 316 * support, as the SSBS support will be 317 * indicated to the guest and the default is 318 * safe. 319 * 320 * Otherwise, expose a permanent mitigation 321 * to the guest, and hide SSBS so that the 322 * guest stays protected. 323 */ 324 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP)) 325 break; 326 fallthrough; 327 case SPECTRE_UNAFFECTED: 328 val[0] = SMCCC_RET_NOT_REQUIRED; 329 break; 330 } 331 break; 332 case ARM_SMCCC_ARCH_WORKAROUND_3: 333 switch (arm64_get_spectre_bhb_state()) { 334 case SPECTRE_VULNERABLE: 335 break; 336 case SPECTRE_MITIGATED: 337 val[0] = SMCCC_RET_SUCCESS; 338 break; 339 case SPECTRE_UNAFFECTED: 340 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED; 341 break; 342 } 343 break; 344 case ARM_SMCCC_HV_PV_TIME_FEATURES: 345 if (test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME, 346 &smccc_feat->std_hyp_bmap)) 347 val[0] = SMCCC_RET_SUCCESS; 348 break; 349 } 350 break; 351 case ARM_SMCCC_HV_PV_TIME_FEATURES: 352 val[0] = kvm_hypercall_pv_features(vcpu); 353 break; 354 case ARM_SMCCC_HV_PV_TIME_ST: 355 gpa = kvm_init_stolen_time(vcpu); 356 if (gpa != INVALID_GPA) 357 val[0] = gpa; 358 break; 359 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID: 360 uuid = ARM_SMCCC_VENDOR_HYP_UID_KVM; 361 val[0] = smccc_uuid_to_reg(&uuid, 0); 362 val[1] = smccc_uuid_to_reg(&uuid, 1); 363 val[2] = smccc_uuid_to_reg(&uuid, 2); 364 val[3] = smccc_uuid_to_reg(&uuid, 3); 365 break; 366 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: 367 val[0] = smccc_feat->vendor_hyp_bmap; 368 /* Function numbers 2-63 are reserved for pKVM for now */ 369 val[2] = smccc_feat->vendor_hyp_bmap_2; 370 break; 371 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: 372 kvm_ptp_get_time(vcpu, val); 373 break; 374 case ARM_SMCCC_TRNG_VERSION: 375 case ARM_SMCCC_TRNG_FEATURES: 376 case ARM_SMCCC_TRNG_GET_UUID: 377 case ARM_SMCCC_TRNG_RND32: 378 case ARM_SMCCC_TRNG_RND64: 379 return kvm_trng_call(vcpu); 380 default: 381 return kvm_psci_call(vcpu); 382 } 383 384 out: 385 smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]); 386 return 1; 387 } 388 389 static const u64 kvm_arm_fw_reg_ids[] = { 390 KVM_REG_ARM_PSCI_VERSION, 391 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, 392 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, 393 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, 394 KVM_REG_ARM_STD_BMAP, 395 KVM_REG_ARM_STD_HYP_BMAP, 396 KVM_REG_ARM_VENDOR_HYP_BMAP, 397 KVM_REG_ARM_VENDOR_HYP_BMAP_2, 398 }; 399 400 void kvm_arm_init_hypercalls(struct kvm *kvm) 401 { 402 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat; 403 404 smccc_feat->std_bmap = KVM_ARM_SMCCC_STD_FEATURES; 405 smccc_feat->std_hyp_bmap = KVM_ARM_SMCCC_STD_HYP_FEATURES; 406 smccc_feat->vendor_hyp_bmap = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES; 407 408 mt_init(&kvm->arch.smccc_filter); 409 } 410 411 void kvm_arm_teardown_hypercalls(struct kvm *kvm) 412 { 413 mtree_destroy(&kvm->arch.smccc_filter); 414 } 415 416 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu) 417 { 418 return ARRAY_SIZE(kvm_arm_fw_reg_ids); 419 } 420 421 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) 422 { 423 int i; 424 425 for (i = 0; i < ARRAY_SIZE(kvm_arm_fw_reg_ids); i++) { 426 if (put_user(kvm_arm_fw_reg_ids[i], uindices++)) 427 return -EFAULT; 428 } 429 430 return 0; 431 } 432 433 #define KVM_REG_FEATURE_LEVEL_MASK GENMASK(3, 0) 434 435 /* 436 * Convert the workaround level into an easy-to-compare number, where higher 437 * values mean better protection. 438 */ 439 static int get_kernel_wa_level(struct kvm_vcpu *vcpu, u64 regid) 440 { 441 switch (regid) { 442 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 443 switch (arm64_get_spectre_v2_state()) { 444 case SPECTRE_VULNERABLE: 445 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL; 446 case SPECTRE_MITIGATED: 447 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL; 448 case SPECTRE_UNAFFECTED: 449 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED; 450 } 451 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL; 452 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 453 switch (arm64_get_spectre_v4_state()) { 454 case SPECTRE_MITIGATED: 455 /* 456 * As for the hypercall discovery, we pretend we 457 * don't have any FW mitigation if SSBS is there at 458 * all times. 459 */ 460 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP)) 461 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 462 fallthrough; 463 case SPECTRE_UNAFFECTED: 464 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED; 465 case SPECTRE_VULNERABLE: 466 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 467 } 468 break; 469 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 470 switch (arm64_get_spectre_bhb_state()) { 471 case SPECTRE_VULNERABLE: 472 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL; 473 case SPECTRE_MITIGATED: 474 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL; 475 case SPECTRE_UNAFFECTED: 476 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED; 477 } 478 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL; 479 } 480 481 return -EINVAL; 482 } 483 484 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) 485 { 486 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 487 void __user *uaddr = (void __user *)(long)reg->addr; 488 u64 val; 489 490 switch (reg->id) { 491 case KVM_REG_ARM_PSCI_VERSION: 492 val = kvm_psci_version(vcpu); 493 break; 494 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 495 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 496 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 497 val = get_kernel_wa_level(vcpu, reg->id) & KVM_REG_FEATURE_LEVEL_MASK; 498 break; 499 case KVM_REG_ARM_STD_BMAP: 500 val = READ_ONCE(smccc_feat->std_bmap); 501 break; 502 case KVM_REG_ARM_STD_HYP_BMAP: 503 val = READ_ONCE(smccc_feat->std_hyp_bmap); 504 break; 505 case KVM_REG_ARM_VENDOR_HYP_BMAP: 506 val = READ_ONCE(smccc_feat->vendor_hyp_bmap); 507 break; 508 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 509 val = READ_ONCE(smccc_feat->vendor_hyp_bmap_2); 510 break; 511 default: 512 return -ENOENT; 513 } 514 515 if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id))) 516 return -EFAULT; 517 518 return 0; 519 } 520 521 static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val) 522 { 523 int ret = 0; 524 struct kvm *kvm = vcpu->kvm; 525 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat; 526 unsigned long *fw_reg_bmap, fw_reg_features; 527 528 switch (reg_id) { 529 case KVM_REG_ARM_STD_BMAP: 530 fw_reg_bmap = &smccc_feat->std_bmap; 531 fw_reg_features = KVM_ARM_SMCCC_STD_FEATURES; 532 break; 533 case KVM_REG_ARM_STD_HYP_BMAP: 534 fw_reg_bmap = &smccc_feat->std_hyp_bmap; 535 fw_reg_features = KVM_ARM_SMCCC_STD_HYP_FEATURES; 536 break; 537 case KVM_REG_ARM_VENDOR_HYP_BMAP: 538 fw_reg_bmap = &smccc_feat->vendor_hyp_bmap; 539 fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES; 540 break; 541 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 542 fw_reg_bmap = &smccc_feat->vendor_hyp_bmap_2; 543 fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2; 544 break; 545 default: 546 return -ENOENT; 547 } 548 549 /* Check for unsupported bit */ 550 if (val & ~fw_reg_features) 551 return -EINVAL; 552 553 mutex_lock(&kvm->arch.config_lock); 554 555 if (kvm_vm_has_ran_once(kvm) && val != *fw_reg_bmap) { 556 ret = -EBUSY; 557 goto out; 558 } 559 560 WRITE_ONCE(*fw_reg_bmap, val); 561 out: 562 mutex_unlock(&kvm->arch.config_lock); 563 return ret; 564 } 565 566 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) 567 { 568 void __user *uaddr = (void __user *)(long)reg->addr; 569 u64 val; 570 int wa_level; 571 572 if (KVM_REG_SIZE(reg->id) != sizeof(val)) 573 return -ENOENT; 574 if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id))) 575 return -EFAULT; 576 577 switch (reg->id) { 578 case KVM_REG_ARM_PSCI_VERSION: 579 { 580 bool wants_02; 581 582 wants_02 = vcpu_has_feature(vcpu, KVM_ARM_VCPU_PSCI_0_2); 583 584 switch (val) { 585 case KVM_ARM_PSCI_0_1: 586 if (wants_02) 587 return -EINVAL; 588 vcpu->kvm->arch.psci_version = val; 589 return 0; 590 case KVM_ARM_PSCI_0_2: 591 case KVM_ARM_PSCI_1_0: 592 case KVM_ARM_PSCI_1_1: 593 case KVM_ARM_PSCI_1_2: 594 case KVM_ARM_PSCI_1_3: 595 if (!wants_02) 596 return -EINVAL; 597 vcpu->kvm->arch.psci_version = val; 598 return 0; 599 } 600 break; 601 } 602 603 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 604 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 605 if (val & ~KVM_REG_FEATURE_LEVEL_MASK) 606 return -EINVAL; 607 608 if (get_kernel_wa_level(vcpu, reg->id) < val) 609 return -EINVAL; 610 611 return 0; 612 613 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 614 if (val & ~(KVM_REG_FEATURE_LEVEL_MASK | 615 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED)) 616 return -EINVAL; 617 618 /* The enabled bit must not be set unless the level is AVAIL. */ 619 if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) && 620 (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL) 621 return -EINVAL; 622 623 /* 624 * Map all the possible incoming states to the only two we 625 * really want to deal with. 626 */ 627 switch (val & KVM_REG_FEATURE_LEVEL_MASK) { 628 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL: 629 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN: 630 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 631 break; 632 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL: 633 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED: 634 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED; 635 break; 636 default: 637 return -EINVAL; 638 } 639 640 /* 641 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the 642 * other way around. 643 */ 644 if (get_kernel_wa_level(vcpu, reg->id) < wa_level) 645 return -EINVAL; 646 647 return 0; 648 case KVM_REG_ARM_STD_BMAP: 649 case KVM_REG_ARM_STD_HYP_BMAP: 650 case KVM_REG_ARM_VENDOR_HYP_BMAP: 651 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 652 return kvm_arm_set_fw_reg_bmap(vcpu, reg->id, val); 653 default: 654 return -ENOENT; 655 } 656 657 return -EINVAL; 658 } 659 660 int kvm_vm_smccc_has_attr(struct kvm *kvm, struct kvm_device_attr *attr) 661 { 662 switch (attr->attr) { 663 case KVM_ARM_VM_SMCCC_FILTER: 664 return 0; 665 default: 666 return -ENXIO; 667 } 668 } 669 670 int kvm_vm_smccc_set_attr(struct kvm *kvm, struct kvm_device_attr *attr) 671 { 672 void __user *uaddr = (void __user *)attr->addr; 673 674 switch (attr->attr) { 675 case KVM_ARM_VM_SMCCC_FILTER: 676 return kvm_smccc_set_filter(kvm, uaddr); 677 default: 678 return -ENXIO; 679 } 680 } 681