1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012-2015 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7 #include <hyp/sysreg-sr.h> 8 9 #include <linux/compiler.h> 10 #include <linux/kvm_host.h> 11 12 #include <asm/kprobes.h> 13 #include <asm/kvm_asm.h> 14 #include <asm/kvm_emulate.h> 15 #include <asm/kvm_hyp.h> 16 #include <asm/kvm_nested.h> 17 18 static void __sysreg_save_vel2_state(struct kvm_vcpu *vcpu) 19 { 20 /* These registers are common with EL1 */ 21 __vcpu_sys_reg(vcpu, PAR_EL1) = read_sysreg(par_el1); 22 __vcpu_sys_reg(vcpu, TPIDR_EL1) = read_sysreg(tpidr_el1); 23 24 __vcpu_sys_reg(vcpu, ESR_EL2) = read_sysreg_el1(SYS_ESR); 25 __vcpu_sys_reg(vcpu, AFSR0_EL2) = read_sysreg_el1(SYS_AFSR0); 26 __vcpu_sys_reg(vcpu, AFSR1_EL2) = read_sysreg_el1(SYS_AFSR1); 27 __vcpu_sys_reg(vcpu, FAR_EL2) = read_sysreg_el1(SYS_FAR); 28 __vcpu_sys_reg(vcpu, MAIR_EL2) = read_sysreg_el1(SYS_MAIR); 29 __vcpu_sys_reg(vcpu, VBAR_EL2) = read_sysreg_el1(SYS_VBAR); 30 __vcpu_sys_reg(vcpu, CONTEXTIDR_EL2) = read_sysreg_el1(SYS_CONTEXTIDR); 31 __vcpu_sys_reg(vcpu, AMAIR_EL2) = read_sysreg_el1(SYS_AMAIR); 32 33 /* 34 * In VHE mode those registers are compatible between EL1 and EL2, 35 * and the guest uses the _EL1 versions on the CPU naturally. 36 * So we save them into their _EL2 versions here. 37 * For nVHE mode we trap accesses to those registers, so our 38 * _EL2 copy in sys_regs[] is always up-to-date and we don't need 39 * to save anything here. 40 */ 41 if (vcpu_el2_e2h_is_set(vcpu)) { 42 u64 val; 43 44 /* 45 * We don't save CPTR_EL2, as accesses to CPACR_EL1 46 * are always trapped, ensuring that the in-memory 47 * copy is always up-to-date. A small blessing... 48 */ 49 __vcpu_sys_reg(vcpu, SCTLR_EL2) = read_sysreg_el1(SYS_SCTLR); 50 __vcpu_sys_reg(vcpu, TTBR0_EL2) = read_sysreg_el1(SYS_TTBR0); 51 __vcpu_sys_reg(vcpu, TTBR1_EL2) = read_sysreg_el1(SYS_TTBR1); 52 __vcpu_sys_reg(vcpu, TCR_EL2) = read_sysreg_el1(SYS_TCR); 53 54 /* 55 * The EL1 view of CNTKCTL_EL1 has a bunch of RES0 bits where 56 * the interesting CNTHCTL_EL2 bits live. So preserve these 57 * bits when reading back the guest-visible value. 58 */ 59 val = read_sysreg_el1(SYS_CNTKCTL); 60 val &= CNTKCTL_VALID_BITS; 61 __vcpu_sys_reg(vcpu, CNTHCTL_EL2) &= ~CNTKCTL_VALID_BITS; 62 __vcpu_sys_reg(vcpu, CNTHCTL_EL2) |= val; 63 } 64 65 __vcpu_sys_reg(vcpu, SP_EL2) = read_sysreg(sp_el1); 66 __vcpu_sys_reg(vcpu, ELR_EL2) = read_sysreg_el1(SYS_ELR); 67 __vcpu_sys_reg(vcpu, SPSR_EL2) = read_sysreg_el1(SYS_SPSR); 68 } 69 70 static void __sysreg_restore_vel2_state(struct kvm_vcpu *vcpu) 71 { 72 u64 val; 73 74 /* These registers are common with EL1 */ 75 write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1), par_el1); 76 write_sysreg(__vcpu_sys_reg(vcpu, TPIDR_EL1), tpidr_el1); 77 78 write_sysreg(__vcpu_sys_reg(vcpu, MPIDR_EL1), vmpidr_el2); 79 write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2), SYS_MAIR); 80 write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2), SYS_VBAR); 81 write_sysreg_el1(__vcpu_sys_reg(vcpu, CONTEXTIDR_EL2), SYS_CONTEXTIDR); 82 write_sysreg_el1(__vcpu_sys_reg(vcpu, AMAIR_EL2), SYS_AMAIR); 83 84 if (vcpu_el2_e2h_is_set(vcpu)) { 85 /* 86 * In VHE mode those registers are compatible between 87 * EL1 and EL2. 88 */ 89 write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2), SYS_SCTLR); 90 write_sysreg_el1(__vcpu_sys_reg(vcpu, CPTR_EL2), SYS_CPACR); 91 write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2), SYS_TTBR0); 92 write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR1_EL2), SYS_TTBR1); 93 write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR_EL2), SYS_TCR); 94 write_sysreg_el1(__vcpu_sys_reg(vcpu, CNTHCTL_EL2), SYS_CNTKCTL); 95 } else { 96 /* 97 * CNTHCTL_EL2 only affects EL1 when running nVHE, so 98 * no need to restore it. 99 */ 100 val = translate_sctlr_el2_to_sctlr_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2)); 101 write_sysreg_el1(val, SYS_SCTLR); 102 val = translate_cptr_el2_to_cpacr_el1(__vcpu_sys_reg(vcpu, CPTR_EL2)); 103 write_sysreg_el1(val, SYS_CPACR); 104 val = translate_ttbr0_el2_to_ttbr0_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2)); 105 write_sysreg_el1(val, SYS_TTBR0); 106 val = translate_tcr_el2_to_tcr_el1(__vcpu_sys_reg(vcpu, TCR_EL2)); 107 write_sysreg_el1(val, SYS_TCR); 108 } 109 110 write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR); 111 write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2), SYS_AFSR0); 112 write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2), SYS_AFSR1); 113 write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2), SYS_FAR); 114 write_sysreg(__vcpu_sys_reg(vcpu, SP_EL2), sp_el1); 115 write_sysreg_el1(__vcpu_sys_reg(vcpu, ELR_EL2), SYS_ELR); 116 write_sysreg_el1(__vcpu_sys_reg(vcpu, SPSR_EL2), SYS_SPSR); 117 } 118 119 /* 120 * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and 121 * pstate, which are handled as part of the el2 return state) on every 122 * switch (sp_el0 is being dealt with in the assembly code). 123 * tpidr_el0 and tpidrro_el0 only need to be switched when going 124 * to host userspace or a different VCPU. EL1 registers only need to be 125 * switched when potentially going to run a different VCPU. The latter two 126 * classes are handled as part of kvm_arch_vcpu_load and kvm_arch_vcpu_put. 127 */ 128 129 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt) 130 { 131 __sysreg_save_common_state(ctxt); 132 } 133 NOKPROBE_SYMBOL(sysreg_save_host_state_vhe); 134 135 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt) 136 { 137 __sysreg_save_common_state(ctxt); 138 __sysreg_save_el2_return_state(ctxt); 139 } 140 NOKPROBE_SYMBOL(sysreg_save_guest_state_vhe); 141 142 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt) 143 { 144 __sysreg_restore_common_state(ctxt); 145 } 146 NOKPROBE_SYMBOL(sysreg_restore_host_state_vhe); 147 148 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt) 149 { 150 __sysreg_restore_common_state(ctxt); 151 __sysreg_restore_el2_return_state(ctxt); 152 } 153 NOKPROBE_SYMBOL(sysreg_restore_guest_state_vhe); 154 155 /** 156 * __vcpu_load_switch_sysregs - Load guest system registers to the physical CPU 157 * 158 * @vcpu: The VCPU pointer 159 * 160 * Load system registers that do not affect the host's execution, for 161 * example EL1 system registers on a VHE system where the host kernel 162 * runs at EL2. This function is called from KVM's vcpu_load() function 163 * and loading system register state early avoids having to load them on 164 * every entry to the VM. 165 */ 166 void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu) 167 { 168 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; 169 struct kvm_cpu_context *host_ctxt; 170 u64 mpidr; 171 172 host_ctxt = host_data_ptr(host_ctxt); 173 __sysreg_save_user_state(host_ctxt); 174 175 /* 176 * When running a normal EL1 guest, we only load a new vcpu 177 * after a context switch, which imvolves a DSB, so all 178 * speculative EL1&0 walks will have already completed. 179 * If running NV, the vcpu may transition between vEL1 and 180 * vEL2 without a context switch, so make sure we complete 181 * those walks before loading a new context. 182 */ 183 if (vcpu_has_nv(vcpu)) 184 dsb(nsh); 185 186 /* 187 * Load guest EL1 and user state 188 * 189 * We must restore the 32-bit state before the sysregs, thanks 190 * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72). 191 */ 192 __sysreg32_restore_state(vcpu); 193 __sysreg_restore_user_state(guest_ctxt); 194 195 if (unlikely(__is_hyp_ctxt(guest_ctxt))) { 196 __sysreg_restore_vel2_state(vcpu); 197 } else { 198 if (vcpu_has_nv(vcpu)) { 199 /* 200 * Use the guest hypervisor's VPIDR_EL2 when in a 201 * nested state. The hardware value of MIDR_EL1 gets 202 * restored on put. 203 */ 204 write_sysreg(ctxt_sys_reg(guest_ctxt, VPIDR_EL2), vpidr_el2); 205 206 /* 207 * As we're restoring a nested guest, set the value 208 * provided by the guest hypervisor. 209 */ 210 mpidr = ctxt_sys_reg(guest_ctxt, VMPIDR_EL2); 211 } else { 212 mpidr = ctxt_sys_reg(guest_ctxt, MPIDR_EL1); 213 } 214 215 __sysreg_restore_el1_state(guest_ctxt, mpidr); 216 } 217 218 vcpu_set_flag(vcpu, SYSREGS_ON_CPU); 219 } 220 221 /** 222 * __vcpu_put_switch_sysregs - Restore host system registers to the physical CPU 223 * 224 * @vcpu: The VCPU pointer 225 * 226 * Save guest system registers that do not affect the host's execution, for 227 * example EL1 system registers on a VHE system where the host kernel 228 * runs at EL2. This function is called from KVM's vcpu_put() function 229 * and deferring saving system register state until we're no longer running the 230 * VCPU avoids having to save them on every exit from the VM. 231 */ 232 void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu) 233 { 234 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; 235 struct kvm_cpu_context *host_ctxt; 236 237 host_ctxt = host_data_ptr(host_ctxt); 238 239 if (unlikely(__is_hyp_ctxt(guest_ctxt))) 240 __sysreg_save_vel2_state(vcpu); 241 else 242 __sysreg_save_el1_state(guest_ctxt); 243 244 __sysreg_save_user_state(guest_ctxt); 245 __sysreg32_save_state(vcpu); 246 247 /* Restore host user state */ 248 __sysreg_restore_user_state(host_ctxt); 249 250 /* If leaving a nesting guest, restore MIDR_EL1 default view */ 251 if (vcpu_has_nv(vcpu)) 252 write_sysreg(read_cpuid_id(), vpidr_el2); 253 254 vcpu_clear_flag(vcpu, SYSREGS_ON_CPU); 255 } 256