xref: /linux/arch/arm64/kvm/hyp/nvhe/host.S (revision fbf5df34a4dbcd09d433dd4f0916bf9b2ddb16de)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2020 - Google Inc
4 * Author: Andrew Scull <ascull@google.com>
5 */
6
7#include <linux/linkage.h>
8
9#include <asm/assembler.h>
10#include <asm/kvm_arm.h>
11#include <asm/kvm_asm.h>
12#include <asm/kvm_mmu.h>
13#include <asm/kvm_ptrauth.h>
14
15	.text
16
17SYM_FUNC_START(__host_exit)
18	get_host_ctxt	x0, x1
19
20	/* Store the host regs x2 and x3 */
21	stp	x2, x3,   [x0, #CPU_XREG_OFFSET(2)]
22
23	/* Retrieve the host regs x0-x1 from the stack */
24	ldp	x2, x3, [sp], #16	// x0, x1
25
26	/* Store the host regs x0-x1 and x4-x17 */
27	stp	x2, x3,   [x0, #CPU_XREG_OFFSET(0)]
28	stp	x4, x5,   [x0, #CPU_XREG_OFFSET(4)]
29	stp	x6, x7,   [x0, #CPU_XREG_OFFSET(6)]
30	stp	x8, x9,   [x0, #CPU_XREG_OFFSET(8)]
31	stp	x10, x11, [x0, #CPU_XREG_OFFSET(10)]
32	stp	x12, x13, [x0, #CPU_XREG_OFFSET(12)]
33	stp	x14, x15, [x0, #CPU_XREG_OFFSET(14)]
34	stp	x16, x17, [x0, #CPU_XREG_OFFSET(16)]
35
36	/* Store the host regs x18-x29, lr */
37	save_callee_saved_regs x0
38
39	/* Save the host context pointer in x29 across the function call */
40	mov	x29, x0
41
42#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
43alternative_if_not ARM64_HAS_ADDRESS_AUTH
44b __skip_pauth_save
45alternative_else_nop_endif
46
47alternative_if ARM64_KVM_PROTECTED_MODE
48	/* Save kernel ptrauth keys. */
49	add x18, x29, #CPU_APIAKEYLO_EL1
50	ptrauth_save_state x18, x19, x20
51
52	/* Use hyp keys. */
53	adr_this_cpu x18, kvm_hyp_ctxt, x19
54	add x18, x18, #CPU_APIAKEYLO_EL1
55	ptrauth_restore_state x18, x19, x20
56	isb
57alternative_else_nop_endif
58__skip_pauth_save:
59#endif /* CONFIG_ARM64_PTR_AUTH_KERNEL */
60
61	bl	handle_trap
62
63__host_enter_restore_full:
64	/* Restore kernel keys. */
65#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
66alternative_if_not ARM64_HAS_ADDRESS_AUTH
67b __skip_pauth_restore
68alternative_else_nop_endif
69
70alternative_if ARM64_KVM_PROTECTED_MODE
71	add x18, x29, #CPU_APIAKEYLO_EL1
72	ptrauth_restore_state x18, x19, x20
73alternative_else_nop_endif
74__skip_pauth_restore:
75#endif /* CONFIG_ARM64_PTR_AUTH_KERNEL */
76
77	/* Restore host regs x0-x17 */
78	ldp	x0, x1,   [x29, #CPU_XREG_OFFSET(0)]
79	ldp	x2, x3,   [x29, #CPU_XREG_OFFSET(2)]
80	ldp	x4, x5,   [x29, #CPU_XREG_OFFSET(4)]
81	ldp	x6, x7,   [x29, #CPU_XREG_OFFSET(6)]
82
83	/* x0-7 are use for panic arguments */
84__host_enter_for_panic:
85	ldp	x8, x9,   [x29, #CPU_XREG_OFFSET(8)]
86	ldp	x10, x11, [x29, #CPU_XREG_OFFSET(10)]
87	ldp	x12, x13, [x29, #CPU_XREG_OFFSET(12)]
88	ldp	x14, x15, [x29, #CPU_XREG_OFFSET(14)]
89	ldp	x16, x17, [x29, #CPU_XREG_OFFSET(16)]
90
91	/* Restore host regs x18-x29, lr */
92	restore_callee_saved_regs x29
93
94	/* Do not touch any register after this! */
95__host_enter_without_restoring:
96	eret
97	sb
98SYM_FUNC_END(__host_exit)
99
100/*
101 * void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
102 */
103SYM_FUNC_START(__host_enter)
104	mov	x29, x0
105	b	__host_enter_restore_full
106SYM_FUNC_END(__host_enter)
107
108/*
109 * void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
110 * 				  u64 elr, u64 par);
111 */
112SYM_FUNC_START(__hyp_do_panic)
113	/* Prepare and exit to the host's panic function. */
114	mov	lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
115		      PSR_MODE_EL1h)
116	msr	spsr_el2, lr
117	adr_l	lr, nvhe_hyp_panic_handler
118	hyp_kimg_va lr, x6
119	msr	elr_el2, lr
120
121	mov	x29, x0
122
123#ifdef PKVM_DISABLE_STAGE2_ON_PANIC
124	/* Ensure host stage-2 is disabled */
125	mrs	x0, hcr_el2
126	bic	x0, x0, #HCR_VM
127	msr_hcr_el2 x0
128	tlbi	vmalls12e1
129	dsb	nsh
130#endif
131
132	/* Load the panic arguments into x0-7 */
133	mrs	x0, esr_el2
134	mov	x4, x3
135	mov	x3, x2
136	hyp_pa	x3, x6
137	get_vcpu_ptr x5, x6
138	mrs	x6, far_el2
139	mrs	x7, hpfar_el2
140
141	/* Enter the host, conditionally restoring the host context. */
142	cbz	x29, __host_enter_without_restoring
143	b	__host_enter_for_panic
144SYM_FUNC_END(__hyp_do_panic)
145
146SYM_FUNC_START(__host_hvc)
147	ldp	x0, x1, [sp]		// Don't fixup the stack yet
148
149	/* No stub for you, sonny Jim */
150alternative_if ARM64_KVM_PROTECTED_MODE
151	b	__host_exit
152alternative_else_nop_endif
153
154	/* Check for a stub HVC call */
155	cmp	x0, #HVC_STUB_HCALL_NR
156	b.hs	__host_exit
157
158	add	sp, sp, #16
159	/*
160	 * Compute the idmap address of __kvm_handle_stub_hvc and
161	 * jump there.
162	 *
163	 * Preserve x0-x4, which may contain stub parameters.
164	 */
165	adr_l	x5, __kvm_handle_stub_hvc
166	hyp_pa	x5, x6
167	br	x5
168SYM_FUNC_END(__host_hvc)
169
170.macro host_el1_sync_vect
171	.align 7
172.L__vect_start\@:
173	stp	x0, x1, [sp, #-16]!
174	mrs	x0, esr_el2
175	ubfx	x0, x0, #ESR_ELx_EC_SHIFT, #ESR_ELx_EC_WIDTH
176	cmp	x0, #ESR_ELx_EC_HVC64
177	b.eq	__host_hvc
178	b	__host_exit
179.L__vect_end\@:
180.if ((.L__vect_end\@ - .L__vect_start\@) > 0x80)
181	.error "host_el1_sync_vect larger than vector entry"
182.endif
183.endm
184
185.macro invalid_host_el2_vect
186	.align 7
187
188	/*
189	 * Test whether the SP has overflowed, without corrupting a GPR.
190	 * nVHE hypervisor stacks are aligned so that the NVHE_STACK_SHIFT bit
191	 * of SP should always be 1.
192	 */
193	add	sp, sp, x0			// sp' = sp + x0
194	sub	x0, sp, x0			// x0' = sp' - x0 = (sp + x0) - x0 = sp
195	tbz	x0, #NVHE_STACK_SHIFT, .L__hyp_sp_overflow\@
196	sub	x0, sp, x0			// x0'' = sp' - x0' = (sp + x0) - sp = x0
197	sub	sp, sp, x0			// sp'' = sp' - x0 = (sp + x0) - x0 = sp
198
199	/*
200	 * The panic may not be clean if the exception is taken before the host
201	 * context has been saved by __host_exit or after the hyp context has
202	 * been partially clobbered by __host_enter.
203	 */
204	b	hyp_panic
205
206.L__hyp_sp_overflow\@:
207	/* Switch to the overflow stack */
208	adr_this_cpu sp, overflow_stack + OVERFLOW_STACK_SIZE, x0
209
210	b	hyp_panic_bad_stack
211	ASM_BUG()
212.endm
213
214.macro invalid_host_el1_vect
215	.align 7
216	mov	x0, xzr		/* restore_host = false */
217	mrs	x1, spsr_el2
218	mrs	x2, elr_el2
219	mrs	x3, par_el1
220	b	__hyp_do_panic
221.endm
222
223/*
224 * The host vector does not use an ESB instruction in order to avoid consuming
225 * SErrors that should only be consumed by the host. Guest entry is deferred by
226 * __guest_enter if there are any pending asynchronous exceptions so hyp will
227 * always return to the host without having consumerd host SErrors.
228 *
229 * CONFIG_KVM_INDIRECT_VECTORS is not applied to the host vectors because the
230 * host knows about the EL2 vectors already, and there is no point in hiding
231 * them.
232 */
233	.align 11
234SYM_CODE_START(__kvm_hyp_host_vector)
235	invalid_host_el2_vect			// Synchronous EL2t
236	invalid_host_el2_vect			// IRQ EL2t
237	invalid_host_el2_vect			// FIQ EL2t
238	invalid_host_el2_vect			// Error EL2t
239
240	invalid_host_el2_vect			// Synchronous EL2h
241	invalid_host_el2_vect			// IRQ EL2h
242	invalid_host_el2_vect			// FIQ EL2h
243	invalid_host_el2_vect			// Error EL2h
244
245	host_el1_sync_vect			// Synchronous 64-bit EL1/EL0
246	invalid_host_el1_vect			// IRQ 64-bit EL1/EL0
247	invalid_host_el1_vect			// FIQ 64-bit EL1/EL0
248	invalid_host_el1_vect			// Error 64-bit EL1/EL0
249
250	host_el1_sync_vect			// Synchronous 32-bit EL1/EL0
251	invalid_host_el1_vect			// IRQ 32-bit EL1/EL0
252	invalid_host_el1_vect			// FIQ 32-bit EL1/EL0
253	invalid_host_el1_vect			// Error 32-bit EL1/EL0
254SYM_CODE_END(__kvm_hyp_host_vector)
255
256/*
257 * Forward SMC with arguments in struct kvm_cpu_context, and
258 * store the result into the same struct. Assumes SMCCC 1.2 or older.
259 *
260 * x0: struct kvm_cpu_context*
261 */
262SYM_CODE_START(__kvm_hyp_host_forward_smc)
263	/*
264	 * Use x18 to keep the pointer to the host context because
265	 * x18 is callee-saved in SMCCC but not in AAPCS64.
266	 */
267	mov	x18, x0
268
269	ldp	x0, x1,   [x18, #CPU_XREG_OFFSET(0)]
270	ldp	x2, x3,   [x18, #CPU_XREG_OFFSET(2)]
271	ldp	x4, x5,   [x18, #CPU_XREG_OFFSET(4)]
272	ldp	x6, x7,   [x18, #CPU_XREG_OFFSET(6)]
273	ldp	x8, x9,   [x18, #CPU_XREG_OFFSET(8)]
274	ldp	x10, x11, [x18, #CPU_XREG_OFFSET(10)]
275	ldp	x12, x13, [x18, #CPU_XREG_OFFSET(12)]
276	ldp	x14, x15, [x18, #CPU_XREG_OFFSET(14)]
277	ldp	x16, x17, [x18, #CPU_XREG_OFFSET(16)]
278
279	smc	#0
280
281	stp	x0, x1,   [x18, #CPU_XREG_OFFSET(0)]
282	stp	x2, x3,   [x18, #CPU_XREG_OFFSET(2)]
283	stp	x4, x5,   [x18, #CPU_XREG_OFFSET(4)]
284	stp	x6, x7,   [x18, #CPU_XREG_OFFSET(6)]
285	stp	x8, x9,   [x18, #CPU_XREG_OFFSET(8)]
286	stp	x10, x11, [x18, #CPU_XREG_OFFSET(10)]
287	stp	x12, x13, [x18, #CPU_XREG_OFFSET(12)]
288	stp	x14, x15, [x18, #CPU_XREG_OFFSET(14)]
289	stp	x16, x17, [x18, #CPU_XREG_OFFSET(16)]
290
291	ret
292SYM_CODE_END(__kvm_hyp_host_forward_smc)
293