1d460df12SQuentin Perret/* SPDX-License-Identifier: GPL-2.0-only */ 2d460df12SQuentin Perret/* 3d460df12SQuentin Perret * Code copied from arch/arm64/mm/cache.S. 4d460df12SQuentin Perret */ 5d460df12SQuentin Perret 6d460df12SQuentin Perret#include <linux/linkage.h> 7d460df12SQuentin Perret#include <asm/assembler.h> 8d460df12SQuentin Perret#include <asm/alternative.h> 9d460df12SQuentin Perret 100f61f6beSMark RutlandSYM_FUNC_START(__pi_dcache_clean_inval_poc) 11d460df12SQuentin Perret dcache_by_line_op civac, sy, x0, x1, x2, x3 12d460df12SQuentin Perret ret 130f61f6beSMark RutlandSYM_FUNC_END(__pi_dcache_clean_inval_poc) 140f61f6beSMark RutlandSYM_FUNC_ALIAS(dcache_clean_inval_poc, __pi_dcache_clean_inval_poc) 15*13e248aaSWill Deacon 16*13e248aaSWill DeaconSYM_FUNC_START(__pi_icache_inval_pou) 17*13e248aaSWill Deaconalternative_if ARM64_HAS_CACHE_DIC 18*13e248aaSWill Deacon isb 19*13e248aaSWill Deacon ret 20*13e248aaSWill Deaconalternative_else_nop_endif 21*13e248aaSWill Deacon 22*13e248aaSWill Deacon invalidate_icache_by_line x0, x1, x2, x3 23*13e248aaSWill Deacon ret 24*13e248aaSWill DeaconSYM_FUNC_END(__pi_icache_inval_pou) 25*13e248aaSWill DeaconSYM_FUNC_ALIAS(icache_inval_pou, __pi_icache_inval_pou) 26