1/* 2 * Copyright (C) 2015 - ARM Ltd 3 * Author: Marc Zyngier <marc.zyngier@arm.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18#include <linux/linkage.h> 19 20#include <asm/asm-offsets.h> 21#include <asm/assembler.h> 22#include <asm/fpsimdmacros.h> 23#include <asm/kvm.h> 24#include <asm/kvm_arm.h> 25#include <asm/kvm_asm.h> 26#include <asm/kvm_mmu.h> 27 28#define CPU_GP_REG_OFFSET(x) (CPU_GP_REGS + x) 29#define CPU_XREG_OFFSET(x) CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x) 30 31 .text 32 .pushsection .hyp.text, "ax" 33 34.macro save_callee_saved_regs ctxt 35 stp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)] 36 stp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)] 37 stp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)] 38 stp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)] 39 stp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)] 40 stp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] 41.endm 42 43.macro restore_callee_saved_regs ctxt 44 ldp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)] 45 ldp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)] 46 ldp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)] 47 ldp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)] 48 ldp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)] 49 ldp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] 50.endm 51 52/* 53 * u64 __guest_enter(struct kvm_vcpu *vcpu, 54 * struct kvm_cpu_context *host_ctxt); 55 */ 56ENTRY(__guest_enter) 57 // x0: vcpu 58 // x1: host context 59 // x2-x17: clobbered by macros 60 // x18: guest context 61 62 // Store the host regs 63 save_callee_saved_regs x1 64 65 // Store the host_ctxt for use at exit time 66 str x1, [sp, #-16]! 67 68 add x18, x0, #VCPU_CONTEXT 69 70 // Restore guest regs x0-x17 71 ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)] 72 ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)] 73 ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)] 74 ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)] 75 ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)] 76 ldp x10, x11, [x18, #CPU_XREG_OFFSET(10)] 77 ldp x12, x13, [x18, #CPU_XREG_OFFSET(12)] 78 ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)] 79 ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)] 80 81 // Restore guest regs x19-x29, lr 82 restore_callee_saved_regs x18 83 84 // Restore guest reg x18 85 ldr x18, [x18, #CPU_XREG_OFFSET(18)] 86 87 // Do not touch any register after this! 88 eret 89ENDPROC(__guest_enter) 90 91ENTRY(__guest_exit) 92 // x0: return code 93 // x1: vcpu 94 // x2-x29,lr: vcpu regs 95 // vcpu x0-x1 on the stack 96 97 add x1, x1, #VCPU_CONTEXT 98 99 ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN) 100 101 // Store the guest regs x2 and x3 102 stp x2, x3, [x1, #CPU_XREG_OFFSET(2)] 103 104 // Retrieve the guest regs x0-x1 from the stack 105 ldp x2, x3, [sp], #16 // x0, x1 106 107 // Store the guest regs x0-x1 and x4-x18 108 stp x2, x3, [x1, #CPU_XREG_OFFSET(0)] 109 stp x4, x5, [x1, #CPU_XREG_OFFSET(4)] 110 stp x6, x7, [x1, #CPU_XREG_OFFSET(6)] 111 stp x8, x9, [x1, #CPU_XREG_OFFSET(8)] 112 stp x10, x11, [x1, #CPU_XREG_OFFSET(10)] 113 stp x12, x13, [x1, #CPU_XREG_OFFSET(12)] 114 stp x14, x15, [x1, #CPU_XREG_OFFSET(14)] 115 stp x16, x17, [x1, #CPU_XREG_OFFSET(16)] 116 str x18, [x1, #CPU_XREG_OFFSET(18)] 117 118 // Store the guest regs x19-x29, lr 119 save_callee_saved_regs x1 120 121 // Restore the host_ctxt from the stack 122 ldr x2, [sp], #16 123 124 // Now restore the host regs 125 restore_callee_saved_regs x2 126 127 // If we have a pending asynchronous abort, now is the 128 // time to find out. From your VAXorcist book, page 666: 129 // "Threaten me not, oh Evil one! For I speak with 130 // the power of DEC, and I command thee to show thyself!" 131 mrs x2, elr_el2 132 mrs x3, esr_el2 133 mrs x4, spsr_el2 134 mov x5, x0 135 136 dsb sy // Synchronize against in-flight ld/st 137 msr daifclr, #4 // Unmask aborts 138 139 // This is our single instruction exception window. A pending 140 // SError is guaranteed to occur at the earliest when we unmask 141 // it, and at the latest just after the ISB. 142 .global abort_guest_exit_start 143abort_guest_exit_start: 144 145 isb 146 147 .global abort_guest_exit_end 148abort_guest_exit_end: 149 150 // If the exception took place, restore the EL1 exception 151 // context so that we can report some information. 152 // Merge the exception code with the SError pending bit. 153 tbz x0, #ARM_EXIT_WITH_SERROR_BIT, 1f 154 msr elr_el2, x2 155 msr esr_el2, x3 156 msr spsr_el2, x4 157 orr x0, x0, x5 1581: ret 159ENDPROC(__guest_exit) 160 161ENTRY(__fpsimd_guest_restore) 162 stp x2, x3, [sp, #-16]! 163 stp x4, lr, [sp, #-16]! 164 165alternative_if_not ARM64_HAS_VIRT_HOST_EXTN 166 mrs x2, cptr_el2 167 bic x2, x2, #CPTR_EL2_TFP 168 msr cptr_el2, x2 169alternative_else 170 mrs x2, cpacr_el1 171 orr x2, x2, #CPACR_EL1_FPEN 172 msr cpacr_el1, x2 173alternative_endif 174 isb 175 176 mrs x3, tpidr_el2 177 178 ldr x0, [x3, #VCPU_HOST_CONTEXT] 179 kern_hyp_va x0 180 add x0, x0, #CPU_GP_REG_OFFSET(CPU_FP_REGS) 181 bl __fpsimd_save_state 182 183 add x2, x3, #VCPU_CONTEXT 184 add x0, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS) 185 bl __fpsimd_restore_state 186 187 // Skip restoring fpexc32 for AArch64 guests 188 mrs x1, hcr_el2 189 tbnz x1, #HCR_RW_SHIFT, 1f 190 ldr x4, [x3, #VCPU_FPEXC32_EL2] 191 msr fpexc32_el2, x4 1921: 193 ldp x4, lr, [sp], #16 194 ldp x2, x3, [sp], #16 195 ldp x0, x1, [sp], #16 196 197 eret 198ENDPROC(__fpsimd_guest_restore) 199