1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * arch/arm64/kvm/fpsimd.c: Guest/host FPSIMD context coordination helpers 4 * 5 * Copyright 2018 Arm Limited 6 * Author: Dave Martin <Dave.Martin@arm.com> 7 */ 8 #include <linux/irqflags.h> 9 #include <linux/sched.h> 10 #include <linux/kvm_host.h> 11 #include <asm/fpsimd.h> 12 #include <asm/kvm_asm.h> 13 #include <asm/kvm_hyp.h> 14 #include <asm/kvm_mmu.h> 15 #include <asm/sysreg.h> 16 17 /* 18 * Called on entry to KVM_RUN unless this vcpu previously ran at least 19 * once and the most recent prior KVM_RUN for this vcpu was called from 20 * the same task as current (highly likely). 21 * 22 * This is guaranteed to execute before kvm_arch_vcpu_load_fp(vcpu), 23 * such that on entering hyp the relevant parts of current are already 24 * mapped. 25 */ 26 int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu) 27 { 28 struct user_fpsimd_state *fpsimd = ¤t->thread.uw.fpsimd_state; 29 int ret; 30 31 /* pKVM has its own tracking of the host fpsimd state. */ 32 if (is_protected_kvm_enabled()) 33 return 0; 34 35 /* Make sure the host task fpsimd state is visible to hyp: */ 36 ret = kvm_share_hyp(fpsimd, fpsimd + 1); 37 if (ret) 38 return ret; 39 40 return 0; 41 } 42 43 /* 44 * Prepare vcpu for saving the host's FPSIMD state and loading the guest's. 45 * The actual loading is done by the FPSIMD access trap taken to hyp. 46 * 47 * Here, we just set the correct metadata to indicate that the FPSIMD 48 * state in the cpu regs (if any) belongs to current on the host. 49 */ 50 void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) 51 { 52 BUG_ON(!current->mm); 53 54 if (!system_supports_fpsimd()) 55 return; 56 57 fpsimd_kvm_prepare(); 58 59 /* 60 * We will check TIF_FOREIGN_FPSTATE just before entering the 61 * guest in kvm_arch_vcpu_ctxflush_fp() and override this to 62 * FP_STATE_FREE if the flag set. 63 */ 64 *host_data_ptr(fp_owner) = FP_STATE_HOST_OWNED; 65 *host_data_ptr(fpsimd_state) = kern_hyp_va(¤t->thread.uw.fpsimd_state); 66 67 vcpu_clear_flag(vcpu, HOST_SVE_ENABLED); 68 if (read_sysreg(cpacr_el1) & CPACR_EL1_ZEN_EL0EN) 69 vcpu_set_flag(vcpu, HOST_SVE_ENABLED); 70 71 if (system_supports_sme()) { 72 vcpu_clear_flag(vcpu, HOST_SME_ENABLED); 73 if (read_sysreg(cpacr_el1) & CPACR_EL1_SMEN_EL0EN) 74 vcpu_set_flag(vcpu, HOST_SME_ENABLED); 75 76 /* 77 * If PSTATE.SM is enabled then save any pending FP 78 * state and disable PSTATE.SM. If we leave PSTATE.SM 79 * enabled and the guest does not enable SME via 80 * CPACR_EL1.SMEN then operations that should be valid 81 * may generate SME traps from EL1 to EL1 which we 82 * can't intercept and which would confuse the guest. 83 * 84 * Do the same for PSTATE.ZA in the case where there 85 * is state in the registers which has not already 86 * been saved, this is very unlikely to happen. 87 */ 88 if (read_sysreg_s(SYS_SVCR) & (SVCR_SM_MASK | SVCR_ZA_MASK)) { 89 *host_data_ptr(fp_owner) = FP_STATE_FREE; 90 fpsimd_save_and_flush_cpu_state(); 91 } 92 } 93 } 94 95 /* 96 * Called just before entering the guest once we are no longer preemptible 97 * and interrupts are disabled. If we have managed to run anything using 98 * FP while we were preemptible (such as off the back of an interrupt), 99 * then neither the host nor the guest own the FP hardware (and it was the 100 * responsibility of the code that used FP to save the existing state). 101 */ 102 void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu) 103 { 104 if (test_thread_flag(TIF_FOREIGN_FPSTATE)) 105 *host_data_ptr(fp_owner) = FP_STATE_FREE; 106 } 107 108 /* 109 * Called just after exiting the guest. If the guest FPSIMD state 110 * was loaded, update the host's context tracking data mark the CPU 111 * FPSIMD regs as dirty and belonging to vcpu so that they will be 112 * written back if the kernel clobbers them due to kernel-mode NEON 113 * before re-entry into the guest. 114 */ 115 void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) 116 { 117 struct cpu_fp_state fp_state; 118 119 WARN_ON_ONCE(!irqs_disabled()); 120 121 if (guest_owns_fp_regs()) { 122 /* 123 * Currently we do not support SME guests so SVCR is 124 * always 0 and we just need a variable to point to. 125 */ 126 fp_state.st = &vcpu->arch.ctxt.fp_regs; 127 fp_state.sve_state = vcpu->arch.sve_state; 128 fp_state.sve_vl = vcpu->arch.sve_max_vl; 129 fp_state.sme_state = NULL; 130 fp_state.svcr = &vcpu->arch.svcr; 131 fp_state.fpmr = &vcpu->arch.fpmr; 132 fp_state.fp_type = &vcpu->arch.fp_type; 133 134 if (vcpu_has_sve(vcpu)) 135 fp_state.to_save = FP_STATE_SVE; 136 else 137 fp_state.to_save = FP_STATE_FPSIMD; 138 139 fpsimd_bind_state_to_cpu(&fp_state); 140 141 clear_thread_flag(TIF_FOREIGN_FPSTATE); 142 } 143 } 144 145 /* 146 * Write back the vcpu FPSIMD regs if they are dirty, and invalidate the 147 * cpu FPSIMD regs so that they can't be spuriously reused if this vcpu 148 * disappears and another task or vcpu appears that recycles the same 149 * struct fpsimd_state. 150 */ 151 void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) 152 { 153 unsigned long flags; 154 155 local_irq_save(flags); 156 157 /* 158 * If we have VHE then the Hyp code will reset CPACR_EL1 to 159 * the default value and we need to reenable SME. 160 */ 161 if (has_vhe() && system_supports_sme()) { 162 /* Also restore EL0 state seen on entry */ 163 if (vcpu_get_flag(vcpu, HOST_SME_ENABLED)) 164 sysreg_clear_set(CPACR_EL1, 0, 165 CPACR_EL1_SMEN_EL0EN | 166 CPACR_EL1_SMEN_EL1EN); 167 else 168 sysreg_clear_set(CPACR_EL1, 169 CPACR_EL1_SMEN_EL0EN, 170 CPACR_EL1_SMEN_EL1EN); 171 isb(); 172 } 173 174 if (guest_owns_fp_regs()) { 175 if (vcpu_has_sve(vcpu)) { 176 __vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR); 177 178 /* 179 * Restore the VL that was saved when bound to the CPU, 180 * which is the maximum VL for the guest. Because the 181 * layout of the data when saving the sve state depends 182 * on the VL, we need to use a consistent (i.e., the 183 * maximum) VL. 184 * Note that this means that at guest exit ZCR_EL1 is 185 * not necessarily the same as on guest entry. 186 * 187 * Restoring the VL isn't needed in VHE mode since 188 * ZCR_EL2 (accessed via ZCR_EL1) would fulfill the same 189 * role when doing the save from EL2. 190 */ 191 if (!has_vhe()) 192 sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, 193 SYS_ZCR_EL1); 194 } 195 196 /* 197 * Flush (save and invalidate) the fpsimd/sve state so that if 198 * the host tries to use fpsimd/sve, it's not using stale data 199 * from the guest. 200 * 201 * Flushing the state sets the TIF_FOREIGN_FPSTATE bit for the 202 * context unconditionally, in both nVHE and VHE. This allows 203 * the kernel to restore the fpsimd/sve state, including ZCR_EL1 204 * when needed. 205 */ 206 fpsimd_save_and_flush_cpu_state(); 207 } else if (has_vhe() && system_supports_sve()) { 208 /* 209 * The FPSIMD/SVE state in the CPU has not been touched, and we 210 * have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been 211 * reset by kvm_reset_cptr_el2() in the Hyp code, disabling SVE 212 * for EL0. To avoid spurious traps, restore the trap state 213 * seen by kvm_arch_vcpu_load_fp(): 214 */ 215 if (vcpu_get_flag(vcpu, HOST_SVE_ENABLED)) 216 sysreg_clear_set(CPACR_EL1, 0, CPACR_EL1_ZEN_EL0EN); 217 else 218 sysreg_clear_set(CPACR_EL1, CPACR_EL1_ZEN_EL0EN, 0); 219 } 220 221 local_irq_restore(flags); 222 } 223