1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 4 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 5 */ 6 7 #include <linux/bug.h> 8 #include <linux/cpu_pm.h> 9 #include <linux/entry-kvm.h> 10 #include <linux/errno.h> 11 #include <linux/err.h> 12 #include <linux/kvm_host.h> 13 #include <linux/list.h> 14 #include <linux/module.h> 15 #include <linux/vmalloc.h> 16 #include <linux/fs.h> 17 #include <linux/mman.h> 18 #include <linux/sched.h> 19 #include <linux/kmemleak.h> 20 #include <linux/kvm.h> 21 #include <linux/kvm_irqfd.h> 22 #include <linux/irqbypass.h> 23 #include <linux/sched/stat.h> 24 #include <linux/psci.h> 25 #include <trace/events/kvm.h> 26 27 #define CREATE_TRACE_POINTS 28 #include "trace_arm.h" 29 30 #include <linux/uaccess.h> 31 #include <asm/ptrace.h> 32 #include <asm/mman.h> 33 #include <asm/tlbflush.h> 34 #include <asm/cacheflush.h> 35 #include <asm/cpufeature.h> 36 #include <asm/virt.h> 37 #include <asm/kvm_arm.h> 38 #include <asm/kvm_asm.h> 39 #include <asm/kvm_mmu.h> 40 #include <asm/kvm_emulate.h> 41 #include <asm/sections.h> 42 43 #include <kvm/arm_hypercalls.h> 44 #include <kvm/arm_pmu.h> 45 #include <kvm/arm_psci.h> 46 47 static enum kvm_mode kvm_mode = KVM_MODE_DEFAULT; 48 DEFINE_STATIC_KEY_FALSE(kvm_protected_mode_initialized); 49 50 DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector); 51 52 static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page); 53 unsigned long kvm_arm_hyp_percpu_base[NR_CPUS]; 54 DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); 55 56 /* The VMID used in the VTTBR */ 57 static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1); 58 static u32 kvm_next_vmid; 59 static DEFINE_SPINLOCK(kvm_vmid_lock); 60 61 static bool vgic_present; 62 63 static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled); 64 DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 65 66 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 67 { 68 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE; 69 } 70 71 int kvm_arch_hardware_setup(void *opaque) 72 { 73 return 0; 74 } 75 76 int kvm_arch_check_processor_compat(void *opaque) 77 { 78 return 0; 79 } 80 81 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 82 struct kvm_enable_cap *cap) 83 { 84 int r; 85 86 if (cap->flags) 87 return -EINVAL; 88 89 switch (cap->cap) { 90 case KVM_CAP_ARM_NISV_TO_USER: 91 r = 0; 92 kvm->arch.return_nisv_io_abort_to_user = true; 93 break; 94 case KVM_CAP_ARM_MTE: 95 mutex_lock(&kvm->lock); 96 if (!system_supports_mte() || kvm->created_vcpus) { 97 r = -EINVAL; 98 } else { 99 r = 0; 100 kvm->arch.mte_enabled = true; 101 } 102 mutex_unlock(&kvm->lock); 103 break; 104 default: 105 r = -EINVAL; 106 break; 107 } 108 109 return r; 110 } 111 112 static int kvm_arm_default_max_vcpus(void) 113 { 114 return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; 115 } 116 117 static void set_default_spectre(struct kvm *kvm) 118 { 119 /* 120 * The default is to expose CSV2 == 1 if the HW isn't affected. 121 * Although this is a per-CPU feature, we make it global because 122 * asymmetric systems are just a nuisance. 123 * 124 * Userspace can override this as long as it doesn't promise 125 * the impossible. 126 */ 127 if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 128 kvm->arch.pfr0_csv2 = 1; 129 if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) 130 kvm->arch.pfr0_csv3 = 1; 131 } 132 133 /** 134 * kvm_arch_init_vm - initializes a VM data structure 135 * @kvm: pointer to the KVM struct 136 */ 137 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 138 { 139 int ret; 140 141 ret = kvm_arm_setup_stage2(kvm, type); 142 if (ret) 143 return ret; 144 145 ret = kvm_init_stage2_mmu(kvm, &kvm->arch.mmu); 146 if (ret) 147 return ret; 148 149 ret = kvm_share_hyp(kvm, kvm + 1); 150 if (ret) 151 goto out_free_stage2_pgd; 152 153 kvm_vgic_early_init(kvm); 154 155 /* The maximum number of VCPUs is limited by the host's GIC model */ 156 kvm->arch.max_vcpus = kvm_arm_default_max_vcpus(); 157 158 set_default_spectre(kvm); 159 160 return ret; 161 out_free_stage2_pgd: 162 kvm_free_stage2_pgd(&kvm->arch.mmu); 163 return ret; 164 } 165 166 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 167 { 168 return VM_FAULT_SIGBUS; 169 } 170 171 172 /** 173 * kvm_arch_destroy_vm - destroy the VM data structure 174 * @kvm: pointer to the KVM struct 175 */ 176 void kvm_arch_destroy_vm(struct kvm *kvm) 177 { 178 bitmap_free(kvm->arch.pmu_filter); 179 180 kvm_vgic_destroy(kvm); 181 182 kvm_destroy_vcpus(kvm); 183 184 kvm_unshare_hyp(kvm, kvm + 1); 185 } 186 187 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 188 { 189 int r; 190 switch (ext) { 191 case KVM_CAP_IRQCHIP: 192 r = vgic_present; 193 break; 194 case KVM_CAP_IOEVENTFD: 195 case KVM_CAP_DEVICE_CTRL: 196 case KVM_CAP_USER_MEMORY: 197 case KVM_CAP_SYNC_MMU: 198 case KVM_CAP_DESTROY_MEMORY_REGION_WORKS: 199 case KVM_CAP_ONE_REG: 200 case KVM_CAP_ARM_PSCI: 201 case KVM_CAP_ARM_PSCI_0_2: 202 case KVM_CAP_READONLY_MEM: 203 case KVM_CAP_MP_STATE: 204 case KVM_CAP_IMMEDIATE_EXIT: 205 case KVM_CAP_VCPU_EVENTS: 206 case KVM_CAP_ARM_IRQ_LINE_LAYOUT_2: 207 case KVM_CAP_ARM_NISV_TO_USER: 208 case KVM_CAP_ARM_INJECT_EXT_DABT: 209 case KVM_CAP_SET_GUEST_DEBUG: 210 case KVM_CAP_VCPU_ATTRIBUTES: 211 case KVM_CAP_PTP_KVM: 212 r = 1; 213 break; 214 case KVM_CAP_SET_GUEST_DEBUG2: 215 return KVM_GUESTDBG_VALID_MASK; 216 case KVM_CAP_ARM_SET_DEVICE_ADDR: 217 r = 1; 218 break; 219 case KVM_CAP_NR_VCPUS: 220 /* 221 * ARM64 treats KVM_CAP_NR_CPUS differently from all other 222 * architectures, as it does not always bound it to 223 * KVM_CAP_MAX_VCPUS. It should not matter much because 224 * this is just an advisory value. 225 */ 226 r = min_t(unsigned int, num_online_cpus(), 227 kvm_arm_default_max_vcpus()); 228 break; 229 case KVM_CAP_MAX_VCPUS: 230 case KVM_CAP_MAX_VCPU_ID: 231 if (kvm) 232 r = kvm->arch.max_vcpus; 233 else 234 r = kvm_arm_default_max_vcpus(); 235 break; 236 case KVM_CAP_MSI_DEVID: 237 if (!kvm) 238 r = -EINVAL; 239 else 240 r = kvm->arch.vgic.msis_require_devid; 241 break; 242 case KVM_CAP_ARM_USER_IRQ: 243 /* 244 * 1: EL1_VTIMER, EL1_PTIMER, and PMU. 245 * (bump this number if adding more devices) 246 */ 247 r = 1; 248 break; 249 case KVM_CAP_ARM_MTE: 250 r = system_supports_mte(); 251 break; 252 case KVM_CAP_STEAL_TIME: 253 r = kvm_arm_pvtime_supported(); 254 break; 255 case KVM_CAP_ARM_EL1_32BIT: 256 r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1); 257 break; 258 case KVM_CAP_GUEST_DEBUG_HW_BPS: 259 r = get_num_brps(); 260 break; 261 case KVM_CAP_GUEST_DEBUG_HW_WPS: 262 r = get_num_wrps(); 263 break; 264 case KVM_CAP_ARM_PMU_V3: 265 r = kvm_arm_support_pmu_v3(); 266 break; 267 case KVM_CAP_ARM_INJECT_SERROR_ESR: 268 r = cpus_have_const_cap(ARM64_HAS_RAS_EXTN); 269 break; 270 case KVM_CAP_ARM_VM_IPA_SIZE: 271 r = get_kvm_ipa_limit(); 272 break; 273 case KVM_CAP_ARM_SVE: 274 r = system_supports_sve(); 275 break; 276 case KVM_CAP_ARM_PTRAUTH_ADDRESS: 277 case KVM_CAP_ARM_PTRAUTH_GENERIC: 278 r = system_has_full_ptr_auth(); 279 break; 280 default: 281 r = 0; 282 } 283 284 return r; 285 } 286 287 long kvm_arch_dev_ioctl(struct file *filp, 288 unsigned int ioctl, unsigned long arg) 289 { 290 return -EINVAL; 291 } 292 293 struct kvm *kvm_arch_alloc_vm(void) 294 { 295 size_t sz = sizeof(struct kvm); 296 297 if (!has_vhe()) 298 return kzalloc(sz, GFP_KERNEL_ACCOUNT); 299 300 return __vmalloc(sz, GFP_KERNEL_ACCOUNT | __GFP_HIGHMEM | __GFP_ZERO); 301 } 302 303 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 304 { 305 if (irqchip_in_kernel(kvm) && vgic_initialized(kvm)) 306 return -EBUSY; 307 308 if (id >= kvm->arch.max_vcpus) 309 return -EINVAL; 310 311 return 0; 312 } 313 314 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 315 { 316 int err; 317 318 /* Force users to call KVM_ARM_VCPU_INIT */ 319 vcpu->arch.target = -1; 320 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 321 322 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; 323 324 /* Set up the timer */ 325 kvm_timer_vcpu_init(vcpu); 326 327 kvm_pmu_vcpu_init(vcpu); 328 329 kvm_arm_reset_debug_ptr(vcpu); 330 331 kvm_arm_pvtime_vcpu_init(&vcpu->arch); 332 333 vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; 334 335 err = kvm_vgic_vcpu_init(vcpu); 336 if (err) 337 return err; 338 339 return kvm_share_hyp(vcpu, vcpu + 1); 340 } 341 342 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 343 { 344 } 345 346 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 347 { 348 if (vcpu_has_run_once(vcpu) && unlikely(!irqchip_in_kernel(vcpu->kvm))) 349 static_branch_dec(&userspace_irqchip_in_use); 350 351 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); 352 kvm_timer_vcpu_terminate(vcpu); 353 kvm_pmu_vcpu_destroy(vcpu); 354 355 kvm_arm_vcpu_destroy(vcpu); 356 } 357 358 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 359 { 360 return kvm_timer_is_pending(vcpu); 361 } 362 363 void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 364 { 365 366 } 367 368 void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 369 { 370 371 } 372 373 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 374 { 375 struct kvm_s2_mmu *mmu; 376 int *last_ran; 377 378 mmu = vcpu->arch.hw_mmu; 379 last_ran = this_cpu_ptr(mmu->last_vcpu_ran); 380 381 /* 382 * We guarantee that both TLBs and I-cache are private to each 383 * vcpu. If detecting that a vcpu from the same VM has 384 * previously run on the same physical CPU, call into the 385 * hypervisor code to nuke the relevant contexts. 386 * 387 * We might get preempted before the vCPU actually runs, but 388 * over-invalidation doesn't affect correctness. 389 */ 390 if (*last_ran != vcpu->vcpu_id) { 391 kvm_call_hyp(__kvm_flush_cpu_context, mmu); 392 *last_ran = vcpu->vcpu_id; 393 } 394 395 vcpu->cpu = cpu; 396 397 kvm_vgic_load(vcpu); 398 kvm_timer_vcpu_load(vcpu); 399 if (has_vhe()) 400 kvm_vcpu_load_sysregs_vhe(vcpu); 401 kvm_arch_vcpu_load_fp(vcpu); 402 kvm_vcpu_pmu_restore_guest(vcpu); 403 if (kvm_arm_is_pvtime_enabled(&vcpu->arch)) 404 kvm_make_request(KVM_REQ_RECORD_STEAL, vcpu); 405 406 if (single_task_running()) 407 vcpu_clear_wfx_traps(vcpu); 408 else 409 vcpu_set_wfx_traps(vcpu); 410 411 if (vcpu_has_ptrauth(vcpu)) 412 vcpu_ptrauth_disable(vcpu); 413 kvm_arch_vcpu_load_debug_state_flags(vcpu); 414 } 415 416 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 417 { 418 kvm_arch_vcpu_put_debug_state_flags(vcpu); 419 kvm_arch_vcpu_put_fp(vcpu); 420 if (has_vhe()) 421 kvm_vcpu_put_sysregs_vhe(vcpu); 422 kvm_timer_vcpu_put(vcpu); 423 kvm_vgic_put(vcpu); 424 kvm_vcpu_pmu_restore_host(vcpu); 425 426 vcpu->cpu = -1; 427 } 428 429 static void vcpu_power_off(struct kvm_vcpu *vcpu) 430 { 431 vcpu->arch.power_off = true; 432 kvm_make_request(KVM_REQ_SLEEP, vcpu); 433 kvm_vcpu_kick(vcpu); 434 } 435 436 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 437 struct kvm_mp_state *mp_state) 438 { 439 if (vcpu->arch.power_off) 440 mp_state->mp_state = KVM_MP_STATE_STOPPED; 441 else 442 mp_state->mp_state = KVM_MP_STATE_RUNNABLE; 443 444 return 0; 445 } 446 447 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 448 struct kvm_mp_state *mp_state) 449 { 450 int ret = 0; 451 452 switch (mp_state->mp_state) { 453 case KVM_MP_STATE_RUNNABLE: 454 vcpu->arch.power_off = false; 455 break; 456 case KVM_MP_STATE_STOPPED: 457 vcpu_power_off(vcpu); 458 break; 459 default: 460 ret = -EINVAL; 461 } 462 463 return ret; 464 } 465 466 /** 467 * kvm_arch_vcpu_runnable - determine if the vcpu can be scheduled 468 * @v: The VCPU pointer 469 * 470 * If the guest CPU is not waiting for interrupts or an interrupt line is 471 * asserted, the CPU is by definition runnable. 472 */ 473 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 474 { 475 bool irq_lines = *vcpu_hcr(v) & (HCR_VI | HCR_VF); 476 return ((irq_lines || kvm_vgic_vcpu_pending_irq(v)) 477 && !v->arch.power_off && !v->arch.pause); 478 } 479 480 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 481 { 482 return vcpu_mode_priv(vcpu); 483 } 484 485 #ifdef CONFIG_GUEST_PERF_EVENTS 486 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu) 487 { 488 return *vcpu_pc(vcpu); 489 } 490 #endif 491 492 /* Just ensure a guest exit from a particular CPU */ 493 static void exit_vm_noop(void *info) 494 { 495 } 496 497 void force_vm_exit(const cpumask_t *mask) 498 { 499 preempt_disable(); 500 smp_call_function_many(mask, exit_vm_noop, NULL, true); 501 preempt_enable(); 502 } 503 504 /** 505 * need_new_vmid_gen - check that the VMID is still valid 506 * @vmid: The VMID to check 507 * 508 * return true if there is a new generation of VMIDs being used 509 * 510 * The hardware supports a limited set of values with the value zero reserved 511 * for the host, so we check if an assigned value belongs to a previous 512 * generation, which requires us to assign a new value. If we're the first to 513 * use a VMID for the new generation, we must flush necessary caches and TLBs 514 * on all CPUs. 515 */ 516 static bool need_new_vmid_gen(struct kvm_vmid *vmid) 517 { 518 u64 current_vmid_gen = atomic64_read(&kvm_vmid_gen); 519 smp_rmb(); /* Orders read of kvm_vmid_gen and kvm->arch.vmid */ 520 return unlikely(READ_ONCE(vmid->vmid_gen) != current_vmid_gen); 521 } 522 523 /** 524 * update_vmid - Update the vmid with a valid VMID for the current generation 525 * @vmid: The stage-2 VMID information struct 526 */ 527 static void update_vmid(struct kvm_vmid *vmid) 528 { 529 if (!need_new_vmid_gen(vmid)) 530 return; 531 532 spin_lock(&kvm_vmid_lock); 533 534 /* 535 * We need to re-check the vmid_gen here to ensure that if another vcpu 536 * already allocated a valid vmid for this vm, then this vcpu should 537 * use the same vmid. 538 */ 539 if (!need_new_vmid_gen(vmid)) { 540 spin_unlock(&kvm_vmid_lock); 541 return; 542 } 543 544 /* First user of a new VMID generation? */ 545 if (unlikely(kvm_next_vmid == 0)) { 546 atomic64_inc(&kvm_vmid_gen); 547 kvm_next_vmid = 1; 548 549 /* 550 * On SMP we know no other CPUs can use this CPU's or each 551 * other's VMID after force_vm_exit returns since the 552 * kvm_vmid_lock blocks them from reentry to the guest. 553 */ 554 force_vm_exit(cpu_all_mask); 555 /* 556 * Now broadcast TLB + ICACHE invalidation over the inner 557 * shareable domain to make sure all data structures are 558 * clean. 559 */ 560 kvm_call_hyp(__kvm_flush_vm_context); 561 } 562 563 WRITE_ONCE(vmid->vmid, kvm_next_vmid); 564 kvm_next_vmid++; 565 kvm_next_vmid &= (1 << kvm_get_vmid_bits()) - 1; 566 567 smp_wmb(); 568 WRITE_ONCE(vmid->vmid_gen, atomic64_read(&kvm_vmid_gen)); 569 570 spin_unlock(&kvm_vmid_lock); 571 } 572 573 static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) 574 { 575 return vcpu->arch.target >= 0; 576 } 577 578 /* 579 * Handle both the initialisation that is being done when the vcpu is 580 * run for the first time, as well as the updates that must be 581 * performed each time we get a new thread dealing with this vcpu. 582 */ 583 int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu) 584 { 585 struct kvm *kvm = vcpu->kvm; 586 int ret; 587 588 if (!kvm_vcpu_initialized(vcpu)) 589 return -ENOEXEC; 590 591 if (!kvm_arm_vcpu_is_finalized(vcpu)) 592 return -EPERM; 593 594 ret = kvm_arch_vcpu_run_map_fp(vcpu); 595 if (ret) 596 return ret; 597 598 if (likely(vcpu_has_run_once(vcpu))) 599 return 0; 600 601 kvm_arm_vcpu_init_debug(vcpu); 602 603 if (likely(irqchip_in_kernel(kvm))) { 604 /* 605 * Map the VGIC hardware resources before running a vcpu the 606 * first time on this VM. 607 */ 608 ret = kvm_vgic_map_resources(kvm); 609 if (ret) 610 return ret; 611 } 612 613 ret = kvm_timer_enable(vcpu); 614 if (ret) 615 return ret; 616 617 ret = kvm_arm_pmu_v3_enable(vcpu); 618 if (ret) 619 return ret; 620 621 if (!irqchip_in_kernel(kvm)) { 622 /* 623 * Tell the rest of the code that there are userspace irqchip 624 * VMs in the wild. 625 */ 626 static_branch_inc(&userspace_irqchip_in_use); 627 } 628 629 /* 630 * Initialize traps for protected VMs. 631 * NOTE: Move to run in EL2 directly, rather than via a hypercall, once 632 * the code is in place for first run initialization at EL2. 633 */ 634 if (kvm_vm_is_protected(kvm)) 635 kvm_call_hyp_nvhe(__pkvm_vcpu_init_traps, vcpu); 636 637 return ret; 638 } 639 640 bool kvm_arch_intc_initialized(struct kvm *kvm) 641 { 642 return vgic_initialized(kvm); 643 } 644 645 void kvm_arm_halt_guest(struct kvm *kvm) 646 { 647 unsigned long i; 648 struct kvm_vcpu *vcpu; 649 650 kvm_for_each_vcpu(i, vcpu, kvm) 651 vcpu->arch.pause = true; 652 kvm_make_all_cpus_request(kvm, KVM_REQ_SLEEP); 653 } 654 655 void kvm_arm_resume_guest(struct kvm *kvm) 656 { 657 unsigned long i; 658 struct kvm_vcpu *vcpu; 659 660 kvm_for_each_vcpu(i, vcpu, kvm) { 661 vcpu->arch.pause = false; 662 __kvm_vcpu_wake_up(vcpu); 663 } 664 } 665 666 static void vcpu_req_sleep(struct kvm_vcpu *vcpu) 667 { 668 struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu); 669 670 rcuwait_wait_event(wait, 671 (!vcpu->arch.power_off) &&(!vcpu->arch.pause), 672 TASK_INTERRUPTIBLE); 673 674 if (vcpu->arch.power_off || vcpu->arch.pause) { 675 /* Awaken to handle a signal, request we sleep again later. */ 676 kvm_make_request(KVM_REQ_SLEEP, vcpu); 677 } 678 679 /* 680 * Make sure we will observe a potential reset request if we've 681 * observed a change to the power state. Pairs with the smp_wmb() in 682 * kvm_psci_vcpu_on(). 683 */ 684 smp_rmb(); 685 } 686 687 /** 688 * kvm_vcpu_wfi - emulate Wait-For-Interrupt behavior 689 * @vcpu: The VCPU pointer 690 * 691 * Suspend execution of a vCPU until a valid wake event is detected, i.e. until 692 * the vCPU is runnable. The vCPU may or may not be scheduled out, depending 693 * on when a wake event arrives, e.g. there may already be a pending wake event. 694 */ 695 void kvm_vcpu_wfi(struct kvm_vcpu *vcpu) 696 { 697 /* 698 * Sync back the state of the GIC CPU interface so that we have 699 * the latest PMR and group enables. This ensures that 700 * kvm_arch_vcpu_runnable has up-to-date data to decide whether 701 * we have pending interrupts, e.g. when determining if the 702 * vCPU should block. 703 * 704 * For the same reason, we want to tell GICv4 that we need 705 * doorbells to be signalled, should an interrupt become pending. 706 */ 707 preempt_disable(); 708 kvm_vgic_vmcr_sync(vcpu); 709 vgic_v4_put(vcpu, true); 710 preempt_enable(); 711 712 kvm_vcpu_halt(vcpu); 713 kvm_clear_request(KVM_REQ_UNHALT, vcpu); 714 715 preempt_disable(); 716 vgic_v4_load(vcpu); 717 preempt_enable(); 718 } 719 720 static void check_vcpu_requests(struct kvm_vcpu *vcpu) 721 { 722 if (kvm_request_pending(vcpu)) { 723 if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) 724 vcpu_req_sleep(vcpu); 725 726 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 727 kvm_reset_vcpu(vcpu); 728 729 /* 730 * Clear IRQ_PENDING requests that were made to guarantee 731 * that a VCPU sees new virtual interrupts. 732 */ 733 kvm_check_request(KVM_REQ_IRQ_PENDING, vcpu); 734 735 if (kvm_check_request(KVM_REQ_RECORD_STEAL, vcpu)) 736 kvm_update_stolen_time(vcpu); 737 738 if (kvm_check_request(KVM_REQ_RELOAD_GICv4, vcpu)) { 739 /* The distributor enable bits were changed */ 740 preempt_disable(); 741 vgic_v4_put(vcpu, false); 742 vgic_v4_load(vcpu); 743 preempt_enable(); 744 } 745 746 if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu)) 747 kvm_pmu_handle_pmcr(vcpu, 748 __vcpu_sys_reg(vcpu, PMCR_EL0)); 749 } 750 } 751 752 static bool vcpu_mode_is_bad_32bit(struct kvm_vcpu *vcpu) 753 { 754 if (likely(!vcpu_mode_is_32bit(vcpu))) 755 return false; 756 757 return !system_supports_32bit_el0() || 758 static_branch_unlikely(&arm64_mismatched_32bit_el0); 759 } 760 761 /** 762 * kvm_vcpu_exit_request - returns true if the VCPU should *not* enter the guest 763 * @vcpu: The VCPU pointer 764 * @ret: Pointer to write optional return code 765 * 766 * Returns: true if the VCPU needs to return to a preemptible + interruptible 767 * and skip guest entry. 768 * 769 * This function disambiguates between two different types of exits: exits to a 770 * preemptible + interruptible kernel context and exits to userspace. For an 771 * exit to userspace, this function will write the return code to ret and return 772 * true. For an exit to preemptible + interruptible kernel context (i.e. check 773 * for pending work and re-enter), return true without writing to ret. 774 */ 775 static bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu, int *ret) 776 { 777 struct kvm_run *run = vcpu->run; 778 779 /* 780 * If we're using a userspace irqchip, then check if we need 781 * to tell a userspace irqchip about timer or PMU level 782 * changes and if so, exit to userspace (the actual level 783 * state gets updated in kvm_timer_update_run and 784 * kvm_pmu_update_run below). 785 */ 786 if (static_branch_unlikely(&userspace_irqchip_in_use)) { 787 if (kvm_timer_should_notify_user(vcpu) || 788 kvm_pmu_should_notify_user(vcpu)) { 789 *ret = -EINTR; 790 run->exit_reason = KVM_EXIT_INTR; 791 return true; 792 } 793 } 794 795 return kvm_request_pending(vcpu) || 796 need_new_vmid_gen(&vcpu->arch.hw_mmu->vmid) || 797 xfer_to_guest_mode_work_pending(); 798 } 799 800 /* 801 * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while 802 * the vCPU is running. 803 * 804 * This must be noinstr as instrumentation may make use of RCU, and this is not 805 * safe during the EQS. 806 */ 807 static int noinstr kvm_arm_vcpu_enter_exit(struct kvm_vcpu *vcpu) 808 { 809 int ret; 810 811 guest_state_enter_irqoff(); 812 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu); 813 guest_state_exit_irqoff(); 814 815 return ret; 816 } 817 818 /** 819 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code 820 * @vcpu: The VCPU pointer 821 * 822 * This function is called through the VCPU_RUN ioctl called from user space. It 823 * will execute VM code in a loop until the time slice for the process is used 824 * or some emulation is needed from user space in which case the function will 825 * return with return value 0 and with the kvm_run structure filled in with the 826 * required data for the requested emulation. 827 */ 828 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 829 { 830 struct kvm_run *run = vcpu->run; 831 int ret; 832 833 if (run->exit_reason == KVM_EXIT_MMIO) { 834 ret = kvm_handle_mmio_return(vcpu); 835 if (ret) 836 return ret; 837 } 838 839 vcpu_load(vcpu); 840 841 if (run->immediate_exit) { 842 ret = -EINTR; 843 goto out; 844 } 845 846 kvm_sigset_activate(vcpu); 847 848 ret = 1; 849 run->exit_reason = KVM_EXIT_UNKNOWN; 850 while (ret > 0) { 851 /* 852 * Check conditions before entering the guest 853 */ 854 ret = xfer_to_guest_mode_handle_work(vcpu); 855 if (!ret) 856 ret = 1; 857 858 update_vmid(&vcpu->arch.hw_mmu->vmid); 859 860 check_vcpu_requests(vcpu); 861 862 /* 863 * Preparing the interrupts to be injected also 864 * involves poking the GIC, which must be done in a 865 * non-preemptible context. 866 */ 867 preempt_disable(); 868 869 kvm_pmu_flush_hwstate(vcpu); 870 871 local_irq_disable(); 872 873 kvm_vgic_flush_hwstate(vcpu); 874 875 /* 876 * Ensure we set mode to IN_GUEST_MODE after we disable 877 * interrupts and before the final VCPU requests check. 878 * See the comment in kvm_vcpu_exiting_guest_mode() and 879 * Documentation/virt/kvm/vcpu-requests.rst 880 */ 881 smp_store_mb(vcpu->mode, IN_GUEST_MODE); 882 883 if (ret <= 0 || kvm_vcpu_exit_request(vcpu, &ret)) { 884 vcpu->mode = OUTSIDE_GUEST_MODE; 885 isb(); /* Ensure work in x_flush_hwstate is committed */ 886 kvm_pmu_sync_hwstate(vcpu); 887 if (static_branch_unlikely(&userspace_irqchip_in_use)) 888 kvm_timer_sync_user(vcpu); 889 kvm_vgic_sync_hwstate(vcpu); 890 local_irq_enable(); 891 preempt_enable(); 892 continue; 893 } 894 895 kvm_arm_setup_debug(vcpu); 896 kvm_arch_vcpu_ctxflush_fp(vcpu); 897 898 /************************************************************** 899 * Enter the guest 900 */ 901 trace_kvm_entry(*vcpu_pc(vcpu)); 902 guest_timing_enter_irqoff(); 903 904 ret = kvm_arm_vcpu_enter_exit(vcpu); 905 906 vcpu->mode = OUTSIDE_GUEST_MODE; 907 vcpu->stat.exits++; 908 /* 909 * Back from guest 910 *************************************************************/ 911 912 kvm_arm_clear_debug(vcpu); 913 914 /* 915 * We must sync the PMU state before the vgic state so 916 * that the vgic can properly sample the updated state of the 917 * interrupt line. 918 */ 919 kvm_pmu_sync_hwstate(vcpu); 920 921 /* 922 * Sync the vgic state before syncing the timer state because 923 * the timer code needs to know if the virtual timer 924 * interrupts are active. 925 */ 926 kvm_vgic_sync_hwstate(vcpu); 927 928 /* 929 * Sync the timer hardware state before enabling interrupts as 930 * we don't want vtimer interrupts to race with syncing the 931 * timer virtual interrupt state. 932 */ 933 if (static_branch_unlikely(&userspace_irqchip_in_use)) 934 kvm_timer_sync_user(vcpu); 935 936 kvm_arch_vcpu_ctxsync_fp(vcpu); 937 938 /* 939 * We must ensure that any pending interrupts are taken before 940 * we exit guest timing so that timer ticks are accounted as 941 * guest time. Transiently unmask interrupts so that any 942 * pending interrupts are taken. 943 * 944 * Per ARM DDI 0487G.b section D1.13.4, an ISB (or other 945 * context synchronization event) is necessary to ensure that 946 * pending interrupts are taken. 947 */ 948 local_irq_enable(); 949 isb(); 950 local_irq_disable(); 951 952 guest_timing_exit_irqoff(); 953 954 local_irq_enable(); 955 956 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); 957 958 /* Exit types that need handling before we can be preempted */ 959 handle_exit_early(vcpu, ret); 960 961 preempt_enable(); 962 963 /* 964 * The ARMv8 architecture doesn't give the hypervisor 965 * a mechanism to prevent a guest from dropping to AArch32 EL0 966 * if implemented by the CPU. If we spot the guest in such 967 * state and that we decided it wasn't supposed to do so (like 968 * with the asymmetric AArch32 case), return to userspace with 969 * a fatal error. 970 */ 971 if (vcpu_mode_is_bad_32bit(vcpu)) { 972 /* 973 * As we have caught the guest red-handed, decide that 974 * it isn't fit for purpose anymore by making the vcpu 975 * invalid. The VMM can try and fix it by issuing a 976 * KVM_ARM_VCPU_INIT if it really wants to. 977 */ 978 vcpu->arch.target = -1; 979 ret = ARM_EXCEPTION_IL; 980 } 981 982 ret = handle_exit(vcpu, ret); 983 } 984 985 /* Tell userspace about in-kernel device output levels */ 986 if (unlikely(!irqchip_in_kernel(vcpu->kvm))) { 987 kvm_timer_update_run(vcpu); 988 kvm_pmu_update_run(vcpu); 989 } 990 991 kvm_sigset_deactivate(vcpu); 992 993 out: 994 /* 995 * In the unlikely event that we are returning to userspace 996 * with pending exceptions or PC adjustment, commit these 997 * adjustments in order to give userspace a consistent view of 998 * the vcpu state. Note that this relies on __kvm_adjust_pc() 999 * being preempt-safe on VHE. 1000 */ 1001 if (unlikely(vcpu->arch.flags & (KVM_ARM64_PENDING_EXCEPTION | 1002 KVM_ARM64_INCREMENT_PC))) 1003 kvm_call_hyp(__kvm_adjust_pc, vcpu); 1004 1005 vcpu_put(vcpu); 1006 return ret; 1007 } 1008 1009 static int vcpu_interrupt_line(struct kvm_vcpu *vcpu, int number, bool level) 1010 { 1011 int bit_index; 1012 bool set; 1013 unsigned long *hcr; 1014 1015 if (number == KVM_ARM_IRQ_CPU_IRQ) 1016 bit_index = __ffs(HCR_VI); 1017 else /* KVM_ARM_IRQ_CPU_FIQ */ 1018 bit_index = __ffs(HCR_VF); 1019 1020 hcr = vcpu_hcr(vcpu); 1021 if (level) 1022 set = test_and_set_bit(bit_index, hcr); 1023 else 1024 set = test_and_clear_bit(bit_index, hcr); 1025 1026 /* 1027 * If we didn't change anything, no need to wake up or kick other CPUs 1028 */ 1029 if (set == level) 1030 return 0; 1031 1032 /* 1033 * The vcpu irq_lines field was updated, wake up sleeping VCPUs and 1034 * trigger a world-switch round on the running physical CPU to set the 1035 * virtual IRQ/FIQ fields in the HCR appropriately. 1036 */ 1037 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); 1038 kvm_vcpu_kick(vcpu); 1039 1040 return 0; 1041 } 1042 1043 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, 1044 bool line_status) 1045 { 1046 u32 irq = irq_level->irq; 1047 unsigned int irq_type, vcpu_idx, irq_num; 1048 int nrcpus = atomic_read(&kvm->online_vcpus); 1049 struct kvm_vcpu *vcpu = NULL; 1050 bool level = irq_level->level; 1051 1052 irq_type = (irq >> KVM_ARM_IRQ_TYPE_SHIFT) & KVM_ARM_IRQ_TYPE_MASK; 1053 vcpu_idx = (irq >> KVM_ARM_IRQ_VCPU_SHIFT) & KVM_ARM_IRQ_VCPU_MASK; 1054 vcpu_idx += ((irq >> KVM_ARM_IRQ_VCPU2_SHIFT) & KVM_ARM_IRQ_VCPU2_MASK) * (KVM_ARM_IRQ_VCPU_MASK + 1); 1055 irq_num = (irq >> KVM_ARM_IRQ_NUM_SHIFT) & KVM_ARM_IRQ_NUM_MASK; 1056 1057 trace_kvm_irq_line(irq_type, vcpu_idx, irq_num, irq_level->level); 1058 1059 switch (irq_type) { 1060 case KVM_ARM_IRQ_TYPE_CPU: 1061 if (irqchip_in_kernel(kvm)) 1062 return -ENXIO; 1063 1064 if (vcpu_idx >= nrcpus) 1065 return -EINVAL; 1066 1067 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 1068 if (!vcpu) 1069 return -EINVAL; 1070 1071 if (irq_num > KVM_ARM_IRQ_CPU_FIQ) 1072 return -EINVAL; 1073 1074 return vcpu_interrupt_line(vcpu, irq_num, level); 1075 case KVM_ARM_IRQ_TYPE_PPI: 1076 if (!irqchip_in_kernel(kvm)) 1077 return -ENXIO; 1078 1079 if (vcpu_idx >= nrcpus) 1080 return -EINVAL; 1081 1082 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 1083 if (!vcpu) 1084 return -EINVAL; 1085 1086 if (irq_num < VGIC_NR_SGIS || irq_num >= VGIC_NR_PRIVATE_IRQS) 1087 return -EINVAL; 1088 1089 return kvm_vgic_inject_irq(kvm, vcpu->vcpu_id, irq_num, level, NULL); 1090 case KVM_ARM_IRQ_TYPE_SPI: 1091 if (!irqchip_in_kernel(kvm)) 1092 return -ENXIO; 1093 1094 if (irq_num < VGIC_NR_PRIVATE_IRQS) 1095 return -EINVAL; 1096 1097 return kvm_vgic_inject_irq(kvm, 0, irq_num, level, NULL); 1098 } 1099 1100 return -EINVAL; 1101 } 1102 1103 static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, 1104 const struct kvm_vcpu_init *init) 1105 { 1106 unsigned int i, ret; 1107 u32 phys_target = kvm_target_cpu(); 1108 1109 if (init->target != phys_target) 1110 return -EINVAL; 1111 1112 /* 1113 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1114 * use the same target. 1115 */ 1116 if (vcpu->arch.target != -1 && vcpu->arch.target != init->target) 1117 return -EINVAL; 1118 1119 /* -ENOENT for unknown features, -EINVAL for invalid combinations. */ 1120 for (i = 0; i < sizeof(init->features) * 8; i++) { 1121 bool set = (init->features[i / 32] & (1 << (i % 32))); 1122 1123 if (set && i >= KVM_VCPU_MAX_FEATURES) 1124 return -ENOENT; 1125 1126 /* 1127 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1128 * use the same feature set. 1129 */ 1130 if (vcpu->arch.target != -1 && i < KVM_VCPU_MAX_FEATURES && 1131 test_bit(i, vcpu->arch.features) != set) 1132 return -EINVAL; 1133 1134 if (set) 1135 set_bit(i, vcpu->arch.features); 1136 } 1137 1138 vcpu->arch.target = phys_target; 1139 1140 /* Now we know what it is, we can reset it. */ 1141 ret = kvm_reset_vcpu(vcpu); 1142 if (ret) { 1143 vcpu->arch.target = -1; 1144 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 1145 } 1146 1147 return ret; 1148 } 1149 1150 static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, 1151 struct kvm_vcpu_init *init) 1152 { 1153 int ret; 1154 1155 ret = kvm_vcpu_set_target(vcpu, init); 1156 if (ret) 1157 return ret; 1158 1159 /* 1160 * Ensure a rebooted VM will fault in RAM pages and detect if the 1161 * guest MMU is turned off and flush the caches as needed. 1162 * 1163 * S2FWB enforces all memory accesses to RAM being cacheable, 1164 * ensuring that the data side is always coherent. We still 1165 * need to invalidate the I-cache though, as FWB does *not* 1166 * imply CTR_EL0.DIC. 1167 */ 1168 if (vcpu_has_run_once(vcpu)) { 1169 if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) 1170 stage2_unmap_vm(vcpu->kvm); 1171 else 1172 icache_inval_all_pou(); 1173 } 1174 1175 vcpu_reset_hcr(vcpu); 1176 vcpu->arch.cptr_el2 = CPTR_EL2_DEFAULT; 1177 1178 /* 1179 * Handle the "start in power-off" case. 1180 */ 1181 if (test_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) 1182 vcpu_power_off(vcpu); 1183 else 1184 vcpu->arch.power_off = false; 1185 1186 return 0; 1187 } 1188 1189 static int kvm_arm_vcpu_set_attr(struct kvm_vcpu *vcpu, 1190 struct kvm_device_attr *attr) 1191 { 1192 int ret = -ENXIO; 1193 1194 switch (attr->group) { 1195 default: 1196 ret = kvm_arm_vcpu_arch_set_attr(vcpu, attr); 1197 break; 1198 } 1199 1200 return ret; 1201 } 1202 1203 static int kvm_arm_vcpu_get_attr(struct kvm_vcpu *vcpu, 1204 struct kvm_device_attr *attr) 1205 { 1206 int ret = -ENXIO; 1207 1208 switch (attr->group) { 1209 default: 1210 ret = kvm_arm_vcpu_arch_get_attr(vcpu, attr); 1211 break; 1212 } 1213 1214 return ret; 1215 } 1216 1217 static int kvm_arm_vcpu_has_attr(struct kvm_vcpu *vcpu, 1218 struct kvm_device_attr *attr) 1219 { 1220 int ret = -ENXIO; 1221 1222 switch (attr->group) { 1223 default: 1224 ret = kvm_arm_vcpu_arch_has_attr(vcpu, attr); 1225 break; 1226 } 1227 1228 return ret; 1229 } 1230 1231 static int kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 1232 struct kvm_vcpu_events *events) 1233 { 1234 memset(events, 0, sizeof(*events)); 1235 1236 return __kvm_arm_vcpu_get_events(vcpu, events); 1237 } 1238 1239 static int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 1240 struct kvm_vcpu_events *events) 1241 { 1242 int i; 1243 1244 /* check whether the reserved field is zero */ 1245 for (i = 0; i < ARRAY_SIZE(events->reserved); i++) 1246 if (events->reserved[i]) 1247 return -EINVAL; 1248 1249 /* check whether the pad field is zero */ 1250 for (i = 0; i < ARRAY_SIZE(events->exception.pad); i++) 1251 if (events->exception.pad[i]) 1252 return -EINVAL; 1253 1254 return __kvm_arm_vcpu_set_events(vcpu, events); 1255 } 1256 1257 long kvm_arch_vcpu_ioctl(struct file *filp, 1258 unsigned int ioctl, unsigned long arg) 1259 { 1260 struct kvm_vcpu *vcpu = filp->private_data; 1261 void __user *argp = (void __user *)arg; 1262 struct kvm_device_attr attr; 1263 long r; 1264 1265 switch (ioctl) { 1266 case KVM_ARM_VCPU_INIT: { 1267 struct kvm_vcpu_init init; 1268 1269 r = -EFAULT; 1270 if (copy_from_user(&init, argp, sizeof(init))) 1271 break; 1272 1273 r = kvm_arch_vcpu_ioctl_vcpu_init(vcpu, &init); 1274 break; 1275 } 1276 case KVM_SET_ONE_REG: 1277 case KVM_GET_ONE_REG: { 1278 struct kvm_one_reg reg; 1279 1280 r = -ENOEXEC; 1281 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1282 break; 1283 1284 r = -EFAULT; 1285 if (copy_from_user(®, argp, sizeof(reg))) 1286 break; 1287 1288 /* 1289 * We could owe a reset due to PSCI. Handle the pending reset 1290 * here to ensure userspace register accesses are ordered after 1291 * the reset. 1292 */ 1293 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 1294 kvm_reset_vcpu(vcpu); 1295 1296 if (ioctl == KVM_SET_ONE_REG) 1297 r = kvm_arm_set_reg(vcpu, ®); 1298 else 1299 r = kvm_arm_get_reg(vcpu, ®); 1300 break; 1301 } 1302 case KVM_GET_REG_LIST: { 1303 struct kvm_reg_list __user *user_list = argp; 1304 struct kvm_reg_list reg_list; 1305 unsigned n; 1306 1307 r = -ENOEXEC; 1308 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1309 break; 1310 1311 r = -EPERM; 1312 if (!kvm_arm_vcpu_is_finalized(vcpu)) 1313 break; 1314 1315 r = -EFAULT; 1316 if (copy_from_user(®_list, user_list, sizeof(reg_list))) 1317 break; 1318 n = reg_list.n; 1319 reg_list.n = kvm_arm_num_regs(vcpu); 1320 if (copy_to_user(user_list, ®_list, sizeof(reg_list))) 1321 break; 1322 r = -E2BIG; 1323 if (n < reg_list.n) 1324 break; 1325 r = kvm_arm_copy_reg_indices(vcpu, user_list->reg); 1326 break; 1327 } 1328 case KVM_SET_DEVICE_ATTR: { 1329 r = -EFAULT; 1330 if (copy_from_user(&attr, argp, sizeof(attr))) 1331 break; 1332 r = kvm_arm_vcpu_set_attr(vcpu, &attr); 1333 break; 1334 } 1335 case KVM_GET_DEVICE_ATTR: { 1336 r = -EFAULT; 1337 if (copy_from_user(&attr, argp, sizeof(attr))) 1338 break; 1339 r = kvm_arm_vcpu_get_attr(vcpu, &attr); 1340 break; 1341 } 1342 case KVM_HAS_DEVICE_ATTR: { 1343 r = -EFAULT; 1344 if (copy_from_user(&attr, argp, sizeof(attr))) 1345 break; 1346 r = kvm_arm_vcpu_has_attr(vcpu, &attr); 1347 break; 1348 } 1349 case KVM_GET_VCPU_EVENTS: { 1350 struct kvm_vcpu_events events; 1351 1352 if (kvm_arm_vcpu_get_events(vcpu, &events)) 1353 return -EINVAL; 1354 1355 if (copy_to_user(argp, &events, sizeof(events))) 1356 return -EFAULT; 1357 1358 return 0; 1359 } 1360 case KVM_SET_VCPU_EVENTS: { 1361 struct kvm_vcpu_events events; 1362 1363 if (copy_from_user(&events, argp, sizeof(events))) 1364 return -EFAULT; 1365 1366 return kvm_arm_vcpu_set_events(vcpu, &events); 1367 } 1368 case KVM_ARM_VCPU_FINALIZE: { 1369 int what; 1370 1371 if (!kvm_vcpu_initialized(vcpu)) 1372 return -ENOEXEC; 1373 1374 if (get_user(what, (const int __user *)argp)) 1375 return -EFAULT; 1376 1377 return kvm_arm_vcpu_finalize(vcpu, what); 1378 } 1379 default: 1380 r = -EINVAL; 1381 } 1382 1383 return r; 1384 } 1385 1386 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1387 { 1388 1389 } 1390 1391 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 1392 const struct kvm_memory_slot *memslot) 1393 { 1394 kvm_flush_remote_tlbs(kvm); 1395 } 1396 1397 static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm, 1398 struct kvm_arm_device_addr *dev_addr) 1399 { 1400 unsigned long dev_id, type; 1401 1402 dev_id = (dev_addr->id & KVM_ARM_DEVICE_ID_MASK) >> 1403 KVM_ARM_DEVICE_ID_SHIFT; 1404 type = (dev_addr->id & KVM_ARM_DEVICE_TYPE_MASK) >> 1405 KVM_ARM_DEVICE_TYPE_SHIFT; 1406 1407 switch (dev_id) { 1408 case KVM_ARM_DEVICE_VGIC_V2: 1409 if (!vgic_present) 1410 return -ENXIO; 1411 return kvm_vgic_addr(kvm, type, &dev_addr->addr, true); 1412 default: 1413 return -ENODEV; 1414 } 1415 } 1416 1417 long kvm_arch_vm_ioctl(struct file *filp, 1418 unsigned int ioctl, unsigned long arg) 1419 { 1420 struct kvm *kvm = filp->private_data; 1421 void __user *argp = (void __user *)arg; 1422 1423 switch (ioctl) { 1424 case KVM_CREATE_IRQCHIP: { 1425 int ret; 1426 if (!vgic_present) 1427 return -ENXIO; 1428 mutex_lock(&kvm->lock); 1429 ret = kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); 1430 mutex_unlock(&kvm->lock); 1431 return ret; 1432 } 1433 case KVM_ARM_SET_DEVICE_ADDR: { 1434 struct kvm_arm_device_addr dev_addr; 1435 1436 if (copy_from_user(&dev_addr, argp, sizeof(dev_addr))) 1437 return -EFAULT; 1438 return kvm_vm_ioctl_set_device_addr(kvm, &dev_addr); 1439 } 1440 case KVM_ARM_PREFERRED_TARGET: { 1441 struct kvm_vcpu_init init; 1442 1443 kvm_vcpu_preferred_target(&init); 1444 1445 if (copy_to_user(argp, &init, sizeof(init))) 1446 return -EFAULT; 1447 1448 return 0; 1449 } 1450 case KVM_ARM_MTE_COPY_TAGS: { 1451 struct kvm_arm_copy_mte_tags copy_tags; 1452 1453 if (copy_from_user(©_tags, argp, sizeof(copy_tags))) 1454 return -EFAULT; 1455 return kvm_vm_ioctl_mte_copy_tags(kvm, ©_tags); 1456 } 1457 default: 1458 return -EINVAL; 1459 } 1460 } 1461 1462 static unsigned long nvhe_percpu_size(void) 1463 { 1464 return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) - 1465 (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_start); 1466 } 1467 1468 static unsigned long nvhe_percpu_order(void) 1469 { 1470 unsigned long size = nvhe_percpu_size(); 1471 1472 return size ? get_order(size) : 0; 1473 } 1474 1475 /* A lookup table holding the hypervisor VA for each vector slot */ 1476 static void *hyp_spectre_vector_selector[BP_HARDEN_EL2_SLOTS]; 1477 1478 static void kvm_init_vector_slot(void *base, enum arm64_hyp_spectre_vector slot) 1479 { 1480 hyp_spectre_vector_selector[slot] = __kvm_vector_slot2addr(base, slot); 1481 } 1482 1483 static int kvm_init_vector_slots(void) 1484 { 1485 int err; 1486 void *base; 1487 1488 base = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector)); 1489 kvm_init_vector_slot(base, HYP_VECTOR_DIRECT); 1490 1491 base = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs)); 1492 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_DIRECT); 1493 1494 if (!cpus_have_const_cap(ARM64_SPECTRE_V3A)) 1495 return 0; 1496 1497 if (!has_vhe()) { 1498 err = create_hyp_exec_mappings(__pa_symbol(__bp_harden_hyp_vecs), 1499 __BP_HARDEN_HYP_VECS_SZ, &base); 1500 if (err) 1501 return err; 1502 } 1503 1504 kvm_init_vector_slot(base, HYP_VECTOR_INDIRECT); 1505 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_INDIRECT); 1506 return 0; 1507 } 1508 1509 static void cpu_prepare_hyp_mode(int cpu) 1510 { 1511 struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); 1512 unsigned long tcr; 1513 1514 /* 1515 * Calculate the raw per-cpu offset without a translation from the 1516 * kernel's mapping to the linear mapping, and store it in tpidr_el2 1517 * so that we can use adr_l to access per-cpu variables in EL2. 1518 * Also drop the KASAN tag which gets in the way... 1519 */ 1520 params->tpidr_el2 = (unsigned long)kasan_reset_tag(per_cpu_ptr_nvhe_sym(__per_cpu_start, cpu)) - 1521 (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start)); 1522 1523 params->mair_el2 = read_sysreg(mair_el1); 1524 1525 /* 1526 * The ID map may be configured to use an extended virtual address 1527 * range. This is only the case if system RAM is out of range for the 1528 * currently configured page size and VA_BITS, in which case we will 1529 * also need the extended virtual range for the HYP ID map, or we won't 1530 * be able to enable the EL2 MMU. 1531 * 1532 * However, at EL2, there is only one TTBR register, and we can't switch 1533 * between translation tables *and* update TCR_EL2.T0SZ at the same 1534 * time. Bottom line: we need to use the extended range with *both* our 1535 * translation tables. 1536 * 1537 * So use the same T0SZ value we use for the ID map. 1538 */ 1539 tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1; 1540 tcr &= ~TCR_T0SZ_MASK; 1541 tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET; 1542 params->tcr_el2 = tcr; 1543 1544 params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE); 1545 params->pgd_pa = kvm_mmu_get_httbr(); 1546 if (is_protected_kvm_enabled()) 1547 params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS; 1548 else 1549 params->hcr_el2 = HCR_HOST_NVHE_FLAGS; 1550 params->vttbr = params->vtcr = 0; 1551 1552 /* 1553 * Flush the init params from the data cache because the struct will 1554 * be read while the MMU is off. 1555 */ 1556 kvm_flush_dcache_to_poc(params, sizeof(*params)); 1557 } 1558 1559 static void hyp_install_host_vector(void) 1560 { 1561 struct kvm_nvhe_init_params *params; 1562 struct arm_smccc_res res; 1563 1564 /* Switch from the HYP stub to our own HYP init vector */ 1565 __hyp_set_vectors(kvm_get_idmap_vector()); 1566 1567 /* 1568 * Call initialization code, and switch to the full blown HYP code. 1569 * If the cpucaps haven't been finalized yet, something has gone very 1570 * wrong, and hyp will crash and burn when it uses any 1571 * cpus_have_const_cap() wrapper. 1572 */ 1573 BUG_ON(!system_capabilities_finalized()); 1574 params = this_cpu_ptr_nvhe_sym(kvm_init_params); 1575 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init), virt_to_phys(params), &res); 1576 WARN_ON(res.a0 != SMCCC_RET_SUCCESS); 1577 } 1578 1579 static void cpu_init_hyp_mode(void) 1580 { 1581 hyp_install_host_vector(); 1582 1583 /* 1584 * Disabling SSBD on a non-VHE system requires us to enable SSBS 1585 * at EL2. 1586 */ 1587 if (this_cpu_has_cap(ARM64_SSBS) && 1588 arm64_get_spectre_v4_state() == SPECTRE_VULNERABLE) { 1589 kvm_call_hyp_nvhe(__kvm_enable_ssbs); 1590 } 1591 } 1592 1593 static void cpu_hyp_reset(void) 1594 { 1595 if (!is_kernel_in_hyp_mode()) 1596 __hyp_reset_vectors(); 1597 } 1598 1599 /* 1600 * EL2 vectors can be mapped and rerouted in a number of ways, 1601 * depending on the kernel configuration and CPU present: 1602 * 1603 * - If the CPU is affected by Spectre-v2, the hardening sequence is 1604 * placed in one of the vector slots, which is executed before jumping 1605 * to the real vectors. 1606 * 1607 * - If the CPU also has the ARM64_SPECTRE_V3A cap, the slot 1608 * containing the hardening sequence is mapped next to the idmap page, 1609 * and executed before jumping to the real vectors. 1610 * 1611 * - If the CPU only has the ARM64_SPECTRE_V3A cap, then an 1612 * empty slot is selected, mapped next to the idmap page, and 1613 * executed before jumping to the real vectors. 1614 * 1615 * Note that ARM64_SPECTRE_V3A is somewhat incompatible with 1616 * VHE, as we don't have hypervisor-specific mappings. If the system 1617 * is VHE and yet selects this capability, it will be ignored. 1618 */ 1619 static void cpu_set_hyp_vector(void) 1620 { 1621 struct bp_hardening_data *data = this_cpu_ptr(&bp_hardening_data); 1622 void *vector = hyp_spectre_vector_selector[data->slot]; 1623 1624 if (!is_protected_kvm_enabled()) 1625 *this_cpu_ptr_hyp_sym(kvm_hyp_vector) = (unsigned long)vector; 1626 else 1627 kvm_call_hyp_nvhe(__pkvm_cpu_set_vector, data->slot); 1628 } 1629 1630 static void cpu_hyp_init_context(void) 1631 { 1632 kvm_init_host_cpu_context(&this_cpu_ptr_hyp_sym(kvm_host_data)->host_ctxt); 1633 1634 if (!is_kernel_in_hyp_mode()) 1635 cpu_init_hyp_mode(); 1636 } 1637 1638 static void cpu_hyp_init_features(void) 1639 { 1640 cpu_set_hyp_vector(); 1641 kvm_arm_init_debug(); 1642 1643 if (is_kernel_in_hyp_mode()) 1644 kvm_timer_init_vhe(); 1645 1646 if (vgic_present) 1647 kvm_vgic_init_cpu_hardware(); 1648 } 1649 1650 static void cpu_hyp_reinit(void) 1651 { 1652 cpu_hyp_reset(); 1653 cpu_hyp_init_context(); 1654 cpu_hyp_init_features(); 1655 } 1656 1657 static void _kvm_arch_hardware_enable(void *discard) 1658 { 1659 if (!__this_cpu_read(kvm_arm_hardware_enabled)) { 1660 cpu_hyp_reinit(); 1661 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1662 } 1663 } 1664 1665 int kvm_arch_hardware_enable(void) 1666 { 1667 _kvm_arch_hardware_enable(NULL); 1668 return 0; 1669 } 1670 1671 static void _kvm_arch_hardware_disable(void *discard) 1672 { 1673 if (__this_cpu_read(kvm_arm_hardware_enabled)) { 1674 cpu_hyp_reset(); 1675 __this_cpu_write(kvm_arm_hardware_enabled, 0); 1676 } 1677 } 1678 1679 void kvm_arch_hardware_disable(void) 1680 { 1681 if (!is_protected_kvm_enabled()) 1682 _kvm_arch_hardware_disable(NULL); 1683 } 1684 1685 #ifdef CONFIG_CPU_PM 1686 static int hyp_init_cpu_pm_notifier(struct notifier_block *self, 1687 unsigned long cmd, 1688 void *v) 1689 { 1690 /* 1691 * kvm_arm_hardware_enabled is left with its old value over 1692 * PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should 1693 * re-enable hyp. 1694 */ 1695 switch (cmd) { 1696 case CPU_PM_ENTER: 1697 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1698 /* 1699 * don't update kvm_arm_hardware_enabled here 1700 * so that the hardware will be re-enabled 1701 * when we resume. See below. 1702 */ 1703 cpu_hyp_reset(); 1704 1705 return NOTIFY_OK; 1706 case CPU_PM_ENTER_FAILED: 1707 case CPU_PM_EXIT: 1708 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1709 /* The hardware was enabled before suspend. */ 1710 cpu_hyp_reinit(); 1711 1712 return NOTIFY_OK; 1713 1714 default: 1715 return NOTIFY_DONE; 1716 } 1717 } 1718 1719 static struct notifier_block hyp_init_cpu_pm_nb = { 1720 .notifier_call = hyp_init_cpu_pm_notifier, 1721 }; 1722 1723 static void hyp_cpu_pm_init(void) 1724 { 1725 if (!is_protected_kvm_enabled()) 1726 cpu_pm_register_notifier(&hyp_init_cpu_pm_nb); 1727 } 1728 static void hyp_cpu_pm_exit(void) 1729 { 1730 if (!is_protected_kvm_enabled()) 1731 cpu_pm_unregister_notifier(&hyp_init_cpu_pm_nb); 1732 } 1733 #else 1734 static inline void hyp_cpu_pm_init(void) 1735 { 1736 } 1737 static inline void hyp_cpu_pm_exit(void) 1738 { 1739 } 1740 #endif 1741 1742 static void init_cpu_logical_map(void) 1743 { 1744 unsigned int cpu; 1745 1746 /* 1747 * Copy the MPIDR <-> logical CPU ID mapping to hyp. 1748 * Only copy the set of online CPUs whose features have been chacked 1749 * against the finalized system capabilities. The hypervisor will not 1750 * allow any other CPUs from the `possible` set to boot. 1751 */ 1752 for_each_online_cpu(cpu) 1753 hyp_cpu_logical_map[cpu] = cpu_logical_map(cpu); 1754 } 1755 1756 #define init_psci_0_1_impl_state(config, what) \ 1757 config.psci_0_1_ ## what ## _implemented = psci_ops.what 1758 1759 static bool init_psci_relay(void) 1760 { 1761 /* 1762 * If PSCI has not been initialized, protected KVM cannot install 1763 * itself on newly booted CPUs. 1764 */ 1765 if (!psci_ops.get_version) { 1766 kvm_err("Cannot initialize protected mode without PSCI\n"); 1767 return false; 1768 } 1769 1770 kvm_host_psci_config.version = psci_ops.get_version(); 1771 1772 if (kvm_host_psci_config.version == PSCI_VERSION(0, 1)) { 1773 kvm_host_psci_config.function_ids_0_1 = get_psci_0_1_function_ids(); 1774 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_suspend); 1775 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_on); 1776 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_off); 1777 init_psci_0_1_impl_state(kvm_host_psci_config, migrate); 1778 } 1779 return true; 1780 } 1781 1782 static int init_subsystems(void) 1783 { 1784 int err = 0; 1785 1786 /* 1787 * Enable hardware so that subsystem initialisation can access EL2. 1788 */ 1789 on_each_cpu(_kvm_arch_hardware_enable, NULL, 1); 1790 1791 /* 1792 * Register CPU lower-power notifier 1793 */ 1794 hyp_cpu_pm_init(); 1795 1796 /* 1797 * Init HYP view of VGIC 1798 */ 1799 err = kvm_vgic_hyp_init(); 1800 switch (err) { 1801 case 0: 1802 vgic_present = true; 1803 break; 1804 case -ENODEV: 1805 case -ENXIO: 1806 vgic_present = false; 1807 err = 0; 1808 break; 1809 default: 1810 goto out; 1811 } 1812 1813 /* 1814 * Init HYP architected timer support 1815 */ 1816 err = kvm_timer_hyp_init(vgic_present); 1817 if (err) 1818 goto out; 1819 1820 kvm_register_perf_callbacks(NULL); 1821 1822 kvm_sys_reg_table_init(); 1823 1824 out: 1825 if (err || !is_protected_kvm_enabled()) 1826 on_each_cpu(_kvm_arch_hardware_disable, NULL, 1); 1827 1828 return err; 1829 } 1830 1831 static void teardown_hyp_mode(void) 1832 { 1833 int cpu; 1834 1835 free_hyp_pgds(); 1836 for_each_possible_cpu(cpu) { 1837 free_page(per_cpu(kvm_arm_hyp_stack_page, cpu)); 1838 free_pages(kvm_arm_hyp_percpu_base[cpu], nvhe_percpu_order()); 1839 } 1840 } 1841 1842 static int do_pkvm_init(u32 hyp_va_bits) 1843 { 1844 void *per_cpu_base = kvm_ksym_ref(kvm_arm_hyp_percpu_base); 1845 int ret; 1846 1847 preempt_disable(); 1848 cpu_hyp_init_context(); 1849 ret = kvm_call_hyp_nvhe(__pkvm_init, hyp_mem_base, hyp_mem_size, 1850 num_possible_cpus(), kern_hyp_va(per_cpu_base), 1851 hyp_va_bits); 1852 cpu_hyp_init_features(); 1853 1854 /* 1855 * The stub hypercalls are now disabled, so set our local flag to 1856 * prevent a later re-init attempt in kvm_arch_hardware_enable(). 1857 */ 1858 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1859 preempt_enable(); 1860 1861 return ret; 1862 } 1863 1864 static int kvm_hyp_init_protection(u32 hyp_va_bits) 1865 { 1866 void *addr = phys_to_virt(hyp_mem_base); 1867 int ret; 1868 1869 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); 1870 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); 1871 kvm_nvhe_sym(id_aa64isar0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR0_EL1); 1872 kvm_nvhe_sym(id_aa64isar1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR1_EL1); 1873 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 1874 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); 1875 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR2_EL1); 1876 1877 ret = create_hyp_mappings(addr, addr + hyp_mem_size, PAGE_HYP); 1878 if (ret) 1879 return ret; 1880 1881 ret = do_pkvm_init(hyp_va_bits); 1882 if (ret) 1883 return ret; 1884 1885 free_hyp_pgds(); 1886 1887 return 0; 1888 } 1889 1890 /** 1891 * Inits Hyp-mode on all online CPUs 1892 */ 1893 static int init_hyp_mode(void) 1894 { 1895 u32 hyp_va_bits; 1896 int cpu; 1897 int err = -ENOMEM; 1898 1899 /* 1900 * The protected Hyp-mode cannot be initialized if the memory pool 1901 * allocation has failed. 1902 */ 1903 if (is_protected_kvm_enabled() && !hyp_mem_base) 1904 goto out_err; 1905 1906 /* 1907 * Allocate Hyp PGD and setup Hyp identity mapping 1908 */ 1909 err = kvm_mmu_init(&hyp_va_bits); 1910 if (err) 1911 goto out_err; 1912 1913 /* 1914 * Allocate stack pages for Hypervisor-mode 1915 */ 1916 for_each_possible_cpu(cpu) { 1917 unsigned long stack_page; 1918 1919 stack_page = __get_free_page(GFP_KERNEL); 1920 if (!stack_page) { 1921 err = -ENOMEM; 1922 goto out_err; 1923 } 1924 1925 per_cpu(kvm_arm_hyp_stack_page, cpu) = stack_page; 1926 } 1927 1928 /* 1929 * Allocate and initialize pages for Hypervisor-mode percpu regions. 1930 */ 1931 for_each_possible_cpu(cpu) { 1932 struct page *page; 1933 void *page_addr; 1934 1935 page = alloc_pages(GFP_KERNEL, nvhe_percpu_order()); 1936 if (!page) { 1937 err = -ENOMEM; 1938 goto out_err; 1939 } 1940 1941 page_addr = page_address(page); 1942 memcpy(page_addr, CHOOSE_NVHE_SYM(__per_cpu_start), nvhe_percpu_size()); 1943 kvm_arm_hyp_percpu_base[cpu] = (unsigned long)page_addr; 1944 } 1945 1946 /* 1947 * Map the Hyp-code called directly from the host 1948 */ 1949 err = create_hyp_mappings(kvm_ksym_ref(__hyp_text_start), 1950 kvm_ksym_ref(__hyp_text_end), PAGE_HYP_EXEC); 1951 if (err) { 1952 kvm_err("Cannot map world-switch code\n"); 1953 goto out_err; 1954 } 1955 1956 err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start), 1957 kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO); 1958 if (err) { 1959 kvm_err("Cannot map .hyp.rodata section\n"); 1960 goto out_err; 1961 } 1962 1963 err = create_hyp_mappings(kvm_ksym_ref(__start_rodata), 1964 kvm_ksym_ref(__end_rodata), PAGE_HYP_RO); 1965 if (err) { 1966 kvm_err("Cannot map rodata section\n"); 1967 goto out_err; 1968 } 1969 1970 /* 1971 * .hyp.bss is guaranteed to be placed at the beginning of the .bss 1972 * section thanks to an assertion in the linker script. Map it RW and 1973 * the rest of .bss RO. 1974 */ 1975 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_start), 1976 kvm_ksym_ref(__hyp_bss_end), PAGE_HYP); 1977 if (err) { 1978 kvm_err("Cannot map hyp bss section: %d\n", err); 1979 goto out_err; 1980 } 1981 1982 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_end), 1983 kvm_ksym_ref(__bss_stop), PAGE_HYP_RO); 1984 if (err) { 1985 kvm_err("Cannot map bss section\n"); 1986 goto out_err; 1987 } 1988 1989 /* 1990 * Map the Hyp stack pages 1991 */ 1992 for_each_possible_cpu(cpu) { 1993 char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu); 1994 err = create_hyp_mappings(stack_page, stack_page + PAGE_SIZE, 1995 PAGE_HYP); 1996 1997 if (err) { 1998 kvm_err("Cannot map hyp stack\n"); 1999 goto out_err; 2000 } 2001 } 2002 2003 for_each_possible_cpu(cpu) { 2004 char *percpu_begin = (char *)kvm_arm_hyp_percpu_base[cpu]; 2005 char *percpu_end = percpu_begin + nvhe_percpu_size(); 2006 2007 /* Map Hyp percpu pages */ 2008 err = create_hyp_mappings(percpu_begin, percpu_end, PAGE_HYP); 2009 if (err) { 2010 kvm_err("Cannot map hyp percpu region\n"); 2011 goto out_err; 2012 } 2013 2014 /* Prepare the CPU initialization parameters */ 2015 cpu_prepare_hyp_mode(cpu); 2016 } 2017 2018 if (is_protected_kvm_enabled()) { 2019 init_cpu_logical_map(); 2020 2021 if (!init_psci_relay()) { 2022 err = -ENODEV; 2023 goto out_err; 2024 } 2025 } 2026 2027 if (is_protected_kvm_enabled()) { 2028 err = kvm_hyp_init_protection(hyp_va_bits); 2029 if (err) { 2030 kvm_err("Failed to init hyp memory protection\n"); 2031 goto out_err; 2032 } 2033 } 2034 2035 return 0; 2036 2037 out_err: 2038 teardown_hyp_mode(); 2039 kvm_err("error initializing Hyp mode: %d\n", err); 2040 return err; 2041 } 2042 2043 static void _kvm_host_prot_finalize(void *arg) 2044 { 2045 int *err = arg; 2046 2047 if (WARN_ON(kvm_call_hyp_nvhe(__pkvm_prot_finalize))) 2048 WRITE_ONCE(*err, -EINVAL); 2049 } 2050 2051 static int pkvm_drop_host_privileges(void) 2052 { 2053 int ret = 0; 2054 2055 /* 2056 * Flip the static key upfront as that may no longer be possible 2057 * once the host stage 2 is installed. 2058 */ 2059 static_branch_enable(&kvm_protected_mode_initialized); 2060 on_each_cpu(_kvm_host_prot_finalize, &ret, 1); 2061 return ret; 2062 } 2063 2064 static int finalize_hyp_mode(void) 2065 { 2066 if (!is_protected_kvm_enabled()) 2067 return 0; 2068 2069 /* 2070 * Exclude HYP BSS from kmemleak so that it doesn't get peeked 2071 * at, which would end badly once the section is inaccessible. 2072 * None of other sections should ever be introspected. 2073 */ 2074 kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start); 2075 return pkvm_drop_host_privileges(); 2076 } 2077 2078 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr) 2079 { 2080 struct kvm_vcpu *vcpu; 2081 unsigned long i; 2082 2083 mpidr &= MPIDR_HWID_BITMASK; 2084 kvm_for_each_vcpu(i, vcpu, kvm) { 2085 if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu)) 2086 return vcpu; 2087 } 2088 return NULL; 2089 } 2090 2091 bool kvm_arch_has_irq_bypass(void) 2092 { 2093 return true; 2094 } 2095 2096 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 2097 struct irq_bypass_producer *prod) 2098 { 2099 struct kvm_kernel_irqfd *irqfd = 2100 container_of(cons, struct kvm_kernel_irqfd, consumer); 2101 2102 return kvm_vgic_v4_set_forwarding(irqfd->kvm, prod->irq, 2103 &irqfd->irq_entry); 2104 } 2105 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 2106 struct irq_bypass_producer *prod) 2107 { 2108 struct kvm_kernel_irqfd *irqfd = 2109 container_of(cons, struct kvm_kernel_irqfd, consumer); 2110 2111 kvm_vgic_v4_unset_forwarding(irqfd->kvm, prod->irq, 2112 &irqfd->irq_entry); 2113 } 2114 2115 void kvm_arch_irq_bypass_stop(struct irq_bypass_consumer *cons) 2116 { 2117 struct kvm_kernel_irqfd *irqfd = 2118 container_of(cons, struct kvm_kernel_irqfd, consumer); 2119 2120 kvm_arm_halt_guest(irqfd->kvm); 2121 } 2122 2123 void kvm_arch_irq_bypass_start(struct irq_bypass_consumer *cons) 2124 { 2125 struct kvm_kernel_irqfd *irqfd = 2126 container_of(cons, struct kvm_kernel_irqfd, consumer); 2127 2128 kvm_arm_resume_guest(irqfd->kvm); 2129 } 2130 2131 /** 2132 * Initialize Hyp-mode and memory mappings on all CPUs. 2133 */ 2134 int kvm_arch_init(void *opaque) 2135 { 2136 int err; 2137 bool in_hyp_mode; 2138 2139 if (!is_hyp_mode_available()) { 2140 kvm_info("HYP mode not available\n"); 2141 return -ENODEV; 2142 } 2143 2144 if (kvm_get_mode() == KVM_MODE_NONE) { 2145 kvm_info("KVM disabled from command line\n"); 2146 return -ENODEV; 2147 } 2148 2149 in_hyp_mode = is_kernel_in_hyp_mode(); 2150 2151 if (cpus_have_final_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || 2152 cpus_have_final_cap(ARM64_WORKAROUND_1508412)) 2153 kvm_info("Guests without required CPU erratum workarounds can deadlock system!\n" \ 2154 "Only trusted guests should be used on this system.\n"); 2155 2156 err = kvm_set_ipa_limit(); 2157 if (err) 2158 return err; 2159 2160 err = kvm_arm_init_sve(); 2161 if (err) 2162 return err; 2163 2164 if (!in_hyp_mode) { 2165 err = init_hyp_mode(); 2166 if (err) 2167 goto out_err; 2168 } 2169 2170 err = kvm_init_vector_slots(); 2171 if (err) { 2172 kvm_err("Cannot initialise vector slots\n"); 2173 goto out_err; 2174 } 2175 2176 err = init_subsystems(); 2177 if (err) 2178 goto out_hyp; 2179 2180 if (!in_hyp_mode) { 2181 err = finalize_hyp_mode(); 2182 if (err) { 2183 kvm_err("Failed to finalize Hyp protection\n"); 2184 goto out_hyp; 2185 } 2186 } 2187 2188 if (is_protected_kvm_enabled()) { 2189 kvm_info("Protected nVHE mode initialized successfully\n"); 2190 } else if (in_hyp_mode) { 2191 kvm_info("VHE mode initialized successfully\n"); 2192 } else { 2193 kvm_info("Hyp mode initialized successfully\n"); 2194 } 2195 2196 return 0; 2197 2198 out_hyp: 2199 hyp_cpu_pm_exit(); 2200 if (!in_hyp_mode) 2201 teardown_hyp_mode(); 2202 out_err: 2203 return err; 2204 } 2205 2206 /* NOP: Compiling as a module not supported */ 2207 void kvm_arch_exit(void) 2208 { 2209 kvm_unregister_perf_callbacks(); 2210 } 2211 2212 static int __init early_kvm_mode_cfg(char *arg) 2213 { 2214 if (!arg) 2215 return -EINVAL; 2216 2217 if (strcmp(arg, "protected") == 0) { 2218 kvm_mode = KVM_MODE_PROTECTED; 2219 return 0; 2220 } 2221 2222 if (strcmp(arg, "nvhe") == 0 && !WARN_ON(is_kernel_in_hyp_mode())) { 2223 kvm_mode = KVM_MODE_DEFAULT; 2224 return 0; 2225 } 2226 2227 if (strcmp(arg, "none") == 0) { 2228 kvm_mode = KVM_MODE_NONE; 2229 return 0; 2230 } 2231 2232 return -EINVAL; 2233 } 2234 early_param("kvm-arm.mode", early_kvm_mode_cfg); 2235 2236 enum kvm_mode kvm_get_mode(void) 2237 { 2238 return kvm_mode; 2239 } 2240 2241 static int arm_init(void) 2242 { 2243 int rc = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 2244 return rc; 2245 } 2246 2247 module_init(arm_init); 2248