1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 ARM Ltd. 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7 #include <linux/cpu.h> 8 #include <linux/kvm.h> 9 #include <linux/kvm_host.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/irqdomain.h> 13 #include <linux/uaccess.h> 14 15 #include <clocksource/arm_arch_timer.h> 16 #include <asm/arch_timer.h> 17 #include <asm/kvm_emulate.h> 18 #include <asm/kvm_hyp.h> 19 20 #include <kvm/arm_vgic.h> 21 #include <kvm/arm_arch_timer.h> 22 23 #include "trace.h" 24 25 static struct timecounter *timecounter; 26 static unsigned int host_vtimer_irq; 27 static unsigned int host_ptimer_irq; 28 static u32 host_vtimer_irq_flags; 29 static u32 host_ptimer_irq_flags; 30 31 static DEFINE_STATIC_KEY_FALSE(has_gic_active_state); 32 33 static const struct kvm_irq_level default_ptimer_irq = { 34 .irq = 30, 35 .level = 1, 36 }; 37 38 static const struct kvm_irq_level default_vtimer_irq = { 39 .irq = 27, 40 .level = 1, 41 }; 42 43 static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx); 44 static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, 45 struct arch_timer_context *timer_ctx); 46 static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx); 47 static void kvm_arm_timer_write(struct kvm_vcpu *vcpu, 48 struct arch_timer_context *timer, 49 enum kvm_arch_timer_regs treg, 50 u64 val); 51 static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu, 52 struct arch_timer_context *timer, 53 enum kvm_arch_timer_regs treg); 54 55 u32 timer_get_ctl(struct arch_timer_context *ctxt) 56 { 57 struct kvm_vcpu *vcpu = ctxt->vcpu; 58 59 switch(arch_timer_ctx_index(ctxt)) { 60 case TIMER_VTIMER: 61 return __vcpu_sys_reg(vcpu, CNTV_CTL_EL0); 62 case TIMER_PTIMER: 63 return __vcpu_sys_reg(vcpu, CNTP_CTL_EL0); 64 default: 65 WARN_ON(1); 66 return 0; 67 } 68 } 69 70 u64 timer_get_cval(struct arch_timer_context *ctxt) 71 { 72 struct kvm_vcpu *vcpu = ctxt->vcpu; 73 74 switch(arch_timer_ctx_index(ctxt)) { 75 case TIMER_VTIMER: 76 return __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); 77 case TIMER_PTIMER: 78 return __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); 79 default: 80 WARN_ON(1); 81 return 0; 82 } 83 } 84 85 static u64 timer_get_offset(struct arch_timer_context *ctxt) 86 { 87 struct kvm_vcpu *vcpu = ctxt->vcpu; 88 89 switch(arch_timer_ctx_index(ctxt)) { 90 case TIMER_VTIMER: 91 return __vcpu_sys_reg(vcpu, CNTVOFF_EL2); 92 default: 93 return 0; 94 } 95 } 96 97 static void timer_set_ctl(struct arch_timer_context *ctxt, u32 ctl) 98 { 99 struct kvm_vcpu *vcpu = ctxt->vcpu; 100 101 switch(arch_timer_ctx_index(ctxt)) { 102 case TIMER_VTIMER: 103 __vcpu_sys_reg(vcpu, CNTV_CTL_EL0) = ctl; 104 break; 105 case TIMER_PTIMER: 106 __vcpu_sys_reg(vcpu, CNTP_CTL_EL0) = ctl; 107 break; 108 default: 109 WARN_ON(1); 110 } 111 } 112 113 static void timer_set_cval(struct arch_timer_context *ctxt, u64 cval) 114 { 115 struct kvm_vcpu *vcpu = ctxt->vcpu; 116 117 switch(arch_timer_ctx_index(ctxt)) { 118 case TIMER_VTIMER: 119 __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0) = cval; 120 break; 121 case TIMER_PTIMER: 122 __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = cval; 123 break; 124 default: 125 WARN_ON(1); 126 } 127 } 128 129 static void timer_set_offset(struct arch_timer_context *ctxt, u64 offset) 130 { 131 struct kvm_vcpu *vcpu = ctxt->vcpu; 132 133 switch(arch_timer_ctx_index(ctxt)) { 134 case TIMER_VTIMER: 135 __vcpu_sys_reg(vcpu, CNTVOFF_EL2) = offset; 136 break; 137 default: 138 WARN(offset, "timer %ld\n", arch_timer_ctx_index(ctxt)); 139 } 140 } 141 142 u64 kvm_phys_timer_read(void) 143 { 144 return timecounter->cc->read(timecounter->cc); 145 } 146 147 static void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map) 148 { 149 if (has_vhe()) { 150 map->direct_vtimer = vcpu_vtimer(vcpu); 151 map->direct_ptimer = vcpu_ptimer(vcpu); 152 map->emul_ptimer = NULL; 153 } else { 154 map->direct_vtimer = vcpu_vtimer(vcpu); 155 map->direct_ptimer = NULL; 156 map->emul_ptimer = vcpu_ptimer(vcpu); 157 } 158 159 trace_kvm_get_timer_map(vcpu->vcpu_id, map); 160 } 161 162 static inline bool userspace_irqchip(struct kvm *kvm) 163 { 164 return static_branch_unlikely(&userspace_irqchip_in_use) && 165 unlikely(!irqchip_in_kernel(kvm)); 166 } 167 168 static void soft_timer_start(struct hrtimer *hrt, u64 ns) 169 { 170 hrtimer_start(hrt, ktime_add_ns(ktime_get(), ns), 171 HRTIMER_MODE_ABS_HARD); 172 } 173 174 static void soft_timer_cancel(struct hrtimer *hrt) 175 { 176 hrtimer_cancel(hrt); 177 } 178 179 static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id) 180 { 181 struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id; 182 struct arch_timer_context *ctx; 183 struct timer_map map; 184 185 /* 186 * We may see a timer interrupt after vcpu_put() has been called which 187 * sets the CPU's vcpu pointer to NULL, because even though the timer 188 * has been disabled in timer_save_state(), the hardware interrupt 189 * signal may not have been retired from the interrupt controller yet. 190 */ 191 if (!vcpu) 192 return IRQ_HANDLED; 193 194 get_timer_map(vcpu, &map); 195 196 if (irq == host_vtimer_irq) 197 ctx = map.direct_vtimer; 198 else 199 ctx = map.direct_ptimer; 200 201 if (kvm_timer_should_fire(ctx)) 202 kvm_timer_update_irq(vcpu, true, ctx); 203 204 if (userspace_irqchip(vcpu->kvm) && 205 !static_branch_unlikely(&has_gic_active_state)) 206 disable_percpu_irq(host_vtimer_irq); 207 208 return IRQ_HANDLED; 209 } 210 211 static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx) 212 { 213 u64 cval, now; 214 215 cval = timer_get_cval(timer_ctx); 216 now = kvm_phys_timer_read() - timer_get_offset(timer_ctx); 217 218 if (now < cval) { 219 u64 ns; 220 221 ns = cyclecounter_cyc2ns(timecounter->cc, 222 cval - now, 223 timecounter->mask, 224 &timecounter->frac); 225 return ns; 226 } 227 228 return 0; 229 } 230 231 static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx) 232 { 233 WARN_ON(timer_ctx && timer_ctx->loaded); 234 return timer_ctx && 235 ((timer_get_ctl(timer_ctx) & 236 (ARCH_TIMER_CTRL_IT_MASK | ARCH_TIMER_CTRL_ENABLE)) == ARCH_TIMER_CTRL_ENABLE); 237 } 238 239 /* 240 * Returns the earliest expiration time in ns among guest timers. 241 * Note that it will return 0 if none of timers can fire. 242 */ 243 static u64 kvm_timer_earliest_exp(struct kvm_vcpu *vcpu) 244 { 245 u64 min_delta = ULLONG_MAX; 246 int i; 247 248 for (i = 0; i < NR_KVM_TIMERS; i++) { 249 struct arch_timer_context *ctx = &vcpu->arch.timer_cpu.timers[i]; 250 251 WARN(ctx->loaded, "timer %d loaded\n", i); 252 if (kvm_timer_irq_can_fire(ctx)) 253 min_delta = min(min_delta, kvm_timer_compute_delta(ctx)); 254 } 255 256 /* If none of timers can fire, then return 0 */ 257 if (min_delta == ULLONG_MAX) 258 return 0; 259 260 return min_delta; 261 } 262 263 static enum hrtimer_restart kvm_bg_timer_expire(struct hrtimer *hrt) 264 { 265 struct arch_timer_cpu *timer; 266 struct kvm_vcpu *vcpu; 267 u64 ns; 268 269 timer = container_of(hrt, struct arch_timer_cpu, bg_timer); 270 vcpu = container_of(timer, struct kvm_vcpu, arch.timer_cpu); 271 272 /* 273 * Check that the timer has really expired from the guest's 274 * PoV (NTP on the host may have forced it to expire 275 * early). If we should have slept longer, restart it. 276 */ 277 ns = kvm_timer_earliest_exp(vcpu); 278 if (unlikely(ns)) { 279 hrtimer_forward_now(hrt, ns_to_ktime(ns)); 280 return HRTIMER_RESTART; 281 } 282 283 kvm_vcpu_wake_up(vcpu); 284 return HRTIMER_NORESTART; 285 } 286 287 static enum hrtimer_restart kvm_hrtimer_expire(struct hrtimer *hrt) 288 { 289 struct arch_timer_context *ctx; 290 struct kvm_vcpu *vcpu; 291 u64 ns; 292 293 ctx = container_of(hrt, struct arch_timer_context, hrtimer); 294 vcpu = ctx->vcpu; 295 296 trace_kvm_timer_hrtimer_expire(ctx); 297 298 /* 299 * Check that the timer has really expired from the guest's 300 * PoV (NTP on the host may have forced it to expire 301 * early). If not ready, schedule for a later time. 302 */ 303 ns = kvm_timer_compute_delta(ctx); 304 if (unlikely(ns)) { 305 hrtimer_forward_now(hrt, ns_to_ktime(ns)); 306 return HRTIMER_RESTART; 307 } 308 309 kvm_timer_update_irq(vcpu, true, ctx); 310 return HRTIMER_NORESTART; 311 } 312 313 static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx) 314 { 315 enum kvm_arch_timers index; 316 u64 cval, now; 317 318 if (!timer_ctx) 319 return false; 320 321 index = arch_timer_ctx_index(timer_ctx); 322 323 if (timer_ctx->loaded) { 324 u32 cnt_ctl = 0; 325 326 switch (index) { 327 case TIMER_VTIMER: 328 cnt_ctl = read_sysreg_el0(SYS_CNTV_CTL); 329 break; 330 case TIMER_PTIMER: 331 cnt_ctl = read_sysreg_el0(SYS_CNTP_CTL); 332 break; 333 case NR_KVM_TIMERS: 334 /* GCC is braindead */ 335 cnt_ctl = 0; 336 break; 337 } 338 339 return (cnt_ctl & ARCH_TIMER_CTRL_ENABLE) && 340 (cnt_ctl & ARCH_TIMER_CTRL_IT_STAT) && 341 !(cnt_ctl & ARCH_TIMER_CTRL_IT_MASK); 342 } 343 344 if (!kvm_timer_irq_can_fire(timer_ctx)) 345 return false; 346 347 cval = timer_get_cval(timer_ctx); 348 now = kvm_phys_timer_read() - timer_get_offset(timer_ctx); 349 350 return cval <= now; 351 } 352 353 bool kvm_timer_is_pending(struct kvm_vcpu *vcpu) 354 { 355 struct timer_map map; 356 357 get_timer_map(vcpu, &map); 358 359 return kvm_timer_should_fire(map.direct_vtimer) || 360 kvm_timer_should_fire(map.direct_ptimer) || 361 kvm_timer_should_fire(map.emul_ptimer); 362 } 363 364 /* 365 * Reflect the timer output level into the kvm_run structure 366 */ 367 void kvm_timer_update_run(struct kvm_vcpu *vcpu) 368 { 369 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 370 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu); 371 struct kvm_sync_regs *regs = &vcpu->run->s.regs; 372 373 /* Populate the device bitmap with the timer states */ 374 regs->device_irq_level &= ~(KVM_ARM_DEV_EL1_VTIMER | 375 KVM_ARM_DEV_EL1_PTIMER); 376 if (kvm_timer_should_fire(vtimer)) 377 regs->device_irq_level |= KVM_ARM_DEV_EL1_VTIMER; 378 if (kvm_timer_should_fire(ptimer)) 379 regs->device_irq_level |= KVM_ARM_DEV_EL1_PTIMER; 380 } 381 382 static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, 383 struct arch_timer_context *timer_ctx) 384 { 385 int ret; 386 387 timer_ctx->irq.level = new_level; 388 trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq, 389 timer_ctx->irq.level); 390 391 if (!userspace_irqchip(vcpu->kvm)) { 392 ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, 393 timer_ctx->irq.irq, 394 timer_ctx->irq.level, 395 timer_ctx); 396 WARN_ON(ret); 397 } 398 } 399 400 /* Only called for a fully emulated timer */ 401 static void timer_emulate(struct arch_timer_context *ctx) 402 { 403 bool should_fire = kvm_timer_should_fire(ctx); 404 405 trace_kvm_timer_emulate(ctx, should_fire); 406 407 if (should_fire != ctx->irq.level) { 408 kvm_timer_update_irq(ctx->vcpu, should_fire, ctx); 409 return; 410 } 411 412 /* 413 * If the timer can fire now, we don't need to have a soft timer 414 * scheduled for the future. If the timer cannot fire at all, 415 * then we also don't need a soft timer. 416 */ 417 if (!kvm_timer_irq_can_fire(ctx)) { 418 soft_timer_cancel(&ctx->hrtimer); 419 return; 420 } 421 422 soft_timer_start(&ctx->hrtimer, kvm_timer_compute_delta(ctx)); 423 } 424 425 static void timer_save_state(struct arch_timer_context *ctx) 426 { 427 struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu); 428 enum kvm_arch_timers index = arch_timer_ctx_index(ctx); 429 unsigned long flags; 430 431 if (!timer->enabled) 432 return; 433 434 local_irq_save(flags); 435 436 if (!ctx->loaded) 437 goto out; 438 439 switch (index) { 440 case TIMER_VTIMER: 441 timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTV_CTL)); 442 timer_set_cval(ctx, read_sysreg_el0(SYS_CNTV_CVAL)); 443 444 /* Disable the timer */ 445 write_sysreg_el0(0, SYS_CNTV_CTL); 446 isb(); 447 448 break; 449 case TIMER_PTIMER: 450 timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTP_CTL)); 451 timer_set_cval(ctx, read_sysreg_el0(SYS_CNTP_CVAL)); 452 453 /* Disable the timer */ 454 write_sysreg_el0(0, SYS_CNTP_CTL); 455 isb(); 456 457 break; 458 case NR_KVM_TIMERS: 459 BUG(); 460 } 461 462 trace_kvm_timer_save_state(ctx); 463 464 ctx->loaded = false; 465 out: 466 local_irq_restore(flags); 467 } 468 469 /* 470 * Schedule the background timer before calling kvm_vcpu_halt, so that this 471 * thread is removed from its waitqueue and made runnable when there's a timer 472 * interrupt to handle. 473 */ 474 static void kvm_timer_blocking(struct kvm_vcpu *vcpu) 475 { 476 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 477 struct timer_map map; 478 479 get_timer_map(vcpu, &map); 480 481 /* 482 * If no timers are capable of raising interrupts (disabled or 483 * masked), then there's no more work for us to do. 484 */ 485 if (!kvm_timer_irq_can_fire(map.direct_vtimer) && 486 !kvm_timer_irq_can_fire(map.direct_ptimer) && 487 !kvm_timer_irq_can_fire(map.emul_ptimer)) 488 return; 489 490 /* 491 * At least one guest time will expire. Schedule a background timer. 492 * Set the earliest expiration time among the guest timers. 493 */ 494 soft_timer_start(&timer->bg_timer, kvm_timer_earliest_exp(vcpu)); 495 } 496 497 static void kvm_timer_unblocking(struct kvm_vcpu *vcpu) 498 { 499 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 500 501 soft_timer_cancel(&timer->bg_timer); 502 } 503 504 static void timer_restore_state(struct arch_timer_context *ctx) 505 { 506 struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu); 507 enum kvm_arch_timers index = arch_timer_ctx_index(ctx); 508 unsigned long flags; 509 510 if (!timer->enabled) 511 return; 512 513 local_irq_save(flags); 514 515 if (ctx->loaded) 516 goto out; 517 518 switch (index) { 519 case TIMER_VTIMER: 520 write_sysreg_el0(timer_get_cval(ctx), SYS_CNTV_CVAL); 521 isb(); 522 write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTV_CTL); 523 break; 524 case TIMER_PTIMER: 525 write_sysreg_el0(timer_get_cval(ctx), SYS_CNTP_CVAL); 526 isb(); 527 write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTP_CTL); 528 break; 529 case NR_KVM_TIMERS: 530 BUG(); 531 } 532 533 trace_kvm_timer_restore_state(ctx); 534 535 ctx->loaded = true; 536 out: 537 local_irq_restore(flags); 538 } 539 540 static void set_cntvoff(u64 cntvoff) 541 { 542 kvm_call_hyp(__kvm_timer_set_cntvoff, cntvoff); 543 } 544 545 static inline void set_timer_irq_phys_active(struct arch_timer_context *ctx, bool active) 546 { 547 int r; 548 r = irq_set_irqchip_state(ctx->host_timer_irq, IRQCHIP_STATE_ACTIVE, active); 549 WARN_ON(r); 550 } 551 552 static void kvm_timer_vcpu_load_gic(struct arch_timer_context *ctx) 553 { 554 struct kvm_vcpu *vcpu = ctx->vcpu; 555 bool phys_active = false; 556 557 /* 558 * Update the timer output so that it is likely to match the 559 * state we're about to restore. If the timer expires between 560 * this point and the register restoration, we'll take the 561 * interrupt anyway. 562 */ 563 kvm_timer_update_irq(ctx->vcpu, kvm_timer_should_fire(ctx), ctx); 564 565 if (irqchip_in_kernel(vcpu->kvm)) 566 phys_active = kvm_vgic_map_is_active(vcpu, ctx->irq.irq); 567 568 phys_active |= ctx->irq.level; 569 570 set_timer_irq_phys_active(ctx, phys_active); 571 } 572 573 static void kvm_timer_vcpu_load_nogic(struct kvm_vcpu *vcpu) 574 { 575 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 576 577 /* 578 * Update the timer output so that it is likely to match the 579 * state we're about to restore. If the timer expires between 580 * this point and the register restoration, we'll take the 581 * interrupt anyway. 582 */ 583 kvm_timer_update_irq(vcpu, kvm_timer_should_fire(vtimer), vtimer); 584 585 /* 586 * When using a userspace irqchip with the architected timers and a 587 * host interrupt controller that doesn't support an active state, we 588 * must still prevent continuously exiting from the guest, and 589 * therefore mask the physical interrupt by disabling it on the host 590 * interrupt controller when the virtual level is high, such that the 591 * guest can make forward progress. Once we detect the output level 592 * being de-asserted, we unmask the interrupt again so that we exit 593 * from the guest when the timer fires. 594 */ 595 if (vtimer->irq.level) 596 disable_percpu_irq(host_vtimer_irq); 597 else 598 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags); 599 } 600 601 void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu) 602 { 603 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 604 struct timer_map map; 605 606 if (unlikely(!timer->enabled)) 607 return; 608 609 get_timer_map(vcpu, &map); 610 611 if (static_branch_likely(&has_gic_active_state)) { 612 kvm_timer_vcpu_load_gic(map.direct_vtimer); 613 if (map.direct_ptimer) 614 kvm_timer_vcpu_load_gic(map.direct_ptimer); 615 } else { 616 kvm_timer_vcpu_load_nogic(vcpu); 617 } 618 619 set_cntvoff(timer_get_offset(map.direct_vtimer)); 620 621 kvm_timer_unblocking(vcpu); 622 623 timer_restore_state(map.direct_vtimer); 624 if (map.direct_ptimer) 625 timer_restore_state(map.direct_ptimer); 626 627 if (map.emul_ptimer) 628 timer_emulate(map.emul_ptimer); 629 } 630 631 bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu) 632 { 633 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 634 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu); 635 struct kvm_sync_regs *sregs = &vcpu->run->s.regs; 636 bool vlevel, plevel; 637 638 if (likely(irqchip_in_kernel(vcpu->kvm))) 639 return false; 640 641 vlevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_VTIMER; 642 plevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_PTIMER; 643 644 return kvm_timer_should_fire(vtimer) != vlevel || 645 kvm_timer_should_fire(ptimer) != plevel; 646 } 647 648 void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu) 649 { 650 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 651 struct timer_map map; 652 653 if (unlikely(!timer->enabled)) 654 return; 655 656 get_timer_map(vcpu, &map); 657 658 timer_save_state(map.direct_vtimer); 659 if (map.direct_ptimer) 660 timer_save_state(map.direct_ptimer); 661 662 /* 663 * Cancel soft timer emulation, because the only case where we 664 * need it after a vcpu_put is in the context of a sleeping VCPU, and 665 * in that case we already factor in the deadline for the physical 666 * timer when scheduling the bg_timer. 667 * 668 * In any case, we re-schedule the hrtimer for the physical timer when 669 * coming back to the VCPU thread in kvm_timer_vcpu_load(). 670 */ 671 if (map.emul_ptimer) 672 soft_timer_cancel(&map.emul_ptimer->hrtimer); 673 674 if (kvm_vcpu_is_blocking(vcpu)) 675 kvm_timer_blocking(vcpu); 676 677 /* 678 * The kernel may decide to run userspace after calling vcpu_put, so 679 * we reset cntvoff to 0 to ensure a consistent read between user 680 * accesses to the virtual counter and kernel access to the physical 681 * counter of non-VHE case. For VHE, the virtual counter uses a fixed 682 * virtual offset of zero, so no need to zero CNTVOFF_EL2 register. 683 */ 684 set_cntvoff(0); 685 } 686 687 /* 688 * With a userspace irqchip we have to check if the guest de-asserted the 689 * timer and if so, unmask the timer irq signal on the host interrupt 690 * controller to ensure that we see future timer signals. 691 */ 692 static void unmask_vtimer_irq_user(struct kvm_vcpu *vcpu) 693 { 694 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 695 696 if (!kvm_timer_should_fire(vtimer)) { 697 kvm_timer_update_irq(vcpu, false, vtimer); 698 if (static_branch_likely(&has_gic_active_state)) 699 set_timer_irq_phys_active(vtimer, false); 700 else 701 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags); 702 } 703 } 704 705 void kvm_timer_sync_user(struct kvm_vcpu *vcpu) 706 { 707 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 708 709 if (unlikely(!timer->enabled)) 710 return; 711 712 if (unlikely(!irqchip_in_kernel(vcpu->kvm))) 713 unmask_vtimer_irq_user(vcpu); 714 } 715 716 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu) 717 { 718 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 719 struct timer_map map; 720 721 get_timer_map(vcpu, &map); 722 723 /* 724 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8 725 * and to 0 for ARMv7. We provide an implementation that always 726 * resets the timer to be disabled and unmasked and is compliant with 727 * the ARMv7 architecture. 728 */ 729 timer_set_ctl(vcpu_vtimer(vcpu), 0); 730 timer_set_ctl(vcpu_ptimer(vcpu), 0); 731 732 if (timer->enabled) { 733 kvm_timer_update_irq(vcpu, false, vcpu_vtimer(vcpu)); 734 kvm_timer_update_irq(vcpu, false, vcpu_ptimer(vcpu)); 735 736 if (irqchip_in_kernel(vcpu->kvm)) { 737 kvm_vgic_reset_mapped_irq(vcpu, map.direct_vtimer->irq.irq); 738 if (map.direct_ptimer) 739 kvm_vgic_reset_mapped_irq(vcpu, map.direct_ptimer->irq.irq); 740 } 741 } 742 743 if (map.emul_ptimer) 744 soft_timer_cancel(&map.emul_ptimer->hrtimer); 745 746 return 0; 747 } 748 749 /* Make the updates of cntvoff for all vtimer contexts atomic */ 750 static void update_vtimer_cntvoff(struct kvm_vcpu *vcpu, u64 cntvoff) 751 { 752 unsigned long i; 753 struct kvm *kvm = vcpu->kvm; 754 struct kvm_vcpu *tmp; 755 756 mutex_lock(&kvm->lock); 757 kvm_for_each_vcpu(i, tmp, kvm) 758 timer_set_offset(vcpu_vtimer(tmp), cntvoff); 759 760 /* 761 * When called from the vcpu create path, the CPU being created is not 762 * included in the loop above, so we just set it here as well. 763 */ 764 timer_set_offset(vcpu_vtimer(vcpu), cntvoff); 765 mutex_unlock(&kvm->lock); 766 } 767 768 void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) 769 { 770 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 771 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 772 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu); 773 774 vtimer->vcpu = vcpu; 775 ptimer->vcpu = vcpu; 776 777 /* Synchronize cntvoff across all vtimers of a VM. */ 778 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read()); 779 timer_set_offset(ptimer, 0); 780 781 hrtimer_init(&timer->bg_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); 782 timer->bg_timer.function = kvm_bg_timer_expire; 783 784 hrtimer_init(&vtimer->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); 785 hrtimer_init(&ptimer->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); 786 vtimer->hrtimer.function = kvm_hrtimer_expire; 787 ptimer->hrtimer.function = kvm_hrtimer_expire; 788 789 vtimer->irq.irq = default_vtimer_irq.irq; 790 ptimer->irq.irq = default_ptimer_irq.irq; 791 792 vtimer->host_timer_irq = host_vtimer_irq; 793 ptimer->host_timer_irq = host_ptimer_irq; 794 795 vtimer->host_timer_irq_flags = host_vtimer_irq_flags; 796 ptimer->host_timer_irq_flags = host_ptimer_irq_flags; 797 } 798 799 static void kvm_timer_init_interrupt(void *info) 800 { 801 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags); 802 enable_percpu_irq(host_ptimer_irq, host_ptimer_irq_flags); 803 } 804 805 int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value) 806 { 807 struct arch_timer_context *timer; 808 809 switch (regid) { 810 case KVM_REG_ARM_TIMER_CTL: 811 timer = vcpu_vtimer(vcpu); 812 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CTL, value); 813 break; 814 case KVM_REG_ARM_TIMER_CNT: 815 timer = vcpu_vtimer(vcpu); 816 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read() - value); 817 break; 818 case KVM_REG_ARM_TIMER_CVAL: 819 timer = vcpu_vtimer(vcpu); 820 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CVAL, value); 821 break; 822 case KVM_REG_ARM_PTIMER_CTL: 823 timer = vcpu_ptimer(vcpu); 824 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CTL, value); 825 break; 826 case KVM_REG_ARM_PTIMER_CVAL: 827 timer = vcpu_ptimer(vcpu); 828 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CVAL, value); 829 break; 830 831 default: 832 return -1; 833 } 834 835 return 0; 836 } 837 838 static u64 read_timer_ctl(struct arch_timer_context *timer) 839 { 840 /* 841 * Set ISTATUS bit if it's expired. 842 * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is 843 * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit 844 * regardless of ENABLE bit for our implementation convenience. 845 */ 846 u32 ctl = timer_get_ctl(timer); 847 848 if (!kvm_timer_compute_delta(timer)) 849 ctl |= ARCH_TIMER_CTRL_IT_STAT; 850 851 return ctl; 852 } 853 854 u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid) 855 { 856 switch (regid) { 857 case KVM_REG_ARM_TIMER_CTL: 858 return kvm_arm_timer_read(vcpu, 859 vcpu_vtimer(vcpu), TIMER_REG_CTL); 860 case KVM_REG_ARM_TIMER_CNT: 861 return kvm_arm_timer_read(vcpu, 862 vcpu_vtimer(vcpu), TIMER_REG_CNT); 863 case KVM_REG_ARM_TIMER_CVAL: 864 return kvm_arm_timer_read(vcpu, 865 vcpu_vtimer(vcpu), TIMER_REG_CVAL); 866 case KVM_REG_ARM_PTIMER_CTL: 867 return kvm_arm_timer_read(vcpu, 868 vcpu_ptimer(vcpu), TIMER_REG_CTL); 869 case KVM_REG_ARM_PTIMER_CNT: 870 return kvm_arm_timer_read(vcpu, 871 vcpu_ptimer(vcpu), TIMER_REG_CNT); 872 case KVM_REG_ARM_PTIMER_CVAL: 873 return kvm_arm_timer_read(vcpu, 874 vcpu_ptimer(vcpu), TIMER_REG_CVAL); 875 } 876 return (u64)-1; 877 } 878 879 static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu, 880 struct arch_timer_context *timer, 881 enum kvm_arch_timer_regs treg) 882 { 883 u64 val; 884 885 switch (treg) { 886 case TIMER_REG_TVAL: 887 val = timer_get_cval(timer) - kvm_phys_timer_read() + timer_get_offset(timer); 888 val = lower_32_bits(val); 889 break; 890 891 case TIMER_REG_CTL: 892 val = read_timer_ctl(timer); 893 break; 894 895 case TIMER_REG_CVAL: 896 val = timer_get_cval(timer); 897 break; 898 899 case TIMER_REG_CNT: 900 val = kvm_phys_timer_read() - timer_get_offset(timer); 901 break; 902 903 default: 904 BUG(); 905 } 906 907 return val; 908 } 909 910 u64 kvm_arm_timer_read_sysreg(struct kvm_vcpu *vcpu, 911 enum kvm_arch_timers tmr, 912 enum kvm_arch_timer_regs treg) 913 { 914 u64 val; 915 916 preempt_disable(); 917 kvm_timer_vcpu_put(vcpu); 918 919 val = kvm_arm_timer_read(vcpu, vcpu_get_timer(vcpu, tmr), treg); 920 921 kvm_timer_vcpu_load(vcpu); 922 preempt_enable(); 923 924 return val; 925 } 926 927 static void kvm_arm_timer_write(struct kvm_vcpu *vcpu, 928 struct arch_timer_context *timer, 929 enum kvm_arch_timer_regs treg, 930 u64 val) 931 { 932 switch (treg) { 933 case TIMER_REG_TVAL: 934 timer_set_cval(timer, kvm_phys_timer_read() - timer_get_offset(timer) + (s32)val); 935 break; 936 937 case TIMER_REG_CTL: 938 timer_set_ctl(timer, val & ~ARCH_TIMER_CTRL_IT_STAT); 939 break; 940 941 case TIMER_REG_CVAL: 942 timer_set_cval(timer, val); 943 break; 944 945 default: 946 BUG(); 947 } 948 } 949 950 void kvm_arm_timer_write_sysreg(struct kvm_vcpu *vcpu, 951 enum kvm_arch_timers tmr, 952 enum kvm_arch_timer_regs treg, 953 u64 val) 954 { 955 preempt_disable(); 956 kvm_timer_vcpu_put(vcpu); 957 958 kvm_arm_timer_write(vcpu, vcpu_get_timer(vcpu, tmr), treg, val); 959 960 kvm_timer_vcpu_load(vcpu); 961 preempt_enable(); 962 } 963 964 static int kvm_timer_starting_cpu(unsigned int cpu) 965 { 966 kvm_timer_init_interrupt(NULL); 967 return 0; 968 } 969 970 static int kvm_timer_dying_cpu(unsigned int cpu) 971 { 972 disable_percpu_irq(host_vtimer_irq); 973 return 0; 974 } 975 976 static int timer_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) 977 { 978 if (vcpu) 979 irqd_set_forwarded_to_vcpu(d); 980 else 981 irqd_clr_forwarded_to_vcpu(d); 982 983 return 0; 984 } 985 986 static int timer_irq_set_irqchip_state(struct irq_data *d, 987 enum irqchip_irq_state which, bool val) 988 { 989 if (which != IRQCHIP_STATE_ACTIVE || !irqd_is_forwarded_to_vcpu(d)) 990 return irq_chip_set_parent_state(d, which, val); 991 992 if (val) 993 irq_chip_mask_parent(d); 994 else 995 irq_chip_unmask_parent(d); 996 997 return 0; 998 } 999 1000 static void timer_irq_eoi(struct irq_data *d) 1001 { 1002 if (!irqd_is_forwarded_to_vcpu(d)) 1003 irq_chip_eoi_parent(d); 1004 } 1005 1006 static void timer_irq_ack(struct irq_data *d) 1007 { 1008 d = d->parent_data; 1009 if (d->chip->irq_ack) 1010 d->chip->irq_ack(d); 1011 } 1012 1013 static struct irq_chip timer_chip = { 1014 .name = "KVM", 1015 .irq_ack = timer_irq_ack, 1016 .irq_mask = irq_chip_mask_parent, 1017 .irq_unmask = irq_chip_unmask_parent, 1018 .irq_eoi = timer_irq_eoi, 1019 .irq_set_type = irq_chip_set_type_parent, 1020 .irq_set_vcpu_affinity = timer_irq_set_vcpu_affinity, 1021 .irq_set_irqchip_state = timer_irq_set_irqchip_state, 1022 }; 1023 1024 static int timer_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1025 unsigned int nr_irqs, void *arg) 1026 { 1027 irq_hw_number_t hwirq = (uintptr_t)arg; 1028 1029 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, 1030 &timer_chip, NULL); 1031 } 1032 1033 static void timer_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1034 unsigned int nr_irqs) 1035 { 1036 } 1037 1038 static const struct irq_domain_ops timer_domain_ops = { 1039 .alloc = timer_irq_domain_alloc, 1040 .free = timer_irq_domain_free, 1041 }; 1042 1043 static struct irq_ops arch_timer_irq_ops = { 1044 .get_input_level = kvm_arch_timer_get_input_level, 1045 }; 1046 1047 static void kvm_irq_fixup_flags(unsigned int virq, u32 *flags) 1048 { 1049 *flags = irq_get_trigger_type(virq); 1050 if (*flags != IRQF_TRIGGER_HIGH && *flags != IRQF_TRIGGER_LOW) { 1051 kvm_err("Invalid trigger for timer IRQ%d, assuming level low\n", 1052 virq); 1053 *flags = IRQF_TRIGGER_LOW; 1054 } 1055 } 1056 1057 static int kvm_irq_init(struct arch_timer_kvm_info *info) 1058 { 1059 struct irq_domain *domain = NULL; 1060 1061 if (info->virtual_irq <= 0) { 1062 kvm_err("kvm_arch_timer: invalid virtual timer IRQ: %d\n", 1063 info->virtual_irq); 1064 return -ENODEV; 1065 } 1066 1067 host_vtimer_irq = info->virtual_irq; 1068 kvm_irq_fixup_flags(host_vtimer_irq, &host_vtimer_irq_flags); 1069 1070 if (kvm_vgic_global_state.no_hw_deactivation) { 1071 struct fwnode_handle *fwnode; 1072 struct irq_data *data; 1073 1074 fwnode = irq_domain_alloc_named_fwnode("kvm-timer"); 1075 if (!fwnode) 1076 return -ENOMEM; 1077 1078 /* Assume both vtimer and ptimer in the same parent */ 1079 data = irq_get_irq_data(host_vtimer_irq); 1080 domain = irq_domain_create_hierarchy(data->domain, 0, 1081 NR_KVM_TIMERS, fwnode, 1082 &timer_domain_ops, NULL); 1083 if (!domain) { 1084 irq_domain_free_fwnode(fwnode); 1085 return -ENOMEM; 1086 } 1087 1088 arch_timer_irq_ops.flags |= VGIC_IRQ_SW_RESAMPLE; 1089 WARN_ON(irq_domain_push_irq(domain, host_vtimer_irq, 1090 (void *)TIMER_VTIMER)); 1091 } 1092 1093 if (info->physical_irq > 0) { 1094 host_ptimer_irq = info->physical_irq; 1095 kvm_irq_fixup_flags(host_ptimer_irq, &host_ptimer_irq_flags); 1096 1097 if (domain) 1098 WARN_ON(irq_domain_push_irq(domain, host_ptimer_irq, 1099 (void *)TIMER_PTIMER)); 1100 } 1101 1102 return 0; 1103 } 1104 1105 int kvm_timer_hyp_init(bool has_gic) 1106 { 1107 struct arch_timer_kvm_info *info; 1108 int err; 1109 1110 info = arch_timer_get_kvm_info(); 1111 timecounter = &info->timecounter; 1112 1113 if (!timecounter->cc) { 1114 kvm_err("kvm_arch_timer: uninitialized timecounter\n"); 1115 return -ENODEV; 1116 } 1117 1118 err = kvm_irq_init(info); 1119 if (err) 1120 return err; 1121 1122 /* First, do the virtual EL1 timer irq */ 1123 1124 err = request_percpu_irq(host_vtimer_irq, kvm_arch_timer_handler, 1125 "kvm guest vtimer", kvm_get_running_vcpus()); 1126 if (err) { 1127 kvm_err("kvm_arch_timer: can't request vtimer interrupt %d (%d)\n", 1128 host_vtimer_irq, err); 1129 return err; 1130 } 1131 1132 if (has_gic) { 1133 err = irq_set_vcpu_affinity(host_vtimer_irq, 1134 kvm_get_running_vcpus()); 1135 if (err) { 1136 kvm_err("kvm_arch_timer: error setting vcpu affinity\n"); 1137 goto out_free_irq; 1138 } 1139 1140 static_branch_enable(&has_gic_active_state); 1141 } 1142 1143 kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq); 1144 1145 /* Now let's do the physical EL1 timer irq */ 1146 1147 if (info->physical_irq > 0) { 1148 err = request_percpu_irq(host_ptimer_irq, kvm_arch_timer_handler, 1149 "kvm guest ptimer", kvm_get_running_vcpus()); 1150 if (err) { 1151 kvm_err("kvm_arch_timer: can't request ptimer interrupt %d (%d)\n", 1152 host_ptimer_irq, err); 1153 return err; 1154 } 1155 1156 if (has_gic) { 1157 err = irq_set_vcpu_affinity(host_ptimer_irq, 1158 kvm_get_running_vcpus()); 1159 if (err) { 1160 kvm_err("kvm_arch_timer: error setting vcpu affinity\n"); 1161 goto out_free_irq; 1162 } 1163 } 1164 1165 kvm_debug("physical timer IRQ%d\n", host_ptimer_irq); 1166 } else if (has_vhe()) { 1167 kvm_err("kvm_arch_timer: invalid physical timer IRQ: %d\n", 1168 info->physical_irq); 1169 err = -ENODEV; 1170 goto out_free_irq; 1171 } 1172 1173 cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING, 1174 "kvm/arm/timer:starting", kvm_timer_starting_cpu, 1175 kvm_timer_dying_cpu); 1176 return 0; 1177 out_free_irq: 1178 free_percpu_irq(host_vtimer_irq, kvm_get_running_vcpus()); 1179 return err; 1180 } 1181 1182 void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu) 1183 { 1184 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 1185 1186 soft_timer_cancel(&timer->bg_timer); 1187 } 1188 1189 static bool timer_irqs_are_valid(struct kvm_vcpu *vcpu) 1190 { 1191 int vtimer_irq, ptimer_irq, ret; 1192 unsigned long i; 1193 1194 vtimer_irq = vcpu_vtimer(vcpu)->irq.irq; 1195 ret = kvm_vgic_set_owner(vcpu, vtimer_irq, vcpu_vtimer(vcpu)); 1196 if (ret) 1197 return false; 1198 1199 ptimer_irq = vcpu_ptimer(vcpu)->irq.irq; 1200 ret = kvm_vgic_set_owner(vcpu, ptimer_irq, vcpu_ptimer(vcpu)); 1201 if (ret) 1202 return false; 1203 1204 kvm_for_each_vcpu(i, vcpu, vcpu->kvm) { 1205 if (vcpu_vtimer(vcpu)->irq.irq != vtimer_irq || 1206 vcpu_ptimer(vcpu)->irq.irq != ptimer_irq) 1207 return false; 1208 } 1209 1210 return true; 1211 } 1212 1213 bool kvm_arch_timer_get_input_level(int vintid) 1214 { 1215 struct kvm_vcpu *vcpu = kvm_get_running_vcpu(); 1216 struct arch_timer_context *timer; 1217 1218 if (vintid == vcpu_vtimer(vcpu)->irq.irq) 1219 timer = vcpu_vtimer(vcpu); 1220 else if (vintid == vcpu_ptimer(vcpu)->irq.irq) 1221 timer = vcpu_ptimer(vcpu); 1222 else 1223 BUG(); 1224 1225 return kvm_timer_should_fire(timer); 1226 } 1227 1228 int kvm_timer_enable(struct kvm_vcpu *vcpu) 1229 { 1230 struct arch_timer_cpu *timer = vcpu_timer(vcpu); 1231 struct timer_map map; 1232 int ret; 1233 1234 if (timer->enabled) 1235 return 0; 1236 1237 /* Without a VGIC we do not map virtual IRQs to physical IRQs */ 1238 if (!irqchip_in_kernel(vcpu->kvm)) 1239 goto no_vgic; 1240 1241 /* 1242 * At this stage, we have the guarantee that the vgic is both 1243 * available and initialized. 1244 */ 1245 if (!timer_irqs_are_valid(vcpu)) { 1246 kvm_debug("incorrectly configured timer irqs\n"); 1247 return -EINVAL; 1248 } 1249 1250 get_timer_map(vcpu, &map); 1251 1252 ret = kvm_vgic_map_phys_irq(vcpu, 1253 map.direct_vtimer->host_timer_irq, 1254 map.direct_vtimer->irq.irq, 1255 &arch_timer_irq_ops); 1256 if (ret) 1257 return ret; 1258 1259 if (map.direct_ptimer) { 1260 ret = kvm_vgic_map_phys_irq(vcpu, 1261 map.direct_ptimer->host_timer_irq, 1262 map.direct_ptimer->irq.irq, 1263 &arch_timer_irq_ops); 1264 } 1265 1266 if (ret) 1267 return ret; 1268 1269 no_vgic: 1270 timer->enabled = 1; 1271 return 0; 1272 } 1273 1274 /* 1275 * On VHE system, we only need to configure the EL2 timer trap register once, 1276 * not for every world switch. 1277 * The host kernel runs at EL2 with HCR_EL2.TGE == 1, 1278 * and this makes those bits have no effect for the host kernel execution. 1279 */ 1280 void kvm_timer_init_vhe(void) 1281 { 1282 /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */ 1283 u32 cnthctl_shift = 10; 1284 u64 val; 1285 1286 /* 1287 * VHE systems allow the guest direct access to the EL1 physical 1288 * timer/counter. 1289 */ 1290 val = read_sysreg(cnthctl_el2); 1291 val |= (CNTHCTL_EL1PCEN << cnthctl_shift); 1292 val |= (CNTHCTL_EL1PCTEN << cnthctl_shift); 1293 write_sysreg(val, cnthctl_el2); 1294 } 1295 1296 static void set_timer_irqs(struct kvm *kvm, int vtimer_irq, int ptimer_irq) 1297 { 1298 struct kvm_vcpu *vcpu; 1299 unsigned long i; 1300 1301 kvm_for_each_vcpu(i, vcpu, kvm) { 1302 vcpu_vtimer(vcpu)->irq.irq = vtimer_irq; 1303 vcpu_ptimer(vcpu)->irq.irq = ptimer_irq; 1304 } 1305 } 1306 1307 int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) 1308 { 1309 int __user *uaddr = (int __user *)(long)attr->addr; 1310 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); 1311 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu); 1312 int irq; 1313 1314 if (!irqchip_in_kernel(vcpu->kvm)) 1315 return -EINVAL; 1316 1317 if (get_user(irq, uaddr)) 1318 return -EFAULT; 1319 1320 if (!(irq_is_ppi(irq))) 1321 return -EINVAL; 1322 1323 if (vcpu->arch.timer_cpu.enabled) 1324 return -EBUSY; 1325 1326 switch (attr->attr) { 1327 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER: 1328 set_timer_irqs(vcpu->kvm, irq, ptimer->irq.irq); 1329 break; 1330 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER: 1331 set_timer_irqs(vcpu->kvm, vtimer->irq.irq, irq); 1332 break; 1333 default: 1334 return -ENXIO; 1335 } 1336 1337 return 0; 1338 } 1339 1340 int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) 1341 { 1342 int __user *uaddr = (int __user *)(long)attr->addr; 1343 struct arch_timer_context *timer; 1344 int irq; 1345 1346 switch (attr->attr) { 1347 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER: 1348 timer = vcpu_vtimer(vcpu); 1349 break; 1350 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER: 1351 timer = vcpu_ptimer(vcpu); 1352 break; 1353 default: 1354 return -ENXIO; 1355 } 1356 1357 irq = timer->irq.irq; 1358 return put_user(irq, uaddr); 1359 } 1360 1361 int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) 1362 { 1363 switch (attr->attr) { 1364 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER: 1365 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER: 1366 return 0; 1367 } 1368 1369 return -ENXIO; 1370 } 1371