1 /* 2 * arch/arm64/kernel/topology.c 3 * 4 * Copyright (C) 2011,2013,2014 Linaro Limited. 5 * 6 * Based on the arm32 version written by Vincent Guittot in turn based on 7 * arch/sh/kernel/topology.c 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13 14 #include <linux/acpi.h> 15 #include <linux/arch_topology.h> 16 #include <linux/cacheinfo.h> 17 #include <linux/cpufreq.h> 18 #include <linux/cpu_smt.h> 19 #include <linux/init.h> 20 #include <linux/percpu.h> 21 #include <linux/sched/isolation.h> 22 #include <linux/xarray.h> 23 24 #include <asm/cpu.h> 25 #include <asm/cputype.h> 26 #include <asm/topology.h> 27 28 #ifdef CONFIG_ARM64_AMU_EXTN 29 #define read_corecnt() read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0) 30 #define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0) 31 #else 32 #define read_corecnt() (0UL) 33 #define read_constcnt() (0UL) 34 #endif 35 36 #undef pr_fmt 37 #define pr_fmt(fmt) "AMU: " fmt 38 39 /* 40 * Ensure that amu_scale_freq_tick() will return SCHED_CAPACITY_SCALE until 41 * the CPU capacity and its associated frequency have been correctly 42 * initialized. 43 */ 44 static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale) = 1UL << (2 * SCHED_CAPACITY_SHIFT); 45 static cpumask_var_t amu_fie_cpus; 46 47 struct amu_cntr_sample { 48 u64 arch_const_cycles_prev; 49 u64 arch_core_cycles_prev; 50 unsigned long last_scale_update; 51 }; 52 53 static DEFINE_PER_CPU_SHARED_ALIGNED(struct amu_cntr_sample, cpu_amu_samples); 54 55 void update_freq_counters_refs(void) 56 { 57 struct amu_cntr_sample *amu_sample = this_cpu_ptr(&cpu_amu_samples); 58 59 amu_sample->arch_core_cycles_prev = read_corecnt(); 60 amu_sample->arch_const_cycles_prev = read_constcnt(); 61 } 62 63 static inline bool freq_counters_valid(int cpu) 64 { 65 struct amu_cntr_sample *amu_sample = per_cpu_ptr(&cpu_amu_samples, cpu); 66 67 if ((cpu >= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask)) 68 return false; 69 70 if (!cpu_has_amu_feat(cpu)) { 71 pr_debug("CPU%d: counters are not supported.\n", cpu); 72 return false; 73 } 74 75 if (unlikely(!amu_sample->arch_const_cycles_prev || 76 !amu_sample->arch_core_cycles_prev)) { 77 pr_debug("CPU%d: cycle counters are not enabled.\n", cpu); 78 return false; 79 } 80 81 return true; 82 } 83 84 void freq_inv_set_max_ratio(int cpu, u64 max_rate) 85 { 86 u64 ratio, ref_rate = arch_timer_get_rate(); 87 88 if (unlikely(!max_rate || !ref_rate)) { 89 WARN_ONCE(1, "CPU%d: invalid maximum or reference frequency.\n", 90 cpu); 91 return; 92 } 93 94 /* 95 * Pre-compute the fixed ratio between the frequency of the constant 96 * reference counter and the maximum frequency of the CPU. 97 * 98 * ref_rate 99 * arch_max_freq_scale = ---------- * SCHED_CAPACITY_SCALE² 100 * max_rate 101 * 102 * We use a factor of 2 * SCHED_CAPACITY_SHIFT -> SCHED_CAPACITY_SCALE² 103 * in order to ensure a good resolution for arch_max_freq_scale for 104 * very low reference frequencies (down to the KHz range which should 105 * be unlikely). 106 */ 107 ratio = ref_rate << (2 * SCHED_CAPACITY_SHIFT); 108 ratio = div64_u64(ratio, max_rate); 109 if (!ratio) { 110 WARN_ONCE(1, "Reference frequency too low.\n"); 111 return; 112 } 113 114 WRITE_ONCE(per_cpu(arch_max_freq_scale, cpu), (unsigned long)ratio); 115 } 116 117 static void amu_scale_freq_tick(void) 118 { 119 struct amu_cntr_sample *amu_sample = this_cpu_ptr(&cpu_amu_samples); 120 u64 prev_core_cnt, prev_const_cnt; 121 u64 core_cnt, const_cnt, scale; 122 123 prev_const_cnt = amu_sample->arch_const_cycles_prev; 124 prev_core_cnt = amu_sample->arch_core_cycles_prev; 125 126 update_freq_counters_refs(); 127 128 const_cnt = amu_sample->arch_const_cycles_prev; 129 core_cnt = amu_sample->arch_core_cycles_prev; 130 131 /* 132 * This should not happen unless the AMUs have been reset and the 133 * counter values have not been restored - unlikely 134 */ 135 if (unlikely(core_cnt <= prev_core_cnt || 136 const_cnt <= prev_const_cnt)) 137 return; 138 139 /* 140 * /\core arch_max_freq_scale 141 * scale = ------- * -------------------- 142 * /\const SCHED_CAPACITY_SCALE 143 * 144 * See validate_cpu_freq_invariance_counters() for details on 145 * arch_max_freq_scale and the use of SCHED_CAPACITY_SHIFT. 146 */ 147 scale = core_cnt - prev_core_cnt; 148 scale *= this_cpu_read(arch_max_freq_scale); 149 scale = div64_u64(scale >> SCHED_CAPACITY_SHIFT, 150 const_cnt - prev_const_cnt); 151 152 scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE); 153 this_cpu_write(arch_freq_scale, (unsigned long)scale); 154 155 amu_sample->last_scale_update = jiffies; 156 } 157 158 static struct scale_freq_data amu_sfd = { 159 .source = SCALE_FREQ_SOURCE_ARCH, 160 .set_freq_scale = amu_scale_freq_tick, 161 }; 162 163 static __always_inline bool amu_fie_cpu_supported(unsigned int cpu) 164 { 165 return cpumask_available(amu_fie_cpus) && 166 cpumask_test_cpu(cpu, amu_fie_cpus); 167 } 168 169 void arch_cpu_idle_enter(void) 170 { 171 unsigned int cpu = smp_processor_id(); 172 173 if (!amu_fie_cpu_supported(cpu)) 174 return; 175 176 /* Kick in AMU update but only if one has not happened already */ 177 if (housekeeping_cpu(cpu, HK_TYPE_TICK) && 178 time_is_before_jiffies(per_cpu(cpu_amu_samples.last_scale_update, cpu))) 179 amu_scale_freq_tick(); 180 } 181 182 #define AMU_SAMPLE_EXP_MS 20 183 184 int arch_freq_get_on_cpu(int cpu) 185 { 186 struct amu_cntr_sample *amu_sample; 187 unsigned int start_cpu = cpu; 188 unsigned long last_update; 189 u64 scale; 190 191 if (!amu_fie_cpu_supported(cpu) || !arch_scale_freq_ref(cpu)) 192 return -EOPNOTSUPP; 193 194 while (1) { 195 196 amu_sample = per_cpu_ptr(&cpu_amu_samples, cpu); 197 198 last_update = amu_sample->last_scale_update; 199 200 /* 201 * For those CPUs that are in full dynticks mode, or those that have 202 * not seen tick for a while, try an alternative source for the counters 203 * (and thus freq scale), if available, for given policy: this boils 204 * down to identifying an active cpu within the same freq domain, if any. 205 */ 206 if (!housekeeping_cpu(cpu, HK_TYPE_TICK) || 207 time_is_before_jiffies(last_update + msecs_to_jiffies(AMU_SAMPLE_EXP_MS))) { 208 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); 209 int ref_cpu; 210 211 if (!policy) 212 return -EINVAL; 213 214 if (!cpumask_intersects(policy->related_cpus, 215 housekeeping_cpumask(HK_TYPE_TICK))) { 216 cpufreq_cpu_put(policy); 217 return -EOPNOTSUPP; 218 } 219 220 for_each_cpu_wrap(ref_cpu, policy->cpus, cpu + 1) { 221 if (ref_cpu == start_cpu) { 222 /* Prevent verifying same CPU twice */ 223 ref_cpu = nr_cpu_ids; 224 break; 225 } 226 if (!idle_cpu(ref_cpu)) 227 break; 228 } 229 230 cpufreq_cpu_put(policy); 231 232 if (ref_cpu >= nr_cpu_ids) 233 /* No alternative to pull info from */ 234 return -EAGAIN; 235 236 cpu = ref_cpu; 237 } else { 238 break; 239 } 240 } 241 /* 242 * Reversed computation to the one used to determine 243 * the arch_freq_scale value 244 * (see amu_scale_freq_tick for details) 245 */ 246 scale = arch_scale_freq_capacity(cpu); 247 248 return (scale * arch_scale_freq_ref(cpu)) >> SCHED_CAPACITY_SHIFT; 249 } 250 251 static void amu_fie_setup(const struct cpumask *cpus) 252 { 253 int cpu; 254 255 /* We are already set since the last insmod of cpufreq driver */ 256 if (cpumask_available(amu_fie_cpus) && 257 unlikely(cpumask_subset(cpus, amu_fie_cpus))) 258 return; 259 260 for_each_cpu(cpu, cpus) 261 if (!freq_counters_valid(cpu)) 262 return; 263 264 if (!cpumask_available(amu_fie_cpus) && 265 !zalloc_cpumask_var(&amu_fie_cpus, GFP_KERNEL)) { 266 WARN_ONCE(1, "Failed to allocate FIE cpumask for CPUs[%*pbl]\n", 267 cpumask_pr_args(cpus)); 268 return; 269 } 270 271 cpumask_or(amu_fie_cpus, amu_fie_cpus, cpus); 272 273 topology_set_scale_freq_source(&amu_sfd, cpus); 274 275 pr_debug("CPUs[%*pbl]: counters will be used for FIE.", 276 cpumask_pr_args(cpus)); 277 } 278 279 static int init_amu_fie_callback(struct notifier_block *nb, unsigned long val, 280 void *data) 281 { 282 struct cpufreq_policy *policy = data; 283 284 if (val == CPUFREQ_CREATE_POLICY) 285 amu_fie_setup(policy->cpus); 286 287 /* 288 * We don't need to handle CPUFREQ_REMOVE_POLICY event as the AMU 289 * counters don't have any dependency on cpufreq driver once we have 290 * initialized AMU support and enabled invariance. The AMU counters will 291 * keep on working just fine in the absence of the cpufreq driver, and 292 * for the CPUs for which there are no counters available, the last set 293 * value of arch_freq_scale will remain valid as that is the frequency 294 * those CPUs are running at. 295 */ 296 297 return 0; 298 } 299 300 static struct notifier_block init_amu_fie_notifier = { 301 .notifier_call = init_amu_fie_callback, 302 }; 303 304 static int cpuhp_topology_online(unsigned int cpu) 305 { 306 struct cpufreq_policy *policy = cpufreq_cpu_policy(cpu); 307 308 /* Those are cheap checks */ 309 310 /* 311 * Skip this CPU if: 312 * - it has no cpufreq policy assigned yet, 313 * - no policy exists that spans CPUs with AMU counters, or 314 * - it was already handled. 315 */ 316 if (unlikely(!policy) || !cpumask_available(amu_fie_cpus) || 317 cpumask_test_cpu(cpu, amu_fie_cpus)) 318 return 0; 319 320 /* 321 * Only proceed if all already-online CPUs in this policy 322 * support AMU counters. 323 */ 324 if (unlikely(!cpumask_subset(policy->cpus, amu_fie_cpus))) 325 return 0; 326 327 /* 328 * If the new online CPU cannot pass this check, all the CPUs related to 329 * the same policy should be clear from amu_fie_cpus mask, otherwise they 330 * may use different source of the freq scale. 331 */ 332 if (!freq_counters_valid(cpu)) { 333 topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_ARCH, 334 policy->related_cpus); 335 cpumask_andnot(amu_fie_cpus, amu_fie_cpus, policy->related_cpus); 336 return 0; 337 } 338 339 cpumask_set_cpu(cpu, amu_fie_cpus); 340 341 topology_set_scale_freq_source(&amu_sfd, cpumask_of(cpu)); 342 343 pr_debug("CPU[%u]: counter will be used for FIE.", cpu); 344 345 return 0; 346 } 347 348 static int __init init_amu_fie(void) 349 { 350 int ret; 351 352 ret = cpufreq_register_notifier(&init_amu_fie_notifier, 353 CPUFREQ_POLICY_NOTIFIER); 354 if (ret) 355 return ret; 356 357 ret = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, 358 "arm64/topology:online", 359 cpuhp_topology_online, 360 NULL); 361 if (ret < 0) { 362 cpufreq_unregister_notifier(&init_amu_fie_notifier, 363 CPUFREQ_POLICY_NOTIFIER); 364 return ret; 365 } 366 367 return 0; 368 } 369 core_initcall(init_amu_fie); 370 371 #ifdef CONFIG_ACPI_CPPC_LIB 372 #include <acpi/cppc_acpi.h> 373 374 struct amu_ffh_ctrs { 375 u64 corecnt; 376 u64 constcnt; 377 }; 378 379 enum cpc_ffh_ctr_id { 380 CPC_FFH_CTR_CORE = 0x0, 381 CPC_FFH_CTR_CONST = 0x1, 382 }; 383 384 static void cpu_read_corecnt(void *val) 385 { 386 /* 387 * A value of 0 can be returned if the current CPU does not support AMUs 388 * or if the counter is disabled for this CPU. A return value of 0 at 389 * counter read is properly handled as an error case by the users of the 390 * counter. 391 */ 392 *(u64 *)val = read_corecnt(); 393 } 394 395 static void cpu_read_constcnt(void *val) 396 { 397 /* 398 * Return 0 if the current CPU is affected by a HW erratum. 399 * A value of 0 is also returned if the current CPU does not 400 * support AMUs or if the counter is disabled. A return 401 * value of 0 at counter read is properly handled as an error 402 * case by the users of the counter. 403 */ 404 *(u64 *)val = this_cpu_has_cap(ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT) ? 405 0UL : read_constcnt(); 406 } 407 408 static inline 409 int counters_read_on_cpu(int cpu, smp_call_func_t func, void *val) 410 { 411 /* 412 * Abort call on counterless CPU. 413 */ 414 if (!cpu_has_amu_feat(cpu)) 415 return -EOPNOTSUPP; 416 417 if (irqs_disabled()) { 418 /* 419 * When IRQs are disabled (tick path: sched_tick -> 420 * topology_scale_freq_tick or cppc_scale_freq_tick), only local 421 * CPU counter reads are allowed. Remote CPU counter read would 422 * require smp_call_function_single() which is unsafe with IRQs 423 * disabled. 424 */ 425 if (WARN_ON_ONCE(cpu != smp_processor_id())) 426 return -EPERM; 427 func(val); 428 } else { 429 smp_call_function_single(cpu, func, val, 1); 430 } 431 432 return 0; 433 } 434 435 /* 436 * Refer to drivers/acpi/cppc_acpi.c for the description of the functions 437 * below. 438 */ 439 bool cpc_ffh_supported(void) 440 { 441 int cpu = get_cpu_with_amu_feat(); 442 443 /* 444 * FFH is considered supported if there is at least one present CPU that 445 * supports AMUs. Using FFH to read core and reference counters for CPUs 446 * that do not support AMUs, have counters disabled or that are affected 447 * by errata, will result in a return value of 0. 448 * 449 * This is done to allow any enabled and valid counters to be read 450 * through FFH, knowing that potentially returning 0 as counter value is 451 * properly handled by the users of these counters. 452 */ 453 if ((cpu >= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask)) 454 return false; 455 456 return true; 457 } 458 459 static void amu_read_core_const_ctrs(void *val) 460 { 461 struct amu_ffh_ctrs *ctrs = val; 462 463 /* 464 * cpu_read_constcnt() incurs slight latency due to the 465 * ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT check. 466 * Read it first to minimize the sampling skew between the const 467 * and core counters. 468 */ 469 cpu_read_constcnt(&ctrs->constcnt); 470 cpu_read_corecnt(&ctrs->corecnt); 471 } 472 473 static u64 cpc_ffh_extract_bits(const struct cpc_reg *reg, u64 val) 474 { 475 val &= GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, 476 reg->bit_offset); 477 val >>= reg->bit_offset; 478 479 return val; 480 } 481 482 static void cpc_ffh_ctr_value(const struct cpc_reg *reg, 483 const struct amu_ffh_ctrs *ctrs, u64 *val) 484 { 485 switch ((u64)reg->address) { 486 case CPC_FFH_CTR_CORE: 487 *val = ctrs->corecnt; 488 break; 489 case CPC_FFH_CTR_CONST: 490 *val = ctrs->constcnt; 491 break; 492 } 493 494 *val = cpc_ffh_extract_bits(reg, *val); 495 } 496 497 static bool is_amu_ctr_reg(const struct cpc_reg *reg) 498 { 499 return reg->address == CPC_FFH_CTR_CORE || 500 reg->address == CPC_FFH_CTR_CONST; 501 } 502 503 int cpc_read_ffh_fb_ctrs(int cpu, struct cpc_reg *reg1, u64 *val1, 504 struct cpc_reg *reg2, u64 *val2) 505 { 506 struct amu_ffh_ctrs ctrs; 507 int ret; 508 509 if (!is_amu_ctr_reg(reg1) || !is_amu_ctr_reg(reg2)) 510 return -EINVAL; 511 512 ret = counters_read_on_cpu(cpu, amu_read_core_const_ctrs, &ctrs); 513 if (ret) { 514 /* 515 * If AMU is unsupported (-EOPNOTSUPP), translate the error 516 * to -ENODEV. This explicitly tells the generic CPPC layer 517 * to abort immediately and avoid falling back to pointless 518 * single-counter reads. 519 */ 520 return ret == -EOPNOTSUPP ? -ENODEV : ret; 521 } 522 523 cpc_ffh_ctr_value(reg1, &ctrs, val1); 524 cpc_ffh_ctr_value(reg2, &ctrs, val2); 525 526 return 0; 527 } 528 529 int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val) 530 { 531 int ret = -EOPNOTSUPP; 532 533 switch ((u64)reg->address) { 534 case CPC_FFH_CTR_CORE: 535 ret = counters_read_on_cpu(cpu, cpu_read_corecnt, val); 536 break; 537 case CPC_FFH_CTR_CONST: 538 ret = counters_read_on_cpu(cpu, cpu_read_constcnt, val); 539 break; 540 } 541 542 if (!ret) 543 *val = cpc_ffh_extract_bits(reg, *val); 544 545 return ret; 546 } 547 548 int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) 549 { 550 return -EOPNOTSUPP; 551 } 552 #endif /* CONFIG_ACPI_CPPC_LIB */ 553