1 /* 2 * Spin Table SMP initialisation 3 * 4 * Copyright (C) 2013 ARM Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #include <linux/delay.h> 20 #include <linux/init.h> 21 #include <linux/of.h> 22 #include <linux/smp.h> 23 #include <linux/types.h> 24 25 #include <asm/cacheflush.h> 26 #include <asm/cpu_ops.h> 27 #include <asm/cputype.h> 28 #include <asm/io.h> 29 #include <asm/smp_plat.h> 30 31 extern void secondary_holding_pen(void); 32 volatile unsigned long secondary_holding_pen_release = INVALID_HWID; 33 34 static phys_addr_t cpu_release_addr[NR_CPUS]; 35 36 /* 37 * Write secondary_holding_pen_release in a way that is guaranteed to be 38 * visible to all observers, irrespective of whether they're taking part 39 * in coherency or not. This is necessary for the hotplug code to work 40 * reliably. 41 */ 42 static void write_pen_release(u64 val) 43 { 44 void *start = (void *)&secondary_holding_pen_release; 45 unsigned long size = sizeof(secondary_holding_pen_release); 46 47 secondary_holding_pen_release = val; 48 __flush_dcache_area(start, size); 49 } 50 51 52 static int smp_spin_table_cpu_init(unsigned int cpu) 53 { 54 struct device_node *dn; 55 56 dn = of_get_cpu_node(cpu, NULL); 57 if (!dn) 58 return -ENODEV; 59 60 /* 61 * Determine the address from which the CPU is polling. 62 */ 63 if (of_property_read_u64(dn, "cpu-release-addr", 64 &cpu_release_addr[cpu])) { 65 pr_err("CPU %d: missing or invalid cpu-release-addr property\n", 66 cpu); 67 68 return -1; 69 } 70 71 return 0; 72 } 73 74 static int smp_spin_table_cpu_prepare(unsigned int cpu) 75 { 76 __le64 __iomem *release_addr; 77 78 if (!cpu_release_addr[cpu]) 79 return -ENODEV; 80 81 /* 82 * The cpu-release-addr may or may not be inside the linear mapping. 83 * As ioremap_cache will either give us a new mapping or reuse the 84 * existing linear mapping, we can use it to cover both cases. In 85 * either case the memory will be MT_NORMAL. 86 */ 87 release_addr = ioremap_cache(cpu_release_addr[cpu], 88 sizeof(*release_addr)); 89 if (!release_addr) 90 return -ENOMEM; 91 92 /* 93 * We write the release address as LE regardless of the native 94 * endianess of the kernel. Therefore, any boot-loaders that 95 * read this address need to convert this address to the 96 * boot-loader's endianess before jumping. This is mandated by 97 * the boot protocol. 98 */ 99 writeq_relaxed(__pa(secondary_holding_pen), release_addr); 100 __flush_dcache_area((__force void *)release_addr, 101 sizeof(*release_addr)); 102 103 /* 104 * Send an event to wake up the secondary CPU. 105 */ 106 sev(); 107 108 iounmap(release_addr); 109 110 return 0; 111 } 112 113 static int smp_spin_table_cpu_boot(unsigned int cpu) 114 { 115 /* 116 * Update the pen release flag. 117 */ 118 write_pen_release(cpu_logical_map(cpu)); 119 120 /* 121 * Send an event, causing the secondaries to read pen_release. 122 */ 123 sev(); 124 125 return 0; 126 } 127 128 const struct cpu_operations smp_spin_table_ops = { 129 .name = "spin-table", 130 .cpu_init = smp_spin_table_cpu_init, 131 .cpu_prepare = smp_spin_table_cpu_prepare, 132 .cpu_boot = smp_spin_table_cpu_boot, 133 }; 134