xref: /linux/arch/arm64/kernel/smp.c (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 /*
2  * SMP initialisation and IPI support
3  * Based on arch/arm/kernel/smp.c
4  *
5  * Copyright (C) 2012 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/acpi.h>
21 #include <linux/arm_sdei.h>
22 #include <linux/delay.h>
23 #include <linux/init.h>
24 #include <linux/spinlock.h>
25 #include <linux/sched/mm.h>
26 #include <linux/sched/hotplug.h>
27 #include <linux/sched/task_stack.h>
28 #include <linux/interrupt.h>
29 #include <linux/cache.h>
30 #include <linux/profile.h>
31 #include <linux/errno.h>
32 #include <linux/mm.h>
33 #include <linux/err.h>
34 #include <linux/cpu.h>
35 #include <linux/smp.h>
36 #include <linux/seq_file.h>
37 #include <linux/irq.h>
38 #include <linux/percpu.h>
39 #include <linux/clockchips.h>
40 #include <linux/completion.h>
41 #include <linux/of.h>
42 #include <linux/irq_work.h>
43 #include <linux/kexec.h>
44 
45 #include <asm/alternative.h>
46 #include <asm/atomic.h>
47 #include <asm/cacheflush.h>
48 #include <asm/cpu.h>
49 #include <asm/cputype.h>
50 #include <asm/cpu_ops.h>
51 #include <asm/daifflags.h>
52 #include <asm/mmu_context.h>
53 #include <asm/numa.h>
54 #include <asm/pgtable.h>
55 #include <asm/pgalloc.h>
56 #include <asm/processor.h>
57 #include <asm/smp_plat.h>
58 #include <asm/sections.h>
59 #include <asm/tlbflush.h>
60 #include <asm/ptrace.h>
61 #include <asm/virt.h>
62 
63 #define CREATE_TRACE_POINTS
64 #include <trace/events/ipi.h>
65 
66 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
67 EXPORT_PER_CPU_SYMBOL(cpu_number);
68 
69 /*
70  * as from 2.5, kernels no longer have an init_tasks structure
71  * so we need some other way of telling a new secondary core
72  * where to place its SVC stack
73  */
74 struct secondary_data secondary_data;
75 /* Number of CPUs which aren't online, but looping in kernel text. */
76 int cpus_stuck_in_kernel;
77 
78 enum ipi_msg_type {
79 	IPI_RESCHEDULE,
80 	IPI_CALL_FUNC,
81 	IPI_CPU_STOP,
82 	IPI_CPU_CRASH_STOP,
83 	IPI_TIMER,
84 	IPI_IRQ_WORK,
85 	IPI_WAKEUP
86 };
87 
88 #ifdef CONFIG_HOTPLUG_CPU
89 static int op_cpu_kill(unsigned int cpu);
90 #else
91 static inline int op_cpu_kill(unsigned int cpu)
92 {
93 	return -ENOSYS;
94 }
95 #endif
96 
97 
98 /*
99  * Boot a secondary CPU, and assign it the specified idle task.
100  * This also gives us the initial stack to use for this CPU.
101  */
102 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
103 {
104 	if (cpu_ops[cpu]->cpu_boot)
105 		return cpu_ops[cpu]->cpu_boot(cpu);
106 
107 	return -EOPNOTSUPP;
108 }
109 
110 static DECLARE_COMPLETION(cpu_running);
111 
112 int __cpu_up(unsigned int cpu, struct task_struct *idle)
113 {
114 	int ret;
115 	long status;
116 
117 	/*
118 	 * We need to tell the secondary core where to find its stack and the
119 	 * page tables.
120 	 */
121 	secondary_data.task = idle;
122 	secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
123 	update_cpu_boot_status(CPU_MMU_OFF);
124 	__flush_dcache_area(&secondary_data, sizeof(secondary_data));
125 
126 	/*
127 	 * Now bring the CPU into our world.
128 	 */
129 	ret = boot_secondary(cpu, idle);
130 	if (ret == 0) {
131 		/*
132 		 * CPU was successfully started, wait for it to come online or
133 		 * time out.
134 		 */
135 		wait_for_completion_timeout(&cpu_running,
136 					    msecs_to_jiffies(1000));
137 
138 		if (!cpu_online(cpu)) {
139 			pr_crit("CPU%u: failed to come online\n", cpu);
140 			ret = -EIO;
141 		}
142 	} else {
143 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
144 	}
145 
146 	secondary_data.task = NULL;
147 	secondary_data.stack = NULL;
148 	status = READ_ONCE(secondary_data.status);
149 	if (ret && status) {
150 
151 		if (status == CPU_MMU_OFF)
152 			status = READ_ONCE(__early_cpu_boot_status);
153 
154 		switch (status) {
155 		default:
156 			pr_err("CPU%u: failed in unknown state : 0x%lx\n",
157 					cpu, status);
158 			break;
159 		case CPU_KILL_ME:
160 			if (!op_cpu_kill(cpu)) {
161 				pr_crit("CPU%u: died during early boot\n", cpu);
162 				break;
163 			}
164 			/* Fall through */
165 			pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
166 		case CPU_STUCK_IN_KERNEL:
167 			pr_crit("CPU%u: is stuck in kernel\n", cpu);
168 			cpus_stuck_in_kernel++;
169 			break;
170 		case CPU_PANIC_KERNEL:
171 			panic("CPU%u detected unsupported configuration\n", cpu);
172 		}
173 	}
174 
175 	return ret;
176 }
177 
178 /*
179  * This is the secondary CPU boot entry.  We're using this CPUs
180  * idle thread stack, but a set of temporary page tables.
181  */
182 asmlinkage notrace void secondary_start_kernel(void)
183 {
184 	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
185 	struct mm_struct *mm = &init_mm;
186 	unsigned int cpu;
187 
188 	cpu = task_cpu(current);
189 	set_my_cpu_offset(per_cpu_offset(cpu));
190 
191 	/*
192 	 * All kernel threads share the same mm context; grab a
193 	 * reference and switch to it.
194 	 */
195 	mmgrab(mm);
196 	current->active_mm = mm;
197 
198 	/*
199 	 * TTBR0 is only used for the identity mapping at this stage. Make it
200 	 * point to zero page to avoid speculatively fetching new entries.
201 	 */
202 	cpu_uninstall_idmap();
203 
204 	preempt_disable();
205 	trace_hardirqs_off();
206 
207 	/*
208 	 * If the system has established the capabilities, make sure
209 	 * this CPU ticks all of those. If it doesn't, the CPU will
210 	 * fail to come online.
211 	 */
212 	check_local_cpu_capabilities();
213 
214 	if (cpu_ops[cpu]->cpu_postboot)
215 		cpu_ops[cpu]->cpu_postboot();
216 
217 	/*
218 	 * Log the CPU info before it is marked online and might get read.
219 	 */
220 	cpuinfo_store_cpu();
221 
222 	/*
223 	 * Enable GIC and timers.
224 	 */
225 	notify_cpu_starting(cpu);
226 
227 	store_cpu_topology(cpu);
228 
229 	/*
230 	 * OK, now it's safe to let the boot CPU continue.  Wait for
231 	 * the CPU migration code to notice that the CPU is online
232 	 * before we continue.
233 	 */
234 	pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
235 					 cpu, (unsigned long)mpidr,
236 					 read_cpuid_id());
237 	update_cpu_boot_status(CPU_BOOT_SUCCESS);
238 	set_cpu_online(cpu, true);
239 	complete(&cpu_running);
240 
241 	local_daif_restore(DAIF_PROCCTX);
242 
243 	/*
244 	 * OK, it's off to the idle thread for us
245 	 */
246 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
247 }
248 
249 #ifdef CONFIG_HOTPLUG_CPU
250 static int op_cpu_disable(unsigned int cpu)
251 {
252 	/*
253 	 * If we don't have a cpu_die method, abort before we reach the point
254 	 * of no return. CPU0 may not have an cpu_ops, so test for it.
255 	 */
256 	if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
257 		return -EOPNOTSUPP;
258 
259 	/*
260 	 * We may need to abort a hot unplug for some other mechanism-specific
261 	 * reason.
262 	 */
263 	if (cpu_ops[cpu]->cpu_disable)
264 		return cpu_ops[cpu]->cpu_disable(cpu);
265 
266 	return 0;
267 }
268 
269 /*
270  * __cpu_disable runs on the processor to be shutdown.
271  */
272 int __cpu_disable(void)
273 {
274 	unsigned int cpu = smp_processor_id();
275 	int ret;
276 
277 	ret = op_cpu_disable(cpu);
278 	if (ret)
279 		return ret;
280 
281 	/*
282 	 * Take this CPU offline.  Once we clear this, we can't return,
283 	 * and we must not schedule until we're ready to give up the cpu.
284 	 */
285 	set_cpu_online(cpu, false);
286 
287 	/*
288 	 * OK - migrate IRQs away from this CPU
289 	 */
290 	irq_migrate_all_off_this_cpu();
291 
292 	return 0;
293 }
294 
295 static int op_cpu_kill(unsigned int cpu)
296 {
297 	/*
298 	 * If we have no means of synchronising with the dying CPU, then assume
299 	 * that it is really dead. We can only wait for an arbitrary length of
300 	 * time and hope that it's dead, so let's skip the wait and just hope.
301 	 */
302 	if (!cpu_ops[cpu]->cpu_kill)
303 		return 0;
304 
305 	return cpu_ops[cpu]->cpu_kill(cpu);
306 }
307 
308 /*
309  * called on the thread which is asking for a CPU to be shutdown -
310  * waits until shutdown has completed, or it is timed out.
311  */
312 void __cpu_die(unsigned int cpu)
313 {
314 	int err;
315 
316 	if (!cpu_wait_death(cpu, 5)) {
317 		pr_crit("CPU%u: cpu didn't die\n", cpu);
318 		return;
319 	}
320 	pr_notice("CPU%u: shutdown\n", cpu);
321 
322 	/*
323 	 * Now that the dying CPU is beyond the point of no return w.r.t.
324 	 * in-kernel synchronisation, try to get the firwmare to help us to
325 	 * verify that it has really left the kernel before we consider
326 	 * clobbering anything it might still be using.
327 	 */
328 	err = op_cpu_kill(cpu);
329 	if (err)
330 		pr_warn("CPU%d may not have shut down cleanly: %d\n",
331 			cpu, err);
332 }
333 
334 /*
335  * Called from the idle thread for the CPU which has been shutdown.
336  *
337  */
338 void cpu_die(void)
339 {
340 	unsigned int cpu = smp_processor_id();
341 
342 	idle_task_exit();
343 
344 	local_daif_mask();
345 
346 	/* Tell __cpu_die() that this CPU is now safe to dispose of */
347 	(void)cpu_report_death();
348 
349 	/*
350 	 * Actually shutdown the CPU. This must never fail. The specific hotplug
351 	 * mechanism must perform all required cache maintenance to ensure that
352 	 * no dirty lines are lost in the process of shutting down the CPU.
353 	 */
354 	cpu_ops[cpu]->cpu_die(cpu);
355 
356 	BUG();
357 }
358 #endif
359 
360 /*
361  * Kill the calling secondary CPU, early in bringup before it is turned
362  * online.
363  */
364 void cpu_die_early(void)
365 {
366 	int cpu = smp_processor_id();
367 
368 	pr_crit("CPU%d: will not boot\n", cpu);
369 
370 	/* Mark this CPU absent */
371 	set_cpu_present(cpu, 0);
372 
373 #ifdef CONFIG_HOTPLUG_CPU
374 	update_cpu_boot_status(CPU_KILL_ME);
375 	/* Check if we can park ourselves */
376 	if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
377 		cpu_ops[cpu]->cpu_die(cpu);
378 #endif
379 	update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
380 
381 	cpu_park_loop();
382 }
383 
384 static void __init hyp_mode_check(void)
385 {
386 	if (is_hyp_mode_available())
387 		pr_info("CPU: All CPU(s) started at EL2\n");
388 	else if (is_hyp_mode_mismatched())
389 		WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
390 			   "CPU: CPUs started in inconsistent modes");
391 	else
392 		pr_info("CPU: All CPU(s) started at EL1\n");
393 }
394 
395 void __init smp_cpus_done(unsigned int max_cpus)
396 {
397 	pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
398 	setup_cpu_features();
399 	hyp_mode_check();
400 	apply_alternatives_all();
401 	mark_linear_text_alias_ro();
402 }
403 
404 void __init smp_prepare_boot_cpu(void)
405 {
406 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
407 	/*
408 	 * Initialise the static keys early as they may be enabled by the
409 	 * cpufeature code.
410 	 */
411 	jump_label_init();
412 	cpuinfo_store_boot_cpu();
413 }
414 
415 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
416 {
417 	const __be32 *cell;
418 	u64 hwid;
419 
420 	/*
421 	 * A cpu node with missing "reg" property is
422 	 * considered invalid to build a cpu_logical_map
423 	 * entry.
424 	 */
425 	cell = of_get_property(dn, "reg", NULL);
426 	if (!cell) {
427 		pr_err("%pOF: missing reg property\n", dn);
428 		return INVALID_HWID;
429 	}
430 
431 	hwid = of_read_number(cell, of_n_addr_cells(dn));
432 	/*
433 	 * Non affinity bits must be set to 0 in the DT
434 	 */
435 	if (hwid & ~MPIDR_HWID_BITMASK) {
436 		pr_err("%pOF: invalid reg property\n", dn);
437 		return INVALID_HWID;
438 	}
439 	return hwid;
440 }
441 
442 /*
443  * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
444  * entries and check for duplicates. If any is found just ignore the
445  * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
446  * matching valid MPIDR values.
447  */
448 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
449 {
450 	unsigned int i;
451 
452 	for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
453 		if (cpu_logical_map(i) == hwid)
454 			return true;
455 	return false;
456 }
457 
458 /*
459  * Initialize cpu operations for a logical cpu and
460  * set it in the possible mask on success
461  */
462 static int __init smp_cpu_setup(int cpu)
463 {
464 	if (cpu_read_ops(cpu))
465 		return -ENODEV;
466 
467 	if (cpu_ops[cpu]->cpu_init(cpu))
468 		return -ENODEV;
469 
470 	set_cpu_possible(cpu, true);
471 
472 	return 0;
473 }
474 
475 static bool bootcpu_valid __initdata;
476 static unsigned int cpu_count = 1;
477 
478 #ifdef CONFIG_ACPI
479 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
480 
481 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
482 {
483 	return &cpu_madt_gicc[cpu];
484 }
485 
486 /*
487  * acpi_map_gic_cpu_interface - parse processor MADT entry
488  *
489  * Carry out sanity checks on MADT processor entry and initialize
490  * cpu_logical_map on success
491  */
492 static void __init
493 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
494 {
495 	u64 hwid = processor->arm_mpidr;
496 
497 	if (!(processor->flags & ACPI_MADT_ENABLED)) {
498 		pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
499 		return;
500 	}
501 
502 	if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
503 		pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
504 		return;
505 	}
506 
507 	if (is_mpidr_duplicate(cpu_count, hwid)) {
508 		pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
509 		return;
510 	}
511 
512 	/* Check if GICC structure of boot CPU is available in the MADT */
513 	if (cpu_logical_map(0) == hwid) {
514 		if (bootcpu_valid) {
515 			pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
516 			       hwid);
517 			return;
518 		}
519 		bootcpu_valid = true;
520 		cpu_madt_gicc[0] = *processor;
521 		early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid));
522 		return;
523 	}
524 
525 	if (cpu_count >= NR_CPUS)
526 		return;
527 
528 	/* map the logical cpu id to cpu MPIDR */
529 	cpu_logical_map(cpu_count) = hwid;
530 
531 	cpu_madt_gicc[cpu_count] = *processor;
532 
533 	/*
534 	 * Set-up the ACPI parking protocol cpu entries
535 	 * while initializing the cpu_logical_map to
536 	 * avoid parsing MADT entries multiple times for
537 	 * nothing (ie a valid cpu_logical_map entry should
538 	 * contain a valid parking protocol data set to
539 	 * initialize the cpu if the parking protocol is
540 	 * the only available enable method).
541 	 */
542 	acpi_set_mailbox_entry(cpu_count, processor);
543 
544 	early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
545 
546 	cpu_count++;
547 }
548 
549 static int __init
550 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
551 			     const unsigned long end)
552 {
553 	struct acpi_madt_generic_interrupt *processor;
554 
555 	processor = (struct acpi_madt_generic_interrupt *)header;
556 	if (BAD_MADT_GICC_ENTRY(processor, end))
557 		return -EINVAL;
558 
559 	acpi_table_print_madt_entry(header);
560 
561 	acpi_map_gic_cpu_interface(processor);
562 
563 	return 0;
564 }
565 #else
566 #define acpi_table_parse_madt(...)	do { } while (0)
567 #endif
568 
569 /*
570  * Enumerate the possible CPU set from the device tree and build the
571  * cpu logical map array containing MPIDR values related to logical
572  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
573  */
574 static void __init of_parse_and_init_cpus(void)
575 {
576 	struct device_node *dn;
577 
578 	for_each_node_by_type(dn, "cpu") {
579 		u64 hwid = of_get_cpu_mpidr(dn);
580 
581 		if (hwid == INVALID_HWID)
582 			goto next;
583 
584 		if (is_mpidr_duplicate(cpu_count, hwid)) {
585 			pr_err("%pOF: duplicate cpu reg properties in the DT\n",
586 				dn);
587 			goto next;
588 		}
589 
590 		/*
591 		 * The numbering scheme requires that the boot CPU
592 		 * must be assigned logical id 0. Record it so that
593 		 * the logical map built from DT is validated and can
594 		 * be used.
595 		 */
596 		if (hwid == cpu_logical_map(0)) {
597 			if (bootcpu_valid) {
598 				pr_err("%pOF: duplicate boot cpu reg property in DT\n",
599 					dn);
600 				goto next;
601 			}
602 
603 			bootcpu_valid = true;
604 			early_map_cpu_to_node(0, of_node_to_nid(dn));
605 
606 			/*
607 			 * cpu_logical_map has already been
608 			 * initialized and the boot cpu doesn't need
609 			 * the enable-method so continue without
610 			 * incrementing cpu.
611 			 */
612 			continue;
613 		}
614 
615 		if (cpu_count >= NR_CPUS)
616 			goto next;
617 
618 		pr_debug("cpu logical map 0x%llx\n", hwid);
619 		cpu_logical_map(cpu_count) = hwid;
620 
621 		early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
622 next:
623 		cpu_count++;
624 	}
625 }
626 
627 /*
628  * Enumerate the possible CPU set from the device tree or ACPI and build the
629  * cpu logical map array containing MPIDR values related to logical
630  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
631  */
632 void __init smp_init_cpus(void)
633 {
634 	int i;
635 
636 	if (acpi_disabled)
637 		of_parse_and_init_cpus();
638 	else
639 		/*
640 		 * do a walk of MADT to determine how many CPUs
641 		 * we have including disabled CPUs, and get information
642 		 * we need for SMP init
643 		 */
644 		acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
645 				      acpi_parse_gic_cpu_interface, 0);
646 
647 	if (cpu_count > nr_cpu_ids)
648 		pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
649 			cpu_count, nr_cpu_ids);
650 
651 	if (!bootcpu_valid) {
652 		pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
653 		return;
654 	}
655 
656 	/*
657 	 * We need to set the cpu_logical_map entries before enabling
658 	 * the cpus so that cpu processor description entries (DT cpu nodes
659 	 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
660 	 * with entries in cpu_logical_map while initializing the cpus.
661 	 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
662 	 */
663 	for (i = 1; i < nr_cpu_ids; i++) {
664 		if (cpu_logical_map(i) != INVALID_HWID) {
665 			if (smp_cpu_setup(i))
666 				cpu_logical_map(i) = INVALID_HWID;
667 		}
668 	}
669 }
670 
671 void __init smp_prepare_cpus(unsigned int max_cpus)
672 {
673 	int err;
674 	unsigned int cpu;
675 	unsigned int this_cpu;
676 
677 	init_cpu_topology();
678 
679 	this_cpu = smp_processor_id();
680 	store_cpu_topology(this_cpu);
681 	numa_store_cpu_info(this_cpu);
682 
683 	/*
684 	 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
685 	 * secondary CPUs present.
686 	 */
687 	if (max_cpus == 0)
688 		return;
689 
690 	/*
691 	 * Initialise the present map (which describes the set of CPUs
692 	 * actually populated at the present time) and release the
693 	 * secondaries from the bootloader.
694 	 */
695 	for_each_possible_cpu(cpu) {
696 
697 		per_cpu(cpu_number, cpu) = cpu;
698 
699 		if (cpu == smp_processor_id())
700 			continue;
701 
702 		if (!cpu_ops[cpu])
703 			continue;
704 
705 		err = cpu_ops[cpu]->cpu_prepare(cpu);
706 		if (err)
707 			continue;
708 
709 		set_cpu_present(cpu, true);
710 		numa_store_cpu_info(cpu);
711 	}
712 }
713 
714 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
715 
716 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
717 {
718 	__smp_cross_call = fn;
719 }
720 
721 static const char *ipi_types[NR_IPI] __tracepoint_string = {
722 #define S(x,s)	[x] = s
723 	S(IPI_RESCHEDULE, "Rescheduling interrupts"),
724 	S(IPI_CALL_FUNC, "Function call interrupts"),
725 	S(IPI_CPU_STOP, "CPU stop interrupts"),
726 	S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
727 	S(IPI_TIMER, "Timer broadcast interrupts"),
728 	S(IPI_IRQ_WORK, "IRQ work interrupts"),
729 	S(IPI_WAKEUP, "CPU wake-up interrupts"),
730 };
731 
732 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
733 {
734 	trace_ipi_raise(target, ipi_types[ipinr]);
735 	__smp_cross_call(target, ipinr);
736 }
737 
738 void show_ipi_list(struct seq_file *p, int prec)
739 {
740 	unsigned int cpu, i;
741 
742 	for (i = 0; i < NR_IPI; i++) {
743 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
744 			   prec >= 4 ? " " : "");
745 		for_each_online_cpu(cpu)
746 			seq_printf(p, "%10u ",
747 				   __get_irq_stat(cpu, ipi_irqs[i]));
748 		seq_printf(p, "      %s\n", ipi_types[i]);
749 	}
750 }
751 
752 u64 smp_irq_stat_cpu(unsigned int cpu)
753 {
754 	u64 sum = 0;
755 	int i;
756 
757 	for (i = 0; i < NR_IPI; i++)
758 		sum += __get_irq_stat(cpu, ipi_irqs[i]);
759 
760 	return sum;
761 }
762 
763 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
764 {
765 	smp_cross_call(mask, IPI_CALL_FUNC);
766 }
767 
768 void arch_send_call_function_single_ipi(int cpu)
769 {
770 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
771 }
772 
773 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
774 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
775 {
776 	smp_cross_call(mask, IPI_WAKEUP);
777 }
778 #endif
779 
780 #ifdef CONFIG_IRQ_WORK
781 void arch_irq_work_raise(void)
782 {
783 	if (__smp_cross_call)
784 		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
785 }
786 #endif
787 
788 /*
789  * ipi_cpu_stop - handle IPI from smp_send_stop()
790  */
791 static void ipi_cpu_stop(unsigned int cpu)
792 {
793 	set_cpu_online(cpu, false);
794 
795 	local_daif_mask();
796 	sdei_mask_local_cpu();
797 
798 	while (1)
799 		cpu_relax();
800 }
801 
802 #ifdef CONFIG_KEXEC_CORE
803 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
804 #endif
805 
806 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
807 {
808 #ifdef CONFIG_KEXEC_CORE
809 	crash_save_cpu(regs, cpu);
810 
811 	atomic_dec(&waiting_for_crash_ipi);
812 
813 	local_irq_disable();
814 	sdei_mask_local_cpu();
815 
816 #ifdef CONFIG_HOTPLUG_CPU
817 	if (cpu_ops[cpu]->cpu_die)
818 		cpu_ops[cpu]->cpu_die(cpu);
819 #endif
820 
821 	/* just in case */
822 	cpu_park_loop();
823 #endif
824 }
825 
826 /*
827  * Main handler for inter-processor interrupts
828  */
829 void handle_IPI(int ipinr, struct pt_regs *regs)
830 {
831 	unsigned int cpu = smp_processor_id();
832 	struct pt_regs *old_regs = set_irq_regs(regs);
833 
834 	if ((unsigned)ipinr < NR_IPI) {
835 		trace_ipi_entry_rcuidle(ipi_types[ipinr]);
836 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);
837 	}
838 
839 	switch (ipinr) {
840 	case IPI_RESCHEDULE:
841 		scheduler_ipi();
842 		break;
843 
844 	case IPI_CALL_FUNC:
845 		irq_enter();
846 		generic_smp_call_function_interrupt();
847 		irq_exit();
848 		break;
849 
850 	case IPI_CPU_STOP:
851 		irq_enter();
852 		ipi_cpu_stop(cpu);
853 		irq_exit();
854 		break;
855 
856 	case IPI_CPU_CRASH_STOP:
857 		if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
858 			irq_enter();
859 			ipi_cpu_crash_stop(cpu, regs);
860 
861 			unreachable();
862 		}
863 		break;
864 
865 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
866 	case IPI_TIMER:
867 		irq_enter();
868 		tick_receive_broadcast();
869 		irq_exit();
870 		break;
871 #endif
872 
873 #ifdef CONFIG_IRQ_WORK
874 	case IPI_IRQ_WORK:
875 		irq_enter();
876 		irq_work_run();
877 		irq_exit();
878 		break;
879 #endif
880 
881 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
882 	case IPI_WAKEUP:
883 		WARN_ONCE(!acpi_parking_protocol_valid(cpu),
884 			  "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
885 			  cpu);
886 		break;
887 #endif
888 
889 	default:
890 		pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
891 		break;
892 	}
893 
894 	if ((unsigned)ipinr < NR_IPI)
895 		trace_ipi_exit_rcuidle(ipi_types[ipinr]);
896 	set_irq_regs(old_regs);
897 }
898 
899 void smp_send_reschedule(int cpu)
900 {
901 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
902 }
903 
904 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
905 void tick_broadcast(const struct cpumask *mask)
906 {
907 	smp_cross_call(mask, IPI_TIMER);
908 }
909 #endif
910 
911 void smp_send_stop(void)
912 {
913 	unsigned long timeout;
914 
915 	if (num_online_cpus() > 1) {
916 		cpumask_t mask;
917 
918 		cpumask_copy(&mask, cpu_online_mask);
919 		cpumask_clear_cpu(smp_processor_id(), &mask);
920 
921 		if (system_state <= SYSTEM_RUNNING)
922 			pr_crit("SMP: stopping secondary CPUs\n");
923 		smp_cross_call(&mask, IPI_CPU_STOP);
924 	}
925 
926 	/* Wait up to one second for other CPUs to stop */
927 	timeout = USEC_PER_SEC;
928 	while (num_online_cpus() > 1 && timeout--)
929 		udelay(1);
930 
931 	if (num_online_cpus() > 1)
932 		pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
933 			   cpumask_pr_args(cpu_online_mask));
934 
935 	sdei_mask_local_cpu();
936 }
937 
938 #ifdef CONFIG_KEXEC_CORE
939 void crash_smp_send_stop(void)
940 {
941 	static int cpus_stopped;
942 	cpumask_t mask;
943 	unsigned long timeout;
944 
945 	/*
946 	 * This function can be called twice in panic path, but obviously
947 	 * we execute this only once.
948 	 */
949 	if (cpus_stopped)
950 		return;
951 
952 	cpus_stopped = 1;
953 
954 	if (num_online_cpus() == 1) {
955 		sdei_mask_local_cpu();
956 		return;
957 	}
958 
959 	cpumask_copy(&mask, cpu_online_mask);
960 	cpumask_clear_cpu(smp_processor_id(), &mask);
961 
962 	atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
963 
964 	pr_crit("SMP: stopping secondary CPUs\n");
965 	smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
966 
967 	/* Wait up to one second for other CPUs to stop */
968 	timeout = USEC_PER_SEC;
969 	while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
970 		udelay(1);
971 
972 	if (atomic_read(&waiting_for_crash_ipi) > 0)
973 		pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
974 			   cpumask_pr_args(&mask));
975 
976 	sdei_mask_local_cpu();
977 }
978 
979 bool smp_crash_stop_failed(void)
980 {
981 	return (atomic_read(&waiting_for_crash_ipi) > 0);
982 }
983 #endif
984 
985 /*
986  * not supported here
987  */
988 int setup_profiling_timer(unsigned int multiplier)
989 {
990 	return -EINVAL;
991 }
992 
993 static bool have_cpu_die(void)
994 {
995 #ifdef CONFIG_HOTPLUG_CPU
996 	int any_cpu = raw_smp_processor_id();
997 
998 	if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
999 		return true;
1000 #endif
1001 	return false;
1002 }
1003 
1004 bool cpus_are_stuck_in_kernel(void)
1005 {
1006 	bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1007 
1008 	return !!cpus_stuck_in_kernel || smp_spin_tables;
1009 }
1010