1caab277bSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 253631b54SCatalin Marinas/* 353631b54SCatalin Marinas * FP/SIMD state saving and restoring 453631b54SCatalin Marinas * 553631b54SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 653631b54SCatalin Marinas * Author: Catalin Marinas <catalin.marinas@arm.com> 753631b54SCatalin Marinas */ 853631b54SCatalin Marinas 953631b54SCatalin Marinas#include <linux/linkage.h> 1053631b54SCatalin Marinas 1153631b54SCatalin Marinas#include <asm/assembler.h> 12cfc5180eSMarc Zyngier#include <asm/fpsimdmacros.h> 1353631b54SCatalin Marinas 1453631b54SCatalin Marinas/* 1553631b54SCatalin Marinas * Save the FP registers. 1653631b54SCatalin Marinas * 1753631b54SCatalin Marinas * x0 - pointer to struct fpsimd_state 1853631b54SCatalin Marinas */ 190343a7e4SMark BrownSYM_FUNC_START(fpsimd_save_state) 20cfc5180eSMarc Zyngier fpsimd_save x0, 8 2153631b54SCatalin Marinas ret 220343a7e4SMark BrownSYM_FUNC_END(fpsimd_save_state) 2353631b54SCatalin Marinas 2453631b54SCatalin Marinas/* 2553631b54SCatalin Marinas * Load the FP registers. 2653631b54SCatalin Marinas * 2753631b54SCatalin Marinas * x0 - pointer to struct fpsimd_state 2853631b54SCatalin Marinas */ 290343a7e4SMark BrownSYM_FUNC_START(fpsimd_load_state) 30cfc5180eSMarc Zyngier fpsimd_restore x0, 8 3153631b54SCatalin Marinas ret 320343a7e4SMark BrownSYM_FUNC_END(fpsimd_load_state) 331fc5dce7SDave Martin 341fc5dce7SDave Martin#ifdef CONFIG_ARM64_SVE 351e530f13SJulien Grall 360343a7e4SMark BrownSYM_FUNC_START(sve_save_state) 371fc5dce7SDave Martin sve_save 0, x1, 2 381fc5dce7SDave Martin ret 390343a7e4SMark BrownSYM_FUNC_END(sve_save_state) 401fc5dce7SDave Martin 410343a7e4SMark BrownSYM_FUNC_START(sve_load_state) 42159fd7b8SDave Martin sve_load 0, x1, x2, 3, x4 431fc5dce7SDave Martin ret 440343a7e4SMark BrownSYM_FUNC_END(sve_load_state) 451fc5dce7SDave Martin 460343a7e4SMark BrownSYM_FUNC_START(sve_get_vl) 471fc5dce7SDave Martin _sve_rdvl 0, 1 481fc5dce7SDave Martin ret 490343a7e4SMark BrownSYM_FUNC_END(sve_get_vl) 501e530f13SJulien Grall 51*cccb78ceSMark BrownSYM_FUNC_START(sve_set_vq) 52*cccb78ceSMark Brown sve_load_vq x0, x1, x2 53*cccb78ceSMark Brown ret 54*cccb78ceSMark BrownSYM_FUNC_END(sve_set_vq) 55*cccb78ceSMark Brown 569c4b4c70SJulien Grall/* 579c4b4c70SJulien Grall * Load SVE state from FPSIMD state. 589c4b4c70SJulien Grall * 599c4b4c70SJulien Grall * x0 = pointer to struct fpsimd_state 609c4b4c70SJulien Grall * x1 = VQ - 1 619c4b4c70SJulien Grall * 629c4b4c70SJulien Grall * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD 639c4b4c70SJulien Grall * and the rest zeroed. All the other SVE registers will be zeroed. 649c4b4c70SJulien Grall */ 659c4b4c70SJulien GrallSYM_FUNC_START(sve_load_from_fpsimd_state) 669c4b4c70SJulien Grall sve_load_vq x1, x2, x3 679c4b4c70SJulien Grall fpsimd_restore x0, 8 689c4b4c70SJulien Grall _for n, 0, 15, _sve_pfalse \n 699c4b4c70SJulien Grall _sve_wrffr 0 709c4b4c70SJulien Grall ret 719c4b4c70SJulien GrallSYM_FUNC_END(sve_load_from_fpsimd_state) 729c4b4c70SJulien Grall 731e530f13SJulien Grall/* Zero all SVE registers but the first 128-bits of each vector */ 741e530f13SJulien GrallSYM_FUNC_START(sve_flush_live) 751e530f13SJulien Grall sve_flush 761e530f13SJulien Grall ret 771e530f13SJulien GrallSYM_FUNC_END(sve_flush_live) 781e530f13SJulien Grall 791fc5dce7SDave Martin#endif /* CONFIG_ARM64_SVE */ 80