1caab277bSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 253631b54SCatalin Marinas/* 353631b54SCatalin Marinas * FP/SIMD state saving and restoring 453631b54SCatalin Marinas * 553631b54SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 653631b54SCatalin Marinas * Author: Catalin Marinas <catalin.marinas@arm.com> 753631b54SCatalin Marinas */ 853631b54SCatalin Marinas 953631b54SCatalin Marinas#include <linux/linkage.h> 1053631b54SCatalin Marinas 1153631b54SCatalin Marinas#include <asm/assembler.h> 12cfc5180eSMarc Zyngier#include <asm/fpsimdmacros.h> 1353631b54SCatalin Marinas 1453631b54SCatalin Marinas/* 1553631b54SCatalin Marinas * Save the FP registers. 1653631b54SCatalin Marinas * 1753631b54SCatalin Marinas * x0 - pointer to struct fpsimd_state 1853631b54SCatalin Marinas */ 190343a7e4SMark BrownSYM_FUNC_START(fpsimd_save_state) 20cfc5180eSMarc Zyngier fpsimd_save x0, 8 2153631b54SCatalin Marinas ret 220343a7e4SMark BrownSYM_FUNC_END(fpsimd_save_state) 2353631b54SCatalin Marinas 2453631b54SCatalin Marinas/* 2553631b54SCatalin Marinas * Load the FP registers. 2653631b54SCatalin Marinas * 2753631b54SCatalin Marinas * x0 - pointer to struct fpsimd_state 2853631b54SCatalin Marinas */ 290343a7e4SMark BrownSYM_FUNC_START(fpsimd_load_state) 30cfc5180eSMarc Zyngier fpsimd_restore x0, 8 3153631b54SCatalin Marinas ret 320343a7e4SMark BrownSYM_FUNC_END(fpsimd_load_state) 331fc5dce7SDave Martin 341fc5dce7SDave Martin#ifdef CONFIG_ARM64_SVE 351e530f13SJulien Grall 3638ee3c5eSMark Brown/* 3738ee3c5eSMark Brown * Save the SVE state 3838ee3c5eSMark Brown * 3938ee3c5eSMark Brown * x0 - pointer to buffer for state 4038ee3c5eSMark Brown * x1 - pointer to storage for FPSR 41*9f584866SMark Brown * x2 - Save FFR if non-zero 4238ee3c5eSMark Brown */ 430343a7e4SMark BrownSYM_FUNC_START(sve_save_state) 44*9f584866SMark Brown sve_save 0, x1, x2, 3 451fc5dce7SDave Martin ret 460343a7e4SMark BrownSYM_FUNC_END(sve_save_state) 471fc5dce7SDave Martin 4838ee3c5eSMark Brown/* 4938ee3c5eSMark Brown * Load the SVE state 5038ee3c5eSMark Brown * 5138ee3c5eSMark Brown * x0 - pointer to buffer for state 5238ee3c5eSMark Brown * x1 - pointer to storage for FPSR 53*9f584866SMark Brown * x2 - Restore FFR if non-zero 54*9f584866SMark Brown * x3 - VQ-1 5538ee3c5eSMark Brown */ 560343a7e4SMark BrownSYM_FUNC_START(sve_load_state) 57*9f584866SMark Brown sve_load 0, x1, x2, x3, 4, x5 581fc5dce7SDave Martin ret 590343a7e4SMark BrownSYM_FUNC_END(sve_load_state) 601fc5dce7SDave Martin 610343a7e4SMark BrownSYM_FUNC_START(sve_get_vl) 621fc5dce7SDave Martin _sve_rdvl 0, 1 631fc5dce7SDave Martin ret 640343a7e4SMark BrownSYM_FUNC_END(sve_get_vl) 651e530f13SJulien Grall 66cccb78ceSMark BrownSYM_FUNC_START(sve_set_vq) 67cccb78ceSMark Brown sve_load_vq x0, x1, x2 68cccb78ceSMark Brown ret 69cccb78ceSMark BrownSYM_FUNC_END(sve_set_vq) 70cccb78ceSMark Brown 719c4b4c70SJulien Grall/* 72ad4711f9SMark Brown * Zero all SVE registers but the first 128-bits of each vector 73ad4711f9SMark Brown * 74ad4711f9SMark Brown * VQ must already be configured by caller, any further updates of VQ 75ad4711f9SMark Brown * will need to ensure that the register state remains valid. 76ad4711f9SMark Brown * 77*9f584866SMark Brown * x0 = include FFR? 78*9f584866SMark Brown * x1 = VQ - 1 79ad4711f9SMark Brown */ 801e530f13SJulien GrallSYM_FUNC_START(sve_flush_live) 81*9f584866SMark Brown cbz x1, 1f // A VQ-1 of 0 is 128 bits so no extra Z state 82483dbf6aSMark Brown sve_flush_z 83*9f584866SMark Brown1: sve_flush_p 84*9f584866SMark Brown tbz x0, #0, 2f 85*9f584866SMark Brown sve_flush_ffr 86*9f584866SMark Brown2: ret 871e530f13SJulien GrallSYM_FUNC_END(sve_flush_live) 881e530f13SJulien Grall 891fc5dce7SDave Martin#endif /* CONFIG_ARM64_SVE */ 90