1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ARMv8 single-step debug support and mdscr context switching. 4 * 5 * Copyright (C) 2012 ARM Limited 6 * 7 * Author: Will Deacon <will.deacon@arm.com> 8 */ 9 10 #include <linux/cpu.h> 11 #include <linux/debugfs.h> 12 #include <linux/hardirq.h> 13 #include <linux/init.h> 14 #include <linux/ptrace.h> 15 #include <linux/kprobes.h> 16 #include <linux/stat.h> 17 #include <linux/uaccess.h> 18 #include <linux/sched/task_stack.h> 19 20 #include <asm/cpufeature.h> 21 #include <asm/cputype.h> 22 #include <asm/daifflags.h> 23 #include <asm/debug-monitors.h> 24 #include <asm/exception.h> 25 #include <asm/kgdb.h> 26 #include <asm/kprobes.h> 27 #include <asm/system_misc.h> 28 #include <asm/traps.h> 29 #include <asm/uprobes.h> 30 31 /* Determine debug architecture. */ 32 u8 debug_monitors_arch(void) 33 { 34 return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1), 35 ID_AA64DFR0_EL1_DebugVer_SHIFT); 36 } 37 38 /* 39 * MDSCR access routines. 40 */ 41 static void mdscr_write(u64 mdscr) 42 { 43 write_sysreg(mdscr, mdscr_el1); 44 } 45 NOKPROBE_SYMBOL(mdscr_write); 46 47 static u64 mdscr_read(void) 48 { 49 return read_sysreg(mdscr_el1); 50 } 51 NOKPROBE_SYMBOL(mdscr_read); 52 53 /* 54 * Allow root to disable self-hosted debug from userspace. 55 * This is useful if you want to connect an external JTAG debugger. 56 */ 57 static bool debug_enabled = true; 58 59 static int create_debug_debugfs_entry(void) 60 { 61 debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled); 62 return 0; 63 } 64 fs_initcall(create_debug_debugfs_entry); 65 66 static int __init early_debug_disable(char *buf) 67 { 68 debug_enabled = false; 69 return 0; 70 } 71 72 early_param("nodebugmon", early_debug_disable); 73 74 /* 75 * Keep track of debug users on each core. 76 * The ref counts are per-cpu so we use a local_t type. 77 */ 78 static DEFINE_PER_CPU(int, mde_ref_count); 79 static DEFINE_PER_CPU(int, kde_ref_count); 80 81 void enable_debug_monitors(enum dbg_active_el el) 82 { 83 u64 mdscr, enable = 0; 84 85 WARN_ON(preemptible()); 86 87 if (this_cpu_inc_return(mde_ref_count) == 1) 88 enable = MDSCR_EL1_MDE; 89 90 if (el == DBG_ACTIVE_EL1 && 91 this_cpu_inc_return(kde_ref_count) == 1) 92 enable |= MDSCR_EL1_KDE; 93 94 if (enable && debug_enabled) { 95 mdscr = mdscr_read(); 96 mdscr |= enable; 97 mdscr_write(mdscr); 98 } 99 } 100 NOKPROBE_SYMBOL(enable_debug_monitors); 101 102 void disable_debug_monitors(enum dbg_active_el el) 103 { 104 u64 mdscr, disable = 0; 105 106 WARN_ON(preemptible()); 107 108 if (this_cpu_dec_return(mde_ref_count) == 0) 109 disable = ~MDSCR_EL1_MDE; 110 111 if (el == DBG_ACTIVE_EL1 && 112 this_cpu_dec_return(kde_ref_count) == 0) 113 disable &= ~MDSCR_EL1_KDE; 114 115 if (disable) { 116 mdscr = mdscr_read(); 117 mdscr &= disable; 118 mdscr_write(mdscr); 119 } 120 } 121 NOKPROBE_SYMBOL(disable_debug_monitors); 122 123 /* 124 * OS lock clearing. 125 */ 126 static int clear_os_lock(unsigned int cpu) 127 { 128 write_sysreg(0, osdlr_el1); 129 write_sysreg(0, oslar_el1); 130 isb(); 131 return 0; 132 } 133 134 static int __init debug_monitors_init(void) 135 { 136 return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING, 137 "arm64/debug_monitors:starting", 138 clear_os_lock, NULL); 139 } 140 postcore_initcall(debug_monitors_init); 141 142 /* 143 * Single step API and exception handling. 144 */ 145 static void set_user_regs_spsr_ss(struct user_pt_regs *regs) 146 { 147 regs->pstate |= DBG_SPSR_SS; 148 } 149 NOKPROBE_SYMBOL(set_user_regs_spsr_ss); 150 151 static void clear_user_regs_spsr_ss(struct user_pt_regs *regs) 152 { 153 regs->pstate &= ~DBG_SPSR_SS; 154 } 155 NOKPROBE_SYMBOL(clear_user_regs_spsr_ss); 156 157 #define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs) 158 #define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs) 159 160 static void send_user_sigtrap(int si_code) 161 { 162 struct pt_regs *regs = current_pt_regs(); 163 164 if (WARN_ON(!user_mode(regs))) 165 return; 166 167 if (!regs_irqs_disabled(regs)) 168 local_irq_enable(); 169 170 arm64_force_sig_fault(SIGTRAP, si_code, instruction_pointer(regs), 171 "User debug trap"); 172 } 173 174 /* 175 * We have already unmasked interrupts and enabled preemption 176 * when calling do_el0_softstep() from entry-common.c. 177 */ 178 void do_el0_softstep(unsigned long esr, struct pt_regs *regs) 179 { 180 if (uprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED) 181 return; 182 183 send_user_sigtrap(TRAP_TRACE); 184 /* 185 * ptrace will disable single step unless explicitly 186 * asked to re-enable it. For other clients, it makes 187 * sense to leave it enabled (i.e. rewind the controls 188 * to the active-not-pending state). 189 */ 190 user_rewind_single_step(current); 191 } 192 193 void do_el1_softstep(unsigned long esr, struct pt_regs *regs) 194 { 195 if (kgdb_single_step_handler(regs, esr) == DBG_HOOK_HANDLED) 196 return; 197 198 pr_warn("Unexpected kernel single-step exception at EL1\n"); 199 /* 200 * Re-enable stepping since we know that we will be 201 * returning to regs. 202 */ 203 set_regs_spsr_ss(regs); 204 } 205 NOKPROBE_SYMBOL(do_el1_softstep); 206 207 static int call_el1_break_hook(struct pt_regs *regs, unsigned long esr) 208 { 209 if (esr_brk_comment(esr) == BUG_BRK_IMM) 210 return bug_brk_handler(regs, esr); 211 212 if (IS_ENABLED(CONFIG_CFI) && esr_is_cfi_brk(esr)) 213 return cfi_brk_handler(regs, esr); 214 215 if (esr_brk_comment(esr) == FAULT_BRK_IMM) 216 return reserved_fault_brk_handler(regs, esr); 217 218 if (IS_ENABLED(CONFIG_KASAN_SW_TAGS) && 219 (esr_brk_comment(esr) & ~KASAN_BRK_MASK) == KASAN_BRK_IMM) 220 return kasan_brk_handler(regs, esr); 221 222 if (IS_ENABLED(CONFIG_UBSAN_TRAP) && esr_is_ubsan_brk(esr)) 223 return ubsan_brk_handler(regs, esr); 224 225 if (IS_ENABLED(CONFIG_KGDB)) { 226 if (esr_brk_comment(esr) == KGDB_DYN_DBG_BRK_IMM) 227 return kgdb_brk_handler(regs, esr); 228 if (esr_brk_comment(esr) == KGDB_COMPILED_DBG_BRK_IMM) 229 return kgdb_compiled_brk_handler(regs, esr); 230 } 231 232 if (IS_ENABLED(CONFIG_KPROBES)) { 233 if (esr_brk_comment(esr) == KPROBES_BRK_IMM) 234 return kprobe_brk_handler(regs, esr); 235 if (esr_brk_comment(esr) == KPROBES_BRK_SS_IMM) 236 return kprobe_ss_brk_handler(regs, esr); 237 } 238 239 if (IS_ENABLED(CONFIG_KRETPROBES) && 240 esr_brk_comment(esr) == KRETPROBES_BRK_IMM) 241 return kretprobe_brk_handler(regs, esr); 242 243 return DBG_HOOK_ERROR; 244 } 245 NOKPROBE_SYMBOL(call_el1_break_hook); 246 247 /* 248 * We have already unmasked interrupts and enabled preemption 249 * when calling do_el0_brk64() from entry-common.c. 250 */ 251 void do_el0_brk64(unsigned long esr, struct pt_regs *regs) 252 { 253 if (IS_ENABLED(CONFIG_UPROBES) && 254 esr_brk_comment(esr) == UPROBES_BRK_IMM && 255 uprobe_brk_handler(regs, esr) == DBG_HOOK_HANDLED) 256 return; 257 258 send_user_sigtrap(TRAP_BRKPT); 259 } 260 261 void do_el1_brk64(unsigned long esr, struct pt_regs *regs) 262 { 263 if (call_el1_break_hook(regs, esr) == DBG_HOOK_HANDLED) 264 return; 265 266 die("Oops - BRK", regs, esr); 267 } 268 NOKPROBE_SYMBOL(do_el1_brk64); 269 270 #ifdef CONFIG_COMPAT 271 void do_bkpt32(unsigned long esr, struct pt_regs *regs) 272 { 273 arm64_notify_die("aarch32 BKPT", regs, SIGTRAP, TRAP_BRKPT, regs->pc, esr); 274 } 275 #endif /* CONFIG_COMPAT */ 276 277 bool try_handle_aarch32_break(struct pt_regs *regs) 278 { 279 u32 arm_instr; 280 u16 thumb_instr; 281 bool bp = false; 282 void __user *pc = (void __user *)instruction_pointer(regs); 283 284 if (!compat_user_mode(regs)) 285 return false; 286 287 if (compat_thumb_mode(regs)) { 288 /* get 16-bit Thumb instruction */ 289 __le16 instr; 290 get_user(instr, (__le16 __user *)pc); 291 thumb_instr = le16_to_cpu(instr); 292 if (thumb_instr == AARCH32_BREAK_THUMB2_LO) { 293 /* get second half of 32-bit Thumb-2 instruction */ 294 get_user(instr, (__le16 __user *)(pc + 2)); 295 thumb_instr = le16_to_cpu(instr); 296 bp = thumb_instr == AARCH32_BREAK_THUMB2_HI; 297 } else { 298 bp = thumb_instr == AARCH32_BREAK_THUMB; 299 } 300 } else { 301 /* 32-bit ARM instruction */ 302 __le32 instr; 303 get_user(instr, (__le32 __user *)pc); 304 arm_instr = le32_to_cpu(instr); 305 bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM; 306 } 307 308 if (!bp) 309 return false; 310 311 send_user_sigtrap(TRAP_BRKPT); 312 return true; 313 } 314 NOKPROBE_SYMBOL(try_handle_aarch32_break); 315 316 /* Re-enable single step for syscall restarting. */ 317 void user_rewind_single_step(struct task_struct *task) 318 { 319 /* 320 * If single step is active for this thread, then set SPSR.SS 321 * to 1 to avoid returning to the active-pending state. 322 */ 323 if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) 324 set_regs_spsr_ss(task_pt_regs(task)); 325 } 326 NOKPROBE_SYMBOL(user_rewind_single_step); 327 328 void user_fastforward_single_step(struct task_struct *task) 329 { 330 if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) 331 clear_regs_spsr_ss(task_pt_regs(task)); 332 } 333 334 void user_regs_reset_single_step(struct user_pt_regs *regs, 335 struct task_struct *task) 336 { 337 if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) 338 set_user_regs_spsr_ss(regs); 339 else 340 clear_user_regs_spsr_ss(regs); 341 } 342 343 /* Kernel API */ 344 void kernel_enable_single_step(struct pt_regs *regs) 345 { 346 WARN_ON(!irqs_disabled()); 347 set_regs_spsr_ss(regs); 348 mdscr_write(mdscr_read() | MDSCR_EL1_SS); 349 enable_debug_monitors(DBG_ACTIVE_EL1); 350 } 351 NOKPROBE_SYMBOL(kernel_enable_single_step); 352 353 void kernel_disable_single_step(void) 354 { 355 WARN_ON(!irqs_disabled()); 356 mdscr_write(mdscr_read() & ~MDSCR_EL1_SS); 357 disable_debug_monitors(DBG_ACTIVE_EL1); 358 } 359 NOKPROBE_SYMBOL(kernel_disable_single_step); 360 361 int kernel_active_single_step(void) 362 { 363 WARN_ON(!irqs_disabled()); 364 return mdscr_read() & MDSCR_EL1_SS; 365 } 366 NOKPROBE_SYMBOL(kernel_active_single_step); 367 368 void kernel_rewind_single_step(struct pt_regs *regs) 369 { 370 set_regs_spsr_ss(regs); 371 } 372 373 void kernel_fastforward_single_step(struct pt_regs *regs) 374 { 375 clear_regs_spsr_ss(regs); 376 } 377 378 /* ptrace API */ 379 void user_enable_single_step(struct task_struct *task) 380 { 381 struct thread_info *ti = task_thread_info(task); 382 383 if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP)) 384 set_regs_spsr_ss(task_pt_regs(task)); 385 } 386 NOKPROBE_SYMBOL(user_enable_single_step); 387 388 void user_disable_single_step(struct task_struct *task) 389 { 390 clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP); 391 } 392 NOKPROBE_SYMBOL(user_disable_single_step); 393