xref: /linux/arch/arm64/kernel/asm-offsets.c (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Based on arch/arm/kernel/asm-offsets.c
4  *
5  * Copyright (C) 1995-2003 Russell King
6  *               2001-2002 Keith Owens
7  * Copyright (C) 2012 ARM Ltd.
8  */
9 
10 #include <linux/arm_sdei.h>
11 #include <linux/sched.h>
12 #include <linux/kexec.h>
13 #include <linux/mm.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/kvm_host.h>
16 #include <linux/preempt.h>
17 #include <linux/suspend.h>
18 #include <asm/cpufeature.h>
19 #include <asm/fixmap.h>
20 #include <asm/thread_info.h>
21 #include <asm/memory.h>
22 #include <asm/signal32.h>
23 #include <asm/smp_plat.h>
24 #include <asm/suspend.h>
25 #include <linux/kbuild.h>
26 #include <linux/arm-smccc.h>
27 
28 int main(void)
29 {
30   DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
31   BLANK();
32   DEFINE(TSK_TI_CPU,		offsetof(struct task_struct, thread_info.cpu));
33   DEFINE(TSK_TI_FLAGS,		offsetof(struct task_struct, thread_info.flags));
34   DEFINE(TSK_TI_PREEMPT,	offsetof(struct task_struct, thread_info.preempt_count));
35 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
36   DEFINE(TSK_TI_TTBR0,		offsetof(struct task_struct, thread_info.ttbr0));
37 #endif
38 #ifdef CONFIG_SHADOW_CALL_STACK
39   DEFINE(TSK_TI_SCS_BASE,	offsetof(struct task_struct, thread_info.scs_base));
40   DEFINE(TSK_TI_SCS_SP,		offsetof(struct task_struct, thread_info.scs_sp));
41 #endif
42   DEFINE(TSK_STACK,		offsetof(struct task_struct, stack));
43 #ifdef CONFIG_STACKPROTECTOR
44   DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
45 #endif
46   BLANK();
47   DEFINE(THREAD_CPU_CONTEXT,	offsetof(struct task_struct, thread.cpu_context));
48   DEFINE(THREAD_SCTLR_USER,	offsetof(struct task_struct, thread.sctlr_user));
49 #ifdef CONFIG_ARM64_PTR_AUTH
50   DEFINE(THREAD_KEYS_USER,	offsetof(struct task_struct, thread.keys_user));
51 #endif
52 #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
53   DEFINE(THREAD_KEYS_KERNEL,	offsetof(struct task_struct, thread.keys_kernel));
54 #endif
55 #ifdef CONFIG_ARM64_MTE
56   DEFINE(THREAD_MTE_CTRL,	offsetof(struct task_struct, thread.mte_ctrl));
57 #endif
58   BLANK();
59   DEFINE(S_X0,			offsetof(struct pt_regs, regs[0]));
60   DEFINE(S_X2,			offsetof(struct pt_regs, regs[2]));
61   DEFINE(S_X4,			offsetof(struct pt_regs, regs[4]));
62   DEFINE(S_X6,			offsetof(struct pt_regs, regs[6]));
63   DEFINE(S_X8,			offsetof(struct pt_regs, regs[8]));
64   DEFINE(S_X10,			offsetof(struct pt_regs, regs[10]));
65   DEFINE(S_X12,			offsetof(struct pt_regs, regs[12]));
66   DEFINE(S_X14,			offsetof(struct pt_regs, regs[14]));
67   DEFINE(S_X16,			offsetof(struct pt_regs, regs[16]));
68   DEFINE(S_X18,			offsetof(struct pt_regs, regs[18]));
69   DEFINE(S_X20,			offsetof(struct pt_regs, regs[20]));
70   DEFINE(S_X22,			offsetof(struct pt_regs, regs[22]));
71   DEFINE(S_X24,			offsetof(struct pt_regs, regs[24]));
72   DEFINE(S_X26,			offsetof(struct pt_regs, regs[26]));
73   DEFINE(S_X28,			offsetof(struct pt_regs, regs[28]));
74   DEFINE(S_FP,			offsetof(struct pt_regs, regs[29]));
75   DEFINE(S_LR,			offsetof(struct pt_regs, regs[30]));
76   DEFINE(S_SP,			offsetof(struct pt_regs, sp));
77   DEFINE(S_PSTATE,		offsetof(struct pt_regs, pstate));
78   DEFINE(S_PC,			offsetof(struct pt_regs, pc));
79   DEFINE(S_SYSCALLNO,		offsetof(struct pt_regs, syscallno));
80   DEFINE(S_SDEI_TTBR1,		offsetof(struct pt_regs, sdei_ttbr1));
81   DEFINE(S_PMR_SAVE,		offsetof(struct pt_regs, pmr_save));
82   DEFINE(S_STACKFRAME,		offsetof(struct pt_regs, stackframe));
83   DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));
84   BLANK();
85 #ifdef CONFIG_COMPAT
86   DEFINE(COMPAT_SIGFRAME_REGS_OFFSET,		offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0));
87   DEFINE(COMPAT_RT_SIGFRAME_REGS_OFFSET,	offsetof(struct compat_rt_sigframe, sig.uc.uc_mcontext.arm_r0));
88   BLANK();
89 #endif
90   DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
91   BLANK();
92   DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
93   DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
94   BLANK();
95   DEFINE(VM_EXEC,	       	VM_EXEC);
96   BLANK();
97   DEFINE(PAGE_SZ,	       	PAGE_SIZE);
98   BLANK();
99   DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
100   DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
101   BLANK();
102   DEFINE(PREEMPT_DISABLE_OFFSET, PREEMPT_DISABLE_OFFSET);
103   DEFINE(SOFTIRQ_SHIFT, SOFTIRQ_SHIFT);
104   DEFINE(IRQ_CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
105   BLANK();
106   DEFINE(CPU_BOOT_TASK,		offsetof(struct secondary_data, task));
107   BLANK();
108   DEFINE(FTR_OVR_VAL_OFFSET,	offsetof(struct arm64_ftr_override, val));
109   DEFINE(FTR_OVR_MASK_OFFSET,	offsetof(struct arm64_ftr_override, mask));
110   BLANK();
111 #ifdef CONFIG_KVM
112   DEFINE(VCPU_CONTEXT,		offsetof(struct kvm_vcpu, arch.ctxt));
113   DEFINE(VCPU_FAULT_DISR,	offsetof(struct kvm_vcpu, arch.fault.disr_el1));
114   DEFINE(VCPU_HCR_EL2,		offsetof(struct kvm_vcpu, arch.hcr_el2));
115   DEFINE(CPU_USER_PT_REGS,	offsetof(struct kvm_cpu_context, regs));
116   DEFINE(CPU_RGSR_EL1,		offsetof(struct kvm_cpu_context, sys_regs[RGSR_EL1]));
117   DEFINE(CPU_GCR_EL1,		offsetof(struct kvm_cpu_context, sys_regs[GCR_EL1]));
118   DEFINE(CPU_APIAKEYLO_EL1,	offsetof(struct kvm_cpu_context, sys_regs[APIAKEYLO_EL1]));
119   DEFINE(CPU_APIBKEYLO_EL1,	offsetof(struct kvm_cpu_context, sys_regs[APIBKEYLO_EL1]));
120   DEFINE(CPU_APDAKEYLO_EL1,	offsetof(struct kvm_cpu_context, sys_regs[APDAKEYLO_EL1]));
121   DEFINE(CPU_APDBKEYLO_EL1,	offsetof(struct kvm_cpu_context, sys_regs[APDBKEYLO_EL1]));
122   DEFINE(CPU_APGAKEYLO_EL1,	offsetof(struct kvm_cpu_context, sys_regs[APGAKEYLO_EL1]));
123   DEFINE(HOST_CONTEXT_VCPU,	offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
124   DEFINE(HOST_DATA_CONTEXT,	offsetof(struct kvm_host_data, host_ctxt));
125   DEFINE(NVHE_INIT_MAIR_EL2,	offsetof(struct kvm_nvhe_init_params, mair_el2));
126   DEFINE(NVHE_INIT_TCR_EL2,	offsetof(struct kvm_nvhe_init_params, tcr_el2));
127   DEFINE(NVHE_INIT_TPIDR_EL2,	offsetof(struct kvm_nvhe_init_params, tpidr_el2));
128   DEFINE(NVHE_INIT_STACK_HYP_VA,	offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
129   DEFINE(NVHE_INIT_PGD_PA,	offsetof(struct kvm_nvhe_init_params, pgd_pa));
130   DEFINE(NVHE_INIT_HCR_EL2,	offsetof(struct kvm_nvhe_init_params, hcr_el2));
131   DEFINE(NVHE_INIT_VTTBR,	offsetof(struct kvm_nvhe_init_params, vttbr));
132   DEFINE(NVHE_INIT_VTCR,	offsetof(struct kvm_nvhe_init_params, vtcr));
133 #endif
134 #ifdef CONFIG_CPU_PM
135   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));
136   DEFINE(MPIDR_HASH_MASK,	offsetof(struct mpidr_hash, mask));
137   DEFINE(MPIDR_HASH_SHIFTS,	offsetof(struct mpidr_hash, shift_aff));
138   DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS,	offsetof(struct sleep_stack_data, system_regs));
139   DEFINE(SLEEP_STACK_DATA_CALLEE_REGS,	offsetof(struct sleep_stack_data, callee_saved_regs));
140 #endif
141   DEFINE(ARM_SMCCC_RES_X0_OFFS,		offsetof(struct arm_smccc_res, a0));
142   DEFINE(ARM_SMCCC_RES_X2_OFFS,		offsetof(struct arm_smccc_res, a2));
143   DEFINE(ARM_SMCCC_QUIRK_ID_OFFS,	offsetof(struct arm_smccc_quirk, id));
144   DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS,	offsetof(struct arm_smccc_quirk, state));
145   DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS,	offsetof(struct arm_smccc_1_2_regs, a0));
146   DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS,	offsetof(struct arm_smccc_1_2_regs, a2));
147   DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS,	offsetof(struct arm_smccc_1_2_regs, a4));
148   DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS,	offsetof(struct arm_smccc_1_2_regs, a6));
149   DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS,	offsetof(struct arm_smccc_1_2_regs, a8));
150   DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS,	offsetof(struct arm_smccc_1_2_regs, a10));
151   DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS,	offsetof(struct arm_smccc_1_2_regs, a12));
152   DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS,	offsetof(struct arm_smccc_1_2_regs, a14));
153   DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS,	offsetof(struct arm_smccc_1_2_regs, a16));
154   BLANK();
155   DEFINE(HIBERN_PBE_ORIG,	offsetof(struct pbe, orig_address));
156   DEFINE(HIBERN_PBE_ADDR,	offsetof(struct pbe, address));
157   DEFINE(HIBERN_PBE_NEXT,	offsetof(struct pbe, next));
158   DEFINE(ARM64_FTR_SYSVAL,	offsetof(struct arm64_ftr_reg, sys_val));
159   BLANK();
160 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
161   DEFINE(TRAMP_VALIAS,		TRAMP_VALIAS);
162 #endif
163 #ifdef CONFIG_ARM_SDE_INTERFACE
164   DEFINE(SDEI_EVENT_INTREGS,	offsetof(struct sdei_registered_event, interrupted_regs));
165   DEFINE(SDEI_EVENT_PRIORITY,	offsetof(struct sdei_registered_event, priority));
166 #endif
167 #ifdef CONFIG_ARM64_PTR_AUTH
168   DEFINE(PTRAUTH_USER_KEY_APIA,		offsetof(struct ptrauth_keys_user, apia));
169 #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
170   DEFINE(PTRAUTH_KERNEL_KEY_APIA,	offsetof(struct ptrauth_keys_kernel, apia));
171 #endif
172   BLANK();
173 #endif
174 #ifdef CONFIG_KEXEC_CORE
175   DEFINE(KIMAGE_ARCH_DTB_MEM,		offsetof(struct kimage, arch.dtb_mem));
176   DEFINE(KIMAGE_ARCH_EL2_VECTORS,	offsetof(struct kimage, arch.el2_vectors));
177   DEFINE(KIMAGE_ARCH_ZERO_PAGE,		offsetof(struct kimage, arch.zero_page));
178   DEFINE(KIMAGE_ARCH_PHYS_OFFSET,	offsetof(struct kimage, arch.phys_offset));
179   DEFINE(KIMAGE_ARCH_TTBR1,		offsetof(struct kimage, arch.ttbr1));
180   DEFINE(KIMAGE_HEAD,			offsetof(struct kimage, head));
181   DEFINE(KIMAGE_START,			offsetof(struct kimage, start));
182   BLANK();
183 #endif
184   return 0;
185 }
186