xref: /linux/arch/arm64/include/asm/tlb.h (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Based on arch/arm/include/asm/tlb.h
4  *
5  * Copyright (C) 2002 Russell King
6  * Copyright (C) 2012 ARM Ltd.
7  */
8 #ifndef __ASM_TLB_H
9 #define __ASM_TLB_H
10 
11 #include <linux/pagemap.h>
12 #include <linux/swap.h>
13 
14 static inline void __tlb_remove_table(void *_table)
15 {
16 	free_page_and_swap_cache((struct page *)_table);
17 }
18 
19 #define tlb_flush tlb_flush
20 static void tlb_flush(struct mmu_gather *tlb);
21 
22 #include <asm-generic/tlb.h>
23 
24 /*
25  * get the tlbi levels in arm64.  Default value is TLBI_TTL_UNKNOWN if more than
26  * one of cleared_* is set or neither is set - this elides the level hinting to
27  * the hardware.
28  */
29 static inline int tlb_get_level(struct mmu_gather *tlb)
30 {
31 	/* The TTL field is only valid for the leaf entry. */
32 	if (tlb->freed_tables)
33 		return TLBI_TTL_UNKNOWN;
34 
35 	if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
36 				   tlb->cleared_puds ||
37 				   tlb->cleared_p4ds))
38 		return 3;
39 
40 	if (tlb->cleared_pmds && !(tlb->cleared_ptes ||
41 				   tlb->cleared_puds ||
42 				   tlb->cleared_p4ds))
43 		return 2;
44 
45 	if (tlb->cleared_puds && !(tlb->cleared_ptes ||
46 				   tlb->cleared_pmds ||
47 				   tlb->cleared_p4ds))
48 		return 1;
49 
50 	if (tlb->cleared_p4ds && !(tlb->cleared_ptes ||
51 				   tlb->cleared_pmds ||
52 				   tlb->cleared_puds))
53 		return 0;
54 
55 	return TLBI_TTL_UNKNOWN;
56 }
57 
58 static inline void tlb_flush(struct mmu_gather *tlb)
59 {
60 	struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
61 	bool last_level = !tlb->freed_tables;
62 	unsigned long stride = tlb_get_unmap_size(tlb);
63 	int tlb_level = tlb_get_level(tlb);
64 
65 	/*
66 	 * If we're tearing down the address space then we only care about
67 	 * invalidating the walk-cache, since the ASID allocator won't
68 	 * reallocate our ASID without invalidating the entire TLB.
69 	 */
70 	if (tlb->fullmm) {
71 		if (!last_level)
72 			flush_tlb_mm(tlb->mm);
73 		return;
74 	}
75 
76 	__flush_tlb_range(&vma, tlb->start, tlb->end, stride,
77 			  last_level, tlb_level);
78 }
79 
80 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
81 				  unsigned long addr)
82 {
83 	struct ptdesc *ptdesc = page_ptdesc(pte);
84 
85 	pagetable_pte_dtor(ptdesc);
86 	tlb_remove_ptdesc(tlb, ptdesc);
87 }
88 
89 #if CONFIG_PGTABLE_LEVELS > 2
90 static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
91 				  unsigned long addr)
92 {
93 	struct ptdesc *ptdesc = virt_to_ptdesc(pmdp);
94 
95 	pagetable_pmd_dtor(ptdesc);
96 	tlb_remove_ptdesc(tlb, ptdesc);
97 }
98 #endif
99 
100 #if CONFIG_PGTABLE_LEVELS > 3
101 static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
102 				  unsigned long addr)
103 {
104 	struct ptdesc *ptdesc = virt_to_ptdesc(pudp);
105 
106 	if (!pgtable_l4_enabled())
107 		return;
108 
109 	pagetable_pud_dtor(ptdesc);
110 	tlb_remove_ptdesc(tlb, ptdesc);
111 }
112 #endif
113 
114 #endif
115