1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on arch/arm/include/asm/ptrace.h 4 * 5 * Copyright (C) 1996-2003 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 */ 8 #ifndef __ASM_PTRACE_H 9 #define __ASM_PTRACE_H 10 11 #include <asm/cpufeature.h> 12 13 #include <uapi/asm/ptrace.h> 14 15 /* Current Exception Level values, as contained in CurrentEL */ 16 #define CurrentEL_EL1 (1 << 2) 17 #define CurrentEL_EL2 (2 << 2) 18 19 #define INIT_PSTATE_EL1 \ 20 (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h) 21 #define INIT_PSTATE_EL2 \ 22 (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h) 23 24 #include <linux/irqchip/arm-gic-v3-prio.h> 25 26 #define GIC_PRIO_IRQON GICV3_PRIO_UNMASKED 27 #define GIC_PRIO_IRQOFF GICV3_PRIO_IRQ 28 29 #define GIC_PRIO_PSR_I_SET GICV3_PRIO_PSR_I_SET 30 31 /* Additional SPSR bits not exposed in the UABI */ 32 #define PSR_MODE_THREAD_BIT (1 << 0) 33 #define PSR_IL_BIT (1 << 20) 34 35 /* AArch32-specific ptrace requests */ 36 #define COMPAT_PTRACE_GETREGS 12 37 #define COMPAT_PTRACE_SETREGS 13 38 #define COMPAT_PTRACE_GET_THREAD_AREA 22 39 #define COMPAT_PTRACE_SET_SYSCALL 23 40 #define COMPAT_PTRACE_GETVFPREGS 27 41 #define COMPAT_PTRACE_SETVFPREGS 28 42 #define COMPAT_PTRACE_GETHBPREGS 29 43 #define COMPAT_PTRACE_SETHBPREGS 30 44 45 /* SPSR_ELx bits for exceptions taken from AArch32 */ 46 #define PSR_AA32_MODE_MASK 0x0000001f 47 #define PSR_AA32_MODE_USR 0x00000010 48 #define PSR_AA32_MODE_FIQ 0x00000011 49 #define PSR_AA32_MODE_IRQ 0x00000012 50 #define PSR_AA32_MODE_SVC 0x00000013 51 #define PSR_AA32_MODE_ABT 0x00000017 52 #define PSR_AA32_MODE_HYP 0x0000001a 53 #define PSR_AA32_MODE_UND 0x0000001b 54 #define PSR_AA32_MODE_SYS 0x0000001f 55 #define PSR_AA32_T_BIT 0x00000020 56 #define PSR_AA32_F_BIT 0x00000040 57 #define PSR_AA32_I_BIT 0x00000080 58 #define PSR_AA32_A_BIT 0x00000100 59 #define PSR_AA32_E_BIT 0x00000200 60 #define PSR_AA32_PAN_BIT 0x00400000 61 #define PSR_AA32_SSBS_BIT 0x00800000 62 #define PSR_AA32_DIT_BIT 0x01000000 63 #define PSR_AA32_Q_BIT 0x08000000 64 #define PSR_AA32_V_BIT 0x10000000 65 #define PSR_AA32_C_BIT 0x20000000 66 #define PSR_AA32_Z_BIT 0x40000000 67 #define PSR_AA32_N_BIT 0x80000000 68 #define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 69 #define PSR_AA32_GE_MASK 0x000f0000 70 71 #ifdef CONFIG_CPU_BIG_ENDIAN 72 #define PSR_AA32_ENDSTATE PSR_AA32_E_BIT 73 #else 74 #define PSR_AA32_ENDSTATE 0 75 #endif 76 77 /* AArch32 CPSR bits, as seen in AArch32 */ 78 #define COMPAT_PSR_DIT_BIT 0x00200000 79 80 /* 81 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 82 * process is located in memory. 83 */ 84 #define COMPAT_PT_TEXT_ADDR 0x10000 85 #define COMPAT_PT_DATA_ADDR 0x10004 86 #define COMPAT_PT_TEXT_END_ADDR 0x10008 87 88 /* 89 * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing 90 * a syscall -- i.e., its most recent entry into the kernel from 91 * userspace was not via SVC, or otherwise a tracer cancelled the syscall. 92 * 93 * This must have the value -1, for ABI compatibility with ptrace etc. 94 */ 95 #define NO_SYSCALL (-1) 96 97 #ifndef __ASSEMBLY__ 98 #include <linux/bug.h> 99 #include <linux/types.h> 100 101 #include <asm/stacktrace/frame.h> 102 103 /* sizeof(struct user) for AArch32 */ 104 #define COMPAT_USER_SZ 296 105 106 /* Architecturally defined mapping between AArch32 and AArch64 registers */ 107 #define compat_usr(x) regs[(x)] 108 #define compat_fp regs[11] 109 #define compat_sp regs[13] 110 #define compat_lr regs[14] 111 #define compat_sp_hyp regs[15] 112 #define compat_lr_irq regs[16] 113 #define compat_sp_irq regs[17] 114 #define compat_lr_svc regs[18] 115 #define compat_sp_svc regs[19] 116 #define compat_lr_abt regs[20] 117 #define compat_sp_abt regs[21] 118 #define compat_lr_und regs[22] 119 #define compat_sp_und regs[23] 120 #define compat_r8_fiq regs[24] 121 #define compat_r9_fiq regs[25] 122 #define compat_r10_fiq regs[26] 123 #define compat_r11_fiq regs[27] 124 #define compat_r12_fiq regs[28] 125 #define compat_sp_fiq regs[29] 126 #define compat_lr_fiq regs[30] 127 128 static inline unsigned long compat_psr_to_pstate(const unsigned long psr) 129 { 130 unsigned long pstate; 131 132 pstate = psr & ~COMPAT_PSR_DIT_BIT; 133 134 if (psr & COMPAT_PSR_DIT_BIT) 135 pstate |= PSR_AA32_DIT_BIT; 136 137 return pstate; 138 } 139 140 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate) 141 { 142 unsigned long psr; 143 144 psr = pstate & ~PSR_AA32_DIT_BIT; 145 146 if (pstate & PSR_AA32_DIT_BIT) 147 psr |= COMPAT_PSR_DIT_BIT; 148 149 return psr; 150 } 151 152 /* 153 * This struct defines the way the registers are stored on the stack during an 154 * exception. struct user_pt_regs must form a prefix of struct pt_regs. 155 */ 156 struct pt_regs { 157 union { 158 struct user_pt_regs user_regs; 159 struct { 160 u64 regs[31]; 161 u64 sp; 162 u64 pc; 163 u64 pstate; 164 }; 165 }; 166 u64 orig_x0; 167 s32 syscallno; 168 u32 pmr; 169 170 u64 sdei_ttbr1; 171 struct frame_record_meta stackframe; 172 173 /* Only valid for some EL1 exceptions. */ 174 u64 lockdep_hardirqs; 175 u64 exit_rcu; 176 }; 177 178 /* For correct stack alignment, pt_regs has to be a multiple of 16 bytes. */ 179 static_assert(IS_ALIGNED(sizeof(struct pt_regs), 16)); 180 181 static inline bool in_syscall(struct pt_regs const *regs) 182 { 183 return regs->syscallno != NO_SYSCALL; 184 } 185 186 static inline void forget_syscall(struct pt_regs *regs) 187 { 188 regs->syscallno = NO_SYSCALL; 189 } 190 191 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate) 192 193 #define arch_has_single_step() (1) 194 195 #ifdef CONFIG_COMPAT 196 #define compat_thumb_mode(regs) \ 197 (((regs)->pstate & PSR_AA32_T_BIT)) 198 #else 199 #define compat_thumb_mode(regs) (0) 200 #endif 201 202 #define user_mode(regs) \ 203 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t) 204 205 #define compat_user_mode(regs) \ 206 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \ 207 (PSR_MODE32_BIT | PSR_MODE_EL0t)) 208 209 #define processor_mode(regs) \ 210 ((regs)->pstate & PSR_MODE_MASK) 211 212 #define irqs_priority_unmasked(regs) \ 213 (system_uses_irq_prio_masking() ? \ 214 (regs)->pmr == GIC_PRIO_IRQON : \ 215 true) 216 217 #define interrupts_enabled(regs) \ 218 (!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs)) 219 220 #define fast_interrupts_enabled(regs) \ 221 (!((regs)->pstate & PSR_F_BIT)) 222 223 static inline unsigned long user_stack_pointer(struct pt_regs *regs) 224 { 225 if (compat_user_mode(regs)) 226 return regs->compat_sp; 227 return regs->sp; 228 } 229 230 extern int regs_query_register_offset(const char *name); 231 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, 232 unsigned int n); 233 234 /** 235 * regs_get_register() - get register value from its offset 236 * @regs: pt_regs from which register value is gotten 237 * @offset: offset of the register. 238 * 239 * regs_get_register returns the value of a register whose offset from @regs. 240 * The @offset is the offset of the register in struct pt_regs. 241 * If @offset is bigger than MAX_REG_OFFSET, this returns 0. 242 */ 243 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset) 244 { 245 u64 val = 0; 246 247 WARN_ON(offset & 7); 248 249 offset >>= 3; 250 switch (offset) { 251 case 0 ... 30: 252 val = regs->regs[offset]; 253 break; 254 case offsetof(struct pt_regs, sp) >> 3: 255 val = regs->sp; 256 break; 257 case offsetof(struct pt_regs, pc) >> 3: 258 val = regs->pc; 259 break; 260 case offsetof(struct pt_regs, pstate) >> 3: 261 val = regs->pstate; 262 break; 263 default: 264 val = 0; 265 } 266 267 return val; 268 } 269 270 /* 271 * Read a register given an architectural register index r. 272 * This handles the common case where 31 means XZR, not SP. 273 */ 274 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r) 275 { 276 return (r == 31) ? 0 : regs->regs[r]; 277 } 278 279 /* 280 * Write a register given an architectural register index r. 281 * This handles the common case where 31 means XZR, not SP. 282 */ 283 static inline void pt_regs_write_reg(struct pt_regs *regs, int r, 284 unsigned long val) 285 { 286 if (r != 31) 287 regs->regs[r] = val; 288 } 289 290 /* Valid only for Kernel mode traps. */ 291 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 292 { 293 return regs->sp; 294 } 295 296 static inline unsigned long regs_return_value(struct pt_regs *regs) 297 { 298 unsigned long val = regs->regs[0]; 299 300 /* 301 * Audit currently uses regs_return_value() instead of 302 * syscall_get_return_value(). Apply the same sign-extension here until 303 * audit is updated to use syscall_get_return_value(). 304 */ 305 if (compat_user_mode(regs)) 306 val = sign_extend64(val, 31); 307 308 return val; 309 } 310 311 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc) 312 { 313 regs->regs[0] = rc; 314 } 315 316 /** 317 * regs_get_kernel_argument() - get Nth function argument in kernel 318 * @regs: pt_regs of that context 319 * @n: function argument number (start from 0) 320 * 321 * regs_get_argument() returns @n th argument of the function call. 322 * 323 * Note that this chooses the most likely register mapping. In very rare 324 * cases this may not return correct data, for example, if one of the 325 * function parameters is 16 bytes or bigger. In such cases, we cannot 326 * get access the parameter correctly and the register assignment of 327 * subsequent parameters will be shifted. 328 */ 329 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, 330 unsigned int n) 331 { 332 #define NR_REG_ARGUMENTS 8 333 if (n < NR_REG_ARGUMENTS) 334 return pt_regs_read_reg(regs, n); 335 return 0; 336 } 337 338 /* We must avoid circular header include via sched.h */ 339 struct task_struct; 340 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task); 341 342 static inline unsigned long instruction_pointer(struct pt_regs *regs) 343 { 344 return regs->pc; 345 } 346 static inline void instruction_pointer_set(struct pt_regs *regs, 347 unsigned long val) 348 { 349 regs->pc = val; 350 } 351 352 static inline unsigned long frame_pointer(struct pt_regs *regs) 353 { 354 return regs->regs[29]; 355 } 356 357 #define procedure_link_pointer(regs) ((regs)->regs[30]) 358 359 static inline void procedure_link_pointer_set(struct pt_regs *regs, 360 unsigned long val) 361 { 362 procedure_link_pointer(regs) = val; 363 } 364 365 extern unsigned long profile_pc(struct pt_regs *regs); 366 367 #endif /* __ASSEMBLY__ */ 368 #endif 369