1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2016 ARM Ltd. 4 */ 5 #ifndef __ASM_PGTABLE_PROT_H 6 #define __ASM_PGTABLE_PROT_H 7 8 #include <asm/memory.h> 9 #include <asm/pgtable-hwdef.h> 10 11 #include <linux/const.h> 12 13 /* 14 * Software defined PTE bits definition. 15 */ 16 #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ 17 #define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */ 18 #define PTE_DIRTY (_AT(pteval_t, 1) << 55) 19 #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) 20 #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) 21 #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ 22 23 /* 24 * This bit indicates that the entry is present i.e. pmd_page() 25 * still points to a valid huge page in memory even if the pmd 26 * has been invalidated. 27 */ 28 #define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */ 29 30 #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) 31 #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) 32 33 #define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG) 34 #define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG) 35 36 #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE)) 37 #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 38 #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC)) 39 #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL)) 40 #define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED)) 41 42 #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) 43 #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PTE_WRITE | PMD_ATTRINDX(MT_NORMAL)) 44 #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) 45 46 #define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) 47 48 #define _PAGE_KERNEL (PROT_NORMAL) 49 #define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY) 50 #define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY) 51 #define _PAGE_KERNEL_EXEC (PROT_NORMAL & ~PTE_PXN) 52 #define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT) 53 54 #define _PAGE_SHARED (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) 55 #define _PAGE_SHARED_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE) 56 #define _PAGE_READONLY (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) 57 #define _PAGE_READONLY_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN) 58 #define _PAGE_EXECONLY (_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN) 59 60 #ifdef __ASSEMBLY__ 61 #define PTE_MAYBE_NG 0 62 #endif 63 64 #ifndef __ASSEMBLY__ 65 66 #include <asm/cpufeature.h> 67 #include <asm/pgtable-types.h> 68 69 extern bool arm64_use_ng_mappings; 70 71 #define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0) 72 #define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0) 73 74 /* 75 * If we have userspace only BTI we don't want to mark kernel pages 76 * guarded even if the system does support BTI. 77 */ 78 #ifdef CONFIG_ARM64_BTI_KERNEL 79 #define PTE_MAYBE_GP (system_supports_bti() ? PTE_GP : 0) 80 #else 81 #define PTE_MAYBE_GP 0 82 #endif 83 84 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 85 #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO) 86 #define PAGE_KERNEL_ROX __pgprot(_PAGE_KERNEL_ROX) 87 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC) 88 #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_KERNEL_EXEC_CONT) 89 90 #define PAGE_S2_MEMATTR(attr, has_fwb) \ 91 ({ \ 92 u64 __val; \ 93 if (has_fwb) \ 94 __val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \ 95 else \ 96 __val = PTE_S2_MEMATTR(MT_S2_ ## attr); \ 97 __val; \ 98 }) 99 100 #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) 101 /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */ 102 #define PAGE_SHARED __pgprot(_PAGE_SHARED) 103 #define PAGE_SHARED_EXEC __pgprot(_PAGE_SHARED_EXEC) 104 #define PAGE_READONLY __pgprot(_PAGE_READONLY) 105 #define PAGE_READONLY_EXEC __pgprot(_PAGE_READONLY_EXEC) 106 #define PAGE_EXECONLY __pgprot(_PAGE_EXECONLY) 107 108 #endif /* __ASSEMBLY__ */ 109 110 #define pte_pi_index(pte) ( \ 111 ((pte & BIT(PTE_PI_IDX_3)) >> (PTE_PI_IDX_3 - 3)) | \ 112 ((pte & BIT(PTE_PI_IDX_2)) >> (PTE_PI_IDX_2 - 2)) | \ 113 ((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \ 114 ((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0))) 115 116 /* 117 * Page types used via Permission Indirection Extension (PIE). PIE uses 118 * the USER, DBM, PXN and UXN bits to to generate an index which is used 119 * to look up the actual permission in PIR_ELx and PIRE0_EL1. We define 120 * combinations we use on non-PIE systems with the same encoding, for 121 * convenience these are listed here as comments as are the unallocated 122 * encodings. 123 */ 124 125 /* 0: PAGE_DEFAULT */ 126 /* 1: PTE_USER */ 127 /* 2: PTE_WRITE */ 128 /* 3: PTE_WRITE | PTE_USER */ 129 /* 4: PAGE_EXECONLY PTE_PXN */ 130 /* 5: PAGE_READONLY_EXEC PTE_PXN | PTE_USER */ 131 /* 6: PTE_PXN | PTE_WRITE */ 132 /* 7: PAGE_SHARED_EXEC PTE_PXN | PTE_WRITE | PTE_USER */ 133 /* 8: PAGE_KERNEL_ROX PTE_UXN */ 134 /* 9: PTE_UXN | PTE_USER */ 135 /* a: PAGE_KERNEL_EXEC PTE_UXN | PTE_WRITE */ 136 /* b: PTE_UXN | PTE_WRITE | PTE_USER */ 137 /* c: PAGE_KERNEL_RO PTE_UXN | PTE_PXN */ 138 /* d: PAGE_READONLY PTE_UXN | PTE_PXN | PTE_USER */ 139 /* e: PAGE_KERNEL PTE_UXN | PTE_PXN | PTE_WRITE */ 140 /* f: PAGE_SHARED PTE_UXN | PTE_PXN | PTE_WRITE | PTE_USER */ 141 142 #define PIE_E0 ( \ 143 PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \ 144 PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX) | \ 145 PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX) | \ 146 PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ 147 PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW)) 148 149 #define PIE_E1 ( \ 150 PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \ 151 PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R) | \ 152 PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \ 153 PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ 154 PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW) | \ 155 PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \ 156 PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \ 157 PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \ 158 PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL), PIE_RW)) 159 160 #endif /* __ASM_PGTABLE_PROT_H */ 161