1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ARM64_KVM_NESTED_H 3 #define __ARM64_KVM_NESTED_H 4 5 #include <linux/bitfield.h> 6 #include <linux/kvm_host.h> 7 #include <asm/kvm_emulate.h> 8 9 static inline bool vcpu_has_nv(const struct kvm_vcpu *vcpu) 10 { 11 return (!__is_defined(__KVM_NVHE_HYPERVISOR__) && 12 cpus_have_final_cap(ARM64_HAS_NESTED_VIRT) && 13 vcpu_has_feature(vcpu, KVM_ARM_VCPU_HAS_EL2)); 14 } 15 16 /* Translation helpers from non-VHE EL2 to EL1 */ 17 static inline u64 tcr_el2_ps_to_tcr_el1_ips(u64 tcr_el2) 18 { 19 return (u64)FIELD_GET(TCR_EL2_PS_MASK, tcr_el2) << TCR_IPS_SHIFT; 20 } 21 22 static inline u64 translate_tcr_el2_to_tcr_el1(u64 tcr) 23 { 24 return TCR_EPD1_MASK | /* disable TTBR1_EL1 */ 25 ((tcr & TCR_EL2_TBI) ? TCR_TBI0 : 0) | 26 tcr_el2_ps_to_tcr_el1_ips(tcr) | 27 (tcr & TCR_EL2_TG0_MASK) | 28 (tcr & TCR_EL2_ORGN0_MASK) | 29 (tcr & TCR_EL2_IRGN0_MASK) | 30 (tcr & TCR_EL2_T0SZ_MASK); 31 } 32 33 static inline u64 translate_cptr_el2_to_cpacr_el1(u64 cptr_el2) 34 { 35 u64 cpacr_el1 = 0; 36 37 if (cptr_el2 & CPTR_EL2_TTA) 38 cpacr_el1 |= CPACR_ELx_TTA; 39 if (!(cptr_el2 & CPTR_EL2_TFP)) 40 cpacr_el1 |= CPACR_ELx_FPEN; 41 if (!(cptr_el2 & CPTR_EL2_TZ)) 42 cpacr_el1 |= CPACR_ELx_ZEN; 43 44 return cpacr_el1; 45 } 46 47 static inline u64 translate_sctlr_el2_to_sctlr_el1(u64 val) 48 { 49 /* Only preserve the minimal set of bits we support */ 50 val &= (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | SCTLR_ELx_SA | 51 SCTLR_ELx_I | SCTLR_ELx_IESB | SCTLR_ELx_WXN | SCTLR_ELx_EE); 52 val |= SCTLR_EL1_RES1; 53 54 return val; 55 } 56 57 static inline u64 translate_ttbr0_el2_to_ttbr0_el1(u64 ttbr0) 58 { 59 /* Clear the ASID field */ 60 return ttbr0 & ~GENMASK_ULL(63, 48); 61 } 62 63 extern bool __check_nv_sr_forward(struct kvm_vcpu *vcpu); 64 65 int kvm_init_nv_sysregs(struct kvm *kvm); 66 67 #endif /* __ARM64_KVM_NESTED_H */ 68