xref: /linux/arch/arm64/include/asm/irq.h (revision b4ff8389ed14b849354b59ce9b360bdefcdbf99c)
1fb9bd7d6SMarc Zyngier #ifndef __ASM_IRQ_H
2fb9bd7d6SMarc Zyngier #define __ASM_IRQ_H
3fb9bd7d6SMarc Zyngier 
4d60fc389STomasz Nowicki #include <linux/irqchip/arm-gic-acpi.h>
5d60fc389STomasz Nowicki 
6fb9bd7d6SMarc Zyngier #include <asm-generic/irq.h>
7fb9bd7d6SMarc Zyngier 
8af2c632eSChunyan Zhang struct pt_regs;
9af2c632eSChunyan Zhang 
109327e2c6SMark Rutland extern void migrate_irqs(void);
11e851b58cSCatalin Marinas extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
12fb9bd7d6SMarc Zyngier 
13d60fc389STomasz Nowicki static inline void acpi_irq_init(void)
14d60fc389STomasz Nowicki {
15d60fc389STomasz Nowicki 	/*
16d60fc389STomasz Nowicki 	 * Hardcode ACPI IRQ chip initialization to GICv2 for now.
17d60fc389STomasz Nowicki 	 * Proper irqchip infrastructure will be implemented along with
18d60fc389STomasz Nowicki 	 * incoming  GICv2m|GICv3|ITS bits.
19d60fc389STomasz Nowicki 	 */
20d60fc389STomasz Nowicki 	acpi_gic_init();
21d60fc389STomasz Nowicki }
22d60fc389STomasz Nowicki #define acpi_irq_init acpi_irq_init
23d60fc389STomasz Nowicki 
24*b4ff8389SBoris Ostrovsky static inline int nr_legacy_irqs(void)
25*b4ff8389SBoris Ostrovsky {
26*b4ff8389SBoris Ostrovsky 	return 0;
27*b4ff8389SBoris Ostrovsky }
28*b4ff8389SBoris Ostrovsky 
29fb9bd7d6SMarc Zyngier #endif
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