1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 ARM Ltd. 4 */ 5 #ifndef __ASM_FP_H 6 #define __ASM_FP_H 7 8 #include <asm/errno.h> 9 #include <asm/ptrace.h> 10 #include <asm/processor.h> 11 #include <asm/sigcontext.h> 12 #include <asm/sysreg.h> 13 14 #ifndef __ASSEMBLY__ 15 16 #include <linux/bitmap.h> 17 #include <linux/build_bug.h> 18 #include <linux/bug.h> 19 #include <linux/cache.h> 20 #include <linux/init.h> 21 #include <linux/stddef.h> 22 #include <linux/types.h> 23 24 #ifdef CONFIG_COMPAT 25 /* Masks for extracting the FPSR and FPCR from the FPSCR */ 26 #define VFP_FPSCR_STAT_MASK 0xf800009f 27 #define VFP_FPSCR_CTRL_MASK 0x07f79f00 28 /* 29 * The VFP state has 32x64-bit registers and a single 32-bit 30 * control/status register. 31 */ 32 #define VFP_STATE_SIZE ((32 * 8) + 4) 33 #endif 34 35 /* 36 * When we defined the maximum SVE vector length we defined the ABI so 37 * that the maximum vector length included all the reserved for future 38 * expansion bits in ZCR rather than those just currently defined by 39 * the architecture. While SME follows a similar pattern the fact that 40 * it includes a square matrix means that any allocations that attempt 41 * to cover the maximum potential vector length (such as happen with 42 * the regset used for ptrace) end up being extremely large. Define 43 * the much lower actual limit for use in such situations. 44 */ 45 #define SME_VQ_MAX 16 46 47 struct task_struct; 48 49 extern void fpsimd_save_state(struct user_fpsimd_state *state); 50 extern void fpsimd_load_state(struct user_fpsimd_state *state); 51 52 extern void fpsimd_thread_switch(struct task_struct *next); 53 extern void fpsimd_flush_thread(void); 54 55 extern void fpsimd_signal_preserve_current_state(void); 56 extern void fpsimd_preserve_current_state(void); 57 extern void fpsimd_restore_current_state(void); 58 extern void fpsimd_update_current_state(struct user_fpsimd_state const *state); 59 extern void fpsimd_kvm_prepare(void); 60 61 struct cpu_fp_state { 62 struct user_fpsimd_state *st; 63 void *sve_state; 64 void *za_state; 65 u64 *svcr; 66 unsigned int sve_vl; 67 unsigned int sme_vl; 68 enum fp_type *fp_type; 69 enum fp_type to_save; 70 }; 71 72 extern void fpsimd_bind_state_to_cpu(struct cpu_fp_state *fp_state); 73 74 extern void fpsimd_flush_task_state(struct task_struct *target); 75 extern void fpsimd_save_and_flush_cpu_state(void); 76 77 static inline bool thread_sm_enabled(struct thread_struct *thread) 78 { 79 return system_supports_sme() && (thread->svcr & SVCR_SM_MASK); 80 } 81 82 static inline bool thread_za_enabled(struct thread_struct *thread) 83 { 84 return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK); 85 } 86 87 /* Maximum VL that SVE/SME VL-agnostic software can transparently support */ 88 #define VL_ARCH_MAX 0x100 89 90 /* Offset of FFR in the SVE register dump */ 91 static inline size_t sve_ffr_offset(int vl) 92 { 93 return SVE_SIG_FFR_OFFSET(sve_vq_from_vl(vl)) - SVE_SIG_REGS_OFFSET; 94 } 95 96 static inline void *sve_pffr(struct thread_struct *thread) 97 { 98 unsigned int vl; 99 100 if (system_supports_sme() && thread_sm_enabled(thread)) 101 vl = thread_get_sme_vl(thread); 102 else 103 vl = thread_get_sve_vl(thread); 104 105 return (char *)thread->sve_state + sve_ffr_offset(vl); 106 } 107 108 extern void sve_save_state(void *state, u32 *pfpsr, int save_ffr); 109 extern void sve_load_state(void const *state, u32 const *pfpsr, 110 int restore_ffr); 111 extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1); 112 extern unsigned int sve_get_vl(void); 113 extern void sve_set_vq(unsigned long vq_minus_1); 114 extern void sme_set_vq(unsigned long vq_minus_1); 115 extern void za_save_state(void *state); 116 extern void za_load_state(void const *state); 117 118 struct arm64_cpu_capabilities; 119 extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); 120 extern void sme_kernel_enable(const struct arm64_cpu_capabilities *__unused); 121 extern void fa64_kernel_enable(const struct arm64_cpu_capabilities *__unused); 122 123 extern u64 read_zcr_features(void); 124 extern u64 read_smcr_features(void); 125 126 /* 127 * Helpers to translate bit indices in sve_vq_map to VQ values (and 128 * vice versa). This allows find_next_bit() to be used to find the 129 * _maximum_ VQ not exceeding a certain value. 130 */ 131 static inline unsigned int __vq_to_bit(unsigned int vq) 132 { 133 return SVE_VQ_MAX - vq; 134 } 135 136 static inline unsigned int __bit_to_vq(unsigned int bit) 137 { 138 return SVE_VQ_MAX - bit; 139 } 140 141 142 struct vl_info { 143 enum vec_type type; 144 const char *name; /* For display purposes */ 145 146 /* Minimum supported vector length across all CPUs */ 147 int min_vl; 148 149 /* Maximum supported vector length across all CPUs */ 150 int max_vl; 151 int max_virtualisable_vl; 152 153 /* 154 * Set of available vector lengths, 155 * where length vq encoded as bit __vq_to_bit(vq): 156 */ 157 DECLARE_BITMAP(vq_map, SVE_VQ_MAX); 158 159 /* Set of vector lengths present on at least one cpu: */ 160 DECLARE_BITMAP(vq_partial_map, SVE_VQ_MAX); 161 }; 162 163 #ifdef CONFIG_ARM64_SVE 164 165 extern void sve_alloc(struct task_struct *task, bool flush); 166 extern void fpsimd_release_task(struct task_struct *task); 167 extern void fpsimd_sync_to_sve(struct task_struct *task); 168 extern void fpsimd_force_sync_to_sve(struct task_struct *task); 169 extern void sve_sync_to_fpsimd(struct task_struct *task); 170 extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task); 171 172 extern int vec_set_vector_length(struct task_struct *task, enum vec_type type, 173 unsigned long vl, unsigned long flags); 174 175 extern int sve_set_current_vl(unsigned long arg); 176 extern int sve_get_current_vl(void); 177 178 static inline void sve_user_disable(void) 179 { 180 sysreg_clear_set(cpacr_el1, CPACR_EL1_ZEN_EL0EN, 0); 181 } 182 183 static inline void sve_user_enable(void) 184 { 185 sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN); 186 } 187 188 #define sve_cond_update_zcr_vq(val, reg) \ 189 do { \ 190 u64 __zcr = read_sysreg_s((reg)); \ 191 u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \ 192 __new |= (val) & ZCR_ELx_LEN_MASK; \ 193 if (__zcr != __new) \ 194 write_sysreg_s(__new, (reg)); \ 195 } while (0) 196 197 /* 198 * Probing and setup functions. 199 * Calls to these functions must be serialised with one another. 200 */ 201 enum vec_type; 202 203 extern void __init vec_init_vq_map(enum vec_type type); 204 extern void vec_update_vq_map(enum vec_type type); 205 extern int vec_verify_vq_map(enum vec_type type); 206 extern void __init sve_setup(void); 207 208 extern __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX]; 209 210 static inline void write_vl(enum vec_type type, u64 val) 211 { 212 u64 tmp; 213 214 switch (type) { 215 #ifdef CONFIG_ARM64_SVE 216 case ARM64_VEC_SVE: 217 tmp = read_sysreg_s(SYS_ZCR_EL1) & ~ZCR_ELx_LEN_MASK; 218 write_sysreg_s(tmp | val, SYS_ZCR_EL1); 219 break; 220 #endif 221 #ifdef CONFIG_ARM64_SME 222 case ARM64_VEC_SME: 223 tmp = read_sysreg_s(SYS_SMCR_EL1) & ~SMCR_ELx_LEN_MASK; 224 write_sysreg_s(tmp | val, SYS_SMCR_EL1); 225 break; 226 #endif 227 default: 228 WARN_ON_ONCE(1); 229 break; 230 } 231 } 232 233 static inline int vec_max_vl(enum vec_type type) 234 { 235 return vl_info[type].max_vl; 236 } 237 238 static inline int vec_max_virtualisable_vl(enum vec_type type) 239 { 240 return vl_info[type].max_virtualisable_vl; 241 } 242 243 static inline int sve_max_vl(void) 244 { 245 return vec_max_vl(ARM64_VEC_SVE); 246 } 247 248 static inline int sve_max_virtualisable_vl(void) 249 { 250 return vec_max_virtualisable_vl(ARM64_VEC_SVE); 251 } 252 253 /* Ensure vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX before calling this function */ 254 static inline bool vq_available(enum vec_type type, unsigned int vq) 255 { 256 return test_bit(__vq_to_bit(vq), vl_info[type].vq_map); 257 } 258 259 static inline bool sve_vq_available(unsigned int vq) 260 { 261 return vq_available(ARM64_VEC_SVE, vq); 262 } 263 264 size_t sve_state_size(struct task_struct const *task); 265 266 #else /* ! CONFIG_ARM64_SVE */ 267 268 static inline void sve_alloc(struct task_struct *task, bool flush) { } 269 static inline void fpsimd_release_task(struct task_struct *task) { } 270 static inline void sve_sync_to_fpsimd(struct task_struct *task) { } 271 static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { } 272 273 static inline int sve_max_virtualisable_vl(void) 274 { 275 return 0; 276 } 277 278 static inline int sve_set_current_vl(unsigned long arg) 279 { 280 return -EINVAL; 281 } 282 283 static inline int sve_get_current_vl(void) 284 { 285 return -EINVAL; 286 } 287 288 static inline int sve_max_vl(void) 289 { 290 return -EINVAL; 291 } 292 293 static inline bool sve_vq_available(unsigned int vq) { return false; } 294 295 static inline void sve_user_disable(void) { BUILD_BUG(); } 296 static inline void sve_user_enable(void) { BUILD_BUG(); } 297 298 #define sve_cond_update_zcr_vq(val, reg) do { } while (0) 299 300 static inline void vec_init_vq_map(enum vec_type t) { } 301 static inline void vec_update_vq_map(enum vec_type t) { } 302 static inline int vec_verify_vq_map(enum vec_type t) { return 0; } 303 static inline void sve_setup(void) { } 304 305 static inline size_t sve_state_size(struct task_struct const *task) 306 { 307 return 0; 308 } 309 310 #endif /* ! CONFIG_ARM64_SVE */ 311 312 #ifdef CONFIG_ARM64_SME 313 314 static inline void sme_user_disable(void) 315 { 316 sysreg_clear_set(cpacr_el1, CPACR_EL1_SMEN_EL0EN, 0); 317 } 318 319 static inline void sme_user_enable(void) 320 { 321 sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_SMEN_EL0EN); 322 } 323 324 static inline void sme_smstart_sm(void) 325 { 326 asm volatile(__msr_s(SYS_SVCR_SMSTART_SM_EL0, "xzr")); 327 } 328 329 static inline void sme_smstop_sm(void) 330 { 331 asm volatile(__msr_s(SYS_SVCR_SMSTOP_SM_EL0, "xzr")); 332 } 333 334 static inline void sme_smstop(void) 335 { 336 asm volatile(__msr_s(SYS_SVCR_SMSTOP_SMZA_EL0, "xzr")); 337 } 338 339 extern void __init sme_setup(void); 340 341 static inline int sme_max_vl(void) 342 { 343 return vec_max_vl(ARM64_VEC_SME); 344 } 345 346 static inline int sme_max_virtualisable_vl(void) 347 { 348 return vec_max_virtualisable_vl(ARM64_VEC_SME); 349 } 350 351 extern void sme_alloc(struct task_struct *task); 352 extern unsigned int sme_get_vl(void); 353 extern int sme_set_current_vl(unsigned long arg); 354 extern int sme_get_current_vl(void); 355 356 /* 357 * Return how many bytes of memory are required to store the full SME 358 * specific state (currently just ZA) for task, given task's currently 359 * configured vector length. 360 */ 361 static inline size_t za_state_size(struct task_struct const *task) 362 { 363 unsigned int vl = task_get_sme_vl(task); 364 365 return ZA_SIG_REGS_SIZE(sve_vq_from_vl(vl)); 366 } 367 368 #else 369 370 static inline void sme_user_disable(void) { BUILD_BUG(); } 371 static inline void sme_user_enable(void) { BUILD_BUG(); } 372 373 static inline void sme_smstart_sm(void) { } 374 static inline void sme_smstop_sm(void) { } 375 static inline void sme_smstop(void) { } 376 377 static inline void sme_alloc(struct task_struct *task) { } 378 static inline void sme_setup(void) { } 379 static inline unsigned int sme_get_vl(void) { return 0; } 380 static inline int sme_max_vl(void) { return 0; } 381 static inline int sme_max_virtualisable_vl(void) { return 0; } 382 static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; } 383 static inline int sme_get_current_vl(void) { return -EINVAL; } 384 385 static inline size_t za_state_size(struct task_struct const *task) 386 { 387 return 0; 388 } 389 390 #endif /* ! CONFIG_ARM64_SME */ 391 392 /* For use by EFI runtime services calls only */ 393 extern void __efi_fpsimd_begin(void); 394 extern void __efi_fpsimd_end(void); 395 396 #endif 397 398 #endif 399