xref: /linux/arch/arm64/include/asm/debug-monitors.h (revision 355a47ae7ebcf9d605aa809b259d380422e81b8d)
1 /*
2  * Copyright (C) 2012 ARM Ltd.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16 #ifndef __ASM_DEBUG_MONITORS_H
17 #define __ASM_DEBUG_MONITORS_H
18 
19 #ifdef __KERNEL__
20 
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <asm/brk-imm.h>
24 #include <asm/esr.h>
25 #include <asm/insn.h>
26 #include <asm/ptrace.h>
27 
28 /* Low-level stepping controls. */
29 #define DBG_MDSCR_SS		(1 << 0)
30 #define DBG_SPSR_SS		(1 << 21)
31 
32 /* MDSCR_EL1 enabling bits */
33 #define DBG_MDSCR_KDE		(1 << 13)
34 #define DBG_MDSCR_MDE		(1 << 15)
35 #define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
36 
37 #define	DBG_ESR_EVT(x)		(((x) >> 27) & 0x7)
38 
39 /* AArch64 */
40 #define DBG_ESR_EVT_HWBP	0x0
41 #define DBG_ESR_EVT_HWSS	0x1
42 #define DBG_ESR_EVT_HWWP	0x2
43 #define DBG_ESR_EVT_BRK		0x6
44 
45 /*
46  * Break point instruction encoding
47  */
48 #define BREAK_INSTR_SIZE		AARCH64_INSN_SIZE
49 
50 /*
51  * BRK instruction encoding
52  * The #imm16 value should be placed at bits[20:5] within BRK ins
53  */
54 #define AARCH64_BREAK_MON	0xd4200000
55 
56 /*
57  * BRK instruction for provoking a fault on purpose
58  * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
59  */
60 #define AARCH64_BREAK_FAULT	(AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
61 
62 #define AARCH64_BREAK_KGDB_DYN_DBG	\
63 	(AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))
64 
65 #define CACHE_FLUSH_IS_SAFE		1
66 
67 /* kprobes BRK opcodes with ESR encoding  */
68 #define BRK64_OPCODE_KPROBES	(AARCH64_BREAK_MON | (KPROBES_BRK_IMM << 5))
69 /* uprobes BRK opcodes with ESR encoding  */
70 #define BRK64_OPCODE_UPROBES	(AARCH64_BREAK_MON | (UPROBES_BRK_IMM << 5))
71 
72 /* AArch32 */
73 #define DBG_ESR_EVT_BKPT	0x4
74 #define DBG_ESR_EVT_VECC	0x5
75 
76 #define AARCH32_BREAK_ARM	0x07f001f0
77 #define AARCH32_BREAK_THUMB	0xde01
78 #define AARCH32_BREAK_THUMB2_LO	0xf7f0
79 #define AARCH32_BREAK_THUMB2_HI	0xa000
80 
81 #ifndef __ASSEMBLY__
82 struct task_struct;
83 
84 #define DBG_ARCH_ID_RESERVED	0	/* In case of ptrace ABI updates. */
85 
86 #define DBG_HOOK_HANDLED	0
87 #define DBG_HOOK_ERROR		1
88 
89 struct step_hook {
90 	struct list_head node;
91 	int (*fn)(struct pt_regs *regs, unsigned int esr);
92 };
93 
94 void register_user_step_hook(struct step_hook *hook);
95 void unregister_user_step_hook(struct step_hook *hook);
96 
97 void register_kernel_step_hook(struct step_hook *hook);
98 void unregister_kernel_step_hook(struct step_hook *hook);
99 
100 struct break_hook {
101 	struct list_head node;
102 	int (*fn)(struct pt_regs *regs, unsigned int esr);
103 	u16 imm;
104 	u16 mask; /* These bits are ignored when comparing with imm */
105 };
106 
107 void register_user_break_hook(struct break_hook *hook);
108 void unregister_user_break_hook(struct break_hook *hook);
109 
110 void register_kernel_break_hook(struct break_hook *hook);
111 void unregister_kernel_break_hook(struct break_hook *hook);
112 
113 u8 debug_monitors_arch(void);
114 
115 enum dbg_active_el {
116 	DBG_ACTIVE_EL0 = 0,
117 	DBG_ACTIVE_EL1,
118 };
119 
120 void enable_debug_monitors(enum dbg_active_el el);
121 void disable_debug_monitors(enum dbg_active_el el);
122 
123 void user_rewind_single_step(struct task_struct *task);
124 void user_fastforward_single_step(struct task_struct *task);
125 
126 void kernel_enable_single_step(struct pt_regs *regs);
127 void kernel_disable_single_step(void);
128 int kernel_active_single_step(void);
129 
130 #ifdef CONFIG_HAVE_HW_BREAKPOINT
131 int reinstall_suspended_bps(struct pt_regs *regs);
132 #else
133 static inline int reinstall_suspended_bps(struct pt_regs *regs)
134 {
135 	return -ENODEV;
136 }
137 #endif
138 
139 int aarch32_break_handler(struct pt_regs *regs);
140 
141 #endif	/* __ASSEMBLY */
142 #endif	/* __KERNEL__ */
143 #endif	/* __ASM_DEBUG_MONITORS_H */
144