1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2013-2014, Linaro Ltd. 4 * Author: Al Stone <al.stone@linaro.org> 5 * Author: Graeme Gregory <graeme.gregory@linaro.org> 6 * Author: Hanjun Guo <hanjun.guo@linaro.org> 7 */ 8 9 #ifndef _ASM_ACPI_H 10 #define _ASM_ACPI_H 11 12 #include <linux/efi.h> 13 #include <linux/memblock.h> 14 #include <linux/psci.h> 15 16 #include <asm/cputype.h> 17 #include <asm/io.h> 18 #include <asm/ptrace.h> 19 #include <asm/smp_plat.h> 20 #include <asm/tlbflush.h> 21 22 /* Macros for consistency checks of the GICC subtable of MADT */ 23 24 /* 25 * MADT GICC minimum length refers to the MADT GICC structure table length as 26 * defined in the earliest ACPI version supported on arm64, ie ACPI 5.1. 27 * 28 * The efficiency_class member was added to the 29 * struct acpi_madt_generic_interrupt to represent the MADT GICC structure 30 * "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset 31 * is therefore used to delimit the MADT GICC structure minimum length 32 * appropriately. 33 */ 34 #define ACPI_MADT_GICC_MIN_LENGTH ACPI_OFFSET( \ 35 struct acpi_madt_generic_interrupt, efficiency_class) 36 37 #define BAD_MADT_GICC_ENTRY(entry, end) \ 38 (!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \ 39 (unsigned long)(entry) + (entry)->header.length > (end)) 40 41 #define ACPI_MADT_GICC_SPE (ACPI_OFFSET(struct acpi_madt_generic_interrupt, \ 42 spe_interrupt) + sizeof(u16)) 43 44 /* Basic configuration for ACPI */ 45 #ifdef CONFIG_ACPI 46 pgprot_t __acpi_get_mem_attribute(phys_addr_t addr); 47 48 /* ACPI table mapping after acpi_permanent_mmap is set */ 49 static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys, 50 acpi_size size) 51 { 52 /* For normal memory we already have a cacheable mapping. */ 53 if (memblock_is_map_memory(phys)) 54 return (void __iomem *)__phys_to_virt(phys); 55 56 /* 57 * We should still honor the memory's attribute here because 58 * crash dump kernel possibly excludes some ACPI (reclaim) 59 * regions from memblock list. 60 */ 61 return __ioremap(phys, size, __acpi_get_mem_attribute(phys)); 62 } 63 #define acpi_os_ioremap acpi_os_ioremap 64 65 typedef u64 phys_cpuid_t; 66 #define PHYS_CPUID_INVALID INVALID_HWID 67 68 #define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */ 69 extern int acpi_disabled; 70 extern int acpi_noirq; 71 extern int acpi_pci_disabled; 72 73 static inline void disable_acpi(void) 74 { 75 acpi_disabled = 1; 76 acpi_pci_disabled = 1; 77 acpi_noirq = 1; 78 } 79 80 static inline void enable_acpi(void) 81 { 82 acpi_disabled = 0; 83 acpi_pci_disabled = 0; 84 acpi_noirq = 0; 85 } 86 87 /* 88 * The ACPI processor driver for ACPI core code needs this macro 89 * to find out this cpu was already mapped (mapping from CPU hardware 90 * ID to CPU logical ID) or not. 91 */ 92 #define cpu_physical_id(cpu) cpu_logical_map(cpu) 93 94 /* 95 * It's used from ACPI core in kdump to boot UP system with SMP kernel, 96 * with this check the ACPI core will not override the CPU index 97 * obtained from GICC with 0 and not print some error message as well. 98 * Since MADT must provide at least one GICC structure for GIC 99 * initialization, CPU will be always available in MADT on ARM64. 100 */ 101 static inline bool acpi_has_cpu_in_madt(void) 102 { 103 return true; 104 } 105 106 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu); 107 static inline u32 get_acpi_id_for_cpu(unsigned int cpu) 108 { 109 return acpi_cpu_get_madt_gicc(cpu)->uid; 110 } 111 112 static inline void arch_fix_phys_package_id(int num, u32 slot) { } 113 void __init acpi_init_cpus(void); 114 int apei_claim_sea(struct pt_regs *regs); 115 #else 116 static inline void acpi_init_cpus(void) { } 117 static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; } 118 #endif /* CONFIG_ACPI */ 119 120 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL 121 bool acpi_parking_protocol_valid(int cpu); 122 void __init 123 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor); 124 #else 125 static inline bool acpi_parking_protocol_valid(int cpu) { return false; } 126 static inline void 127 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor) 128 {} 129 #endif 130 131 static inline const char *acpi_get_enable_method(int cpu) 132 { 133 if (acpi_psci_present()) 134 return "psci"; 135 136 if (acpi_parking_protocol_valid(cpu)) 137 return "parking-protocol"; 138 139 return NULL; 140 } 141 142 #ifdef CONFIG_ACPI_APEI 143 /* 144 * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling 145 * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode 146 * with a kernel command line parameter "acpi=nocmcoff". But we don't 147 * have this IA-32 specific feature on ARM64, this definition is only 148 * for compatibility. 149 */ 150 #define acpi_disable_cmcff 1 151 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr) 152 { 153 return __acpi_get_mem_attribute(addr); 154 } 155 #endif /* CONFIG_ACPI_APEI */ 156 157 #ifdef CONFIG_ACPI_NUMA 158 int arm64_acpi_numa_init(void); 159 int acpi_numa_get_nid(unsigned int cpu); 160 void acpi_map_cpus_to_nodes(void); 161 #else 162 static inline int arm64_acpi_numa_init(void) { return -ENOSYS; } 163 static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } 164 static inline void acpi_map_cpus_to_nodes(void) { } 165 #endif /* CONFIG_ACPI_NUMA */ 166 167 #define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE 168 169 #endif /*_ASM_ACPI_H*/ 170