xref: /linux/arch/arm64/include/asm/acpi.h (revision 31d166642c7c601c65eccf0ff2e0afe9a0538be2)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  Copyright (C) 2013-2014, Linaro Ltd.
4  *	Author: Al Stone <al.stone@linaro.org>
5  *	Author: Graeme Gregory <graeme.gregory@linaro.org>
6  *	Author: Hanjun Guo <hanjun.guo@linaro.org>
7  */
8 
9 #ifndef _ASM_ACPI_H
10 #define _ASM_ACPI_H
11 
12 #include <linux/efi.h>
13 #include <linux/memblock.h>
14 #include <linux/psci.h>
15 
16 #include <asm/cputype.h>
17 #include <asm/io.h>
18 #include <asm/ptrace.h>
19 #include <asm/smp_plat.h>
20 #include <asm/tlbflush.h>
21 
22 /* Macros for consistency checks of the GICC subtable of MADT */
23 
24 /*
25  * MADT GICC minimum length refers to the MADT GICC structure table length as
26  * defined in the earliest ACPI version supported on arm64, ie ACPI 5.1.
27  *
28  * The efficiency_class member was added to the
29  * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
30  * "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset
31  * is therefore used to delimit the MADT GICC structure minimum length
32  * appropriately.
33  */
34 #define ACPI_MADT_GICC_MIN_LENGTH   ACPI_OFFSET(  \
35 	struct acpi_madt_generic_interrupt, efficiency_class)
36 
37 #define BAD_MADT_GICC_ENTRY(entry, end)					\
38 	(!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \
39 	(unsigned long)(entry) + (entry)->header.length > (end))
40 
41 /* Basic configuration for ACPI */
42 #ifdef	CONFIG_ACPI
43 pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
44 
45 /* ACPI table mapping after acpi_permanent_mmap is set */
46 static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
47 					    acpi_size size)
48 {
49 	/* For normal memory we already have a cacheable mapping. */
50 	if (memblock_is_map_memory(phys))
51 		return (void __iomem *)__phys_to_virt(phys);
52 
53 	/*
54 	 * We should still honor the memory's attribute here because
55 	 * crash dump kernel possibly excludes some ACPI (reclaim)
56 	 * regions from memblock list.
57 	 */
58 	return __ioremap(phys, size, __acpi_get_mem_attribute(phys));
59 }
60 #define acpi_os_ioremap acpi_os_ioremap
61 
62 typedef u64 phys_cpuid_t;
63 #define PHYS_CPUID_INVALID INVALID_HWID
64 
65 #define acpi_strict 1	/* No out-of-spec workarounds on ARM64 */
66 extern int acpi_disabled;
67 extern int acpi_noirq;
68 extern int acpi_pci_disabled;
69 
70 static inline void disable_acpi(void)
71 {
72 	acpi_disabled = 1;
73 	acpi_pci_disabled = 1;
74 	acpi_noirq = 1;
75 }
76 
77 static inline void enable_acpi(void)
78 {
79 	acpi_disabled = 0;
80 	acpi_pci_disabled = 0;
81 	acpi_noirq = 0;
82 }
83 
84 /*
85  * The ACPI processor driver for ACPI core code needs this macro
86  * to find out this cpu was already mapped (mapping from CPU hardware
87  * ID to CPU logical ID) or not.
88  */
89 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
90 
91 /*
92  * It's used from ACPI core in kdump to boot UP system with SMP kernel,
93  * with this check the ACPI core will not override the CPU index
94  * obtained from GICC with 0 and not print some error message as well.
95  * Since MADT must provide at least one GICC structure for GIC
96  * initialization, CPU will be always available in MADT on ARM64.
97  */
98 static inline bool acpi_has_cpu_in_madt(void)
99 {
100 	return true;
101 }
102 
103 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
104 static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
105 {
106 	return	acpi_cpu_get_madt_gicc(cpu)->uid;
107 }
108 
109 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
110 void __init acpi_init_cpus(void);
111 int apei_claim_sea(struct pt_regs *regs);
112 #else
113 static inline void acpi_init_cpus(void) { }
114 static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; }
115 #endif /* CONFIG_ACPI */
116 
117 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
118 bool acpi_parking_protocol_valid(int cpu);
119 void __init
120 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
121 #else
122 static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
123 static inline void
124 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
125 {}
126 #endif
127 
128 static inline const char *acpi_get_enable_method(int cpu)
129 {
130 	if (acpi_psci_present())
131 		return "psci";
132 
133 	if (acpi_parking_protocol_valid(cpu))
134 		return "parking-protocol";
135 
136 	return NULL;
137 }
138 
139 #ifdef	CONFIG_ACPI_APEI
140 /*
141  * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
142  * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
143  * with a kernel command line parameter "acpi=nocmcoff". But we don't
144  * have this IA-32 specific feature on ARM64, this definition is only
145  * for compatibility.
146  */
147 #define acpi_disable_cmcff 1
148 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
149 {
150 	return __acpi_get_mem_attribute(addr);
151 }
152 #endif /* CONFIG_ACPI_APEI */
153 
154 #ifdef CONFIG_ACPI_NUMA
155 int arm64_acpi_numa_init(void);
156 int acpi_numa_get_nid(unsigned int cpu);
157 void acpi_map_cpus_to_nodes(void);
158 #else
159 static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
160 static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
161 static inline void acpi_map_cpus_to_nodes(void) { }
162 #endif /* CONFIG_ACPI_NUMA */
163 
164 #define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
165 
166 #endif /*_ASM_ACPI_H*/
167