1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * dts file for Xilinx ZynqMP ZCU104 4 * 5 * (C) Copyright 2017 - 2018, Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 */ 9 10/dts-v1/; 11 12#include "zynqmp.dtsi" 13#include "zynqmp-clk.dtsi" 14#include <dt-bindings/gpio/gpio.h> 15 16/ { 17 model = "ZynqMP ZCU104 RevA"; 18 compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 19 20 aliases { 21 ethernet0 = &gem3; 22 i2c0 = &i2c1; 23 mmc0 = &sdhci1; 24 rtc0 = &rtc; 25 serial0 = &uart0; 26 serial1 = &uart1; 27 serial2 = &dcc; 28 }; 29 30 chosen { 31 bootargs = "earlycon"; 32 stdout-path = "serial0:115200n8"; 33 }; 34 35 memory@0 { 36 device_type = "memory"; 37 reg = <0x0 0x0 0x0 0x80000000>; 38 }; 39}; 40 41&can1 { 42 status = "okay"; 43}; 44 45&dcc { 46 status = "okay"; 47}; 48 49&gem3 { 50 status = "okay"; 51 phy-handle = <&phy0>; 52 phy-mode = "rgmii-id"; 53 phy0: phy@c { 54 reg = <0xc>; 55 ti,rx-internal-delay = <0x8>; 56 ti,tx-internal-delay = <0xa>; 57 ti,fifo-depth = <0x1>; 58 }; 59}; 60 61&gpio { 62 status = "okay"; 63}; 64 65&i2c1 { 66 status = "okay"; 67 clock-frequency = <400000>; 68 69 /* Another connection to this bus via PL i2c via PCA9306 - u45 */ 70 i2c-mux@74 { /* u34 */ 71 compatible = "nxp,pca9548"; 72 #address-cells = <1>; 73 #size-cells = <0>; 74 reg = <0x74>; 75 i2c@0 { 76 #address-cells = <1>; 77 #size-cells = <0>; 78 reg = <0>; 79 /* 80 * IIC_EEPROM 1kB memory which uses 256B blocks 81 * where every block has different address. 82 * 0 - 256B address 0x54 83 * 256B - 512B address 0x55 84 * 512B - 768B address 0x56 85 * 768B - 1024B address 0x57 86 */ 87 eeprom@54 { /* u23 */ 88 compatible = "atmel,24c08"; 89 reg = <0x54>; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 }; 93 }; 94 95 i2c@1 { 96 #address-cells = <1>; 97 #size-cells = <0>; 98 reg = <1>; 99 clock_8t49n287: clock-generator@6c { /* 8T49N287 - u182 */ 100 reg = <0x6c>; 101 }; 102 }; 103 104 i2c@2 { 105 #address-cells = <1>; 106 #size-cells = <0>; 107 reg = <2>; 108 irps5401_43: irps54012@43 { /* IRPS5401 - u175 */ 109 reg = <0x43>; 110 }; 111 irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */ 112 reg = <0x4d>; 113 }; 114 }; 115 116 i2c@4 { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 reg = <4>; 120 tca6416_u97: gpio@21 { 121 compatible = "ti,tca6416"; 122 reg = <0x21>; 123 gpio-controller; 124 #gpio-cells = <2>; 125 /* 126 * IRQ not connected 127 * Lines: 128 * 0 - IRPS5401_ALERT_B 129 * 1 - HDMI_8T49N241_INT_ALM 130 * 2 - MAX6643_OT_B 131 * 3 - MAX6643_FANFAIL_B 132 * 5 - IIC_MUX_RESET_B 133 * 6 - GEM3_EXP_RESET_B 134 * 7 - FMC_LPC_PRSNT_M2C_B 135 * 4, 10 - 17 - not connected 136 */ 137 }; 138 }; 139 140 i2c@5 { 141 #address-cells = <1>; 142 #size-cells = <0>; 143 reg = <5>; 144 }; 145 146 i2c@7 { 147 #address-cells = <1>; 148 #size-cells = <0>; 149 reg = <7>; 150 }; 151 152 /* 3, 6 not connected */ 153 }; 154}; 155 156&rtc { 157 status = "okay"; 158}; 159 160&sata { 161 status = "okay"; 162 /* SATA OOB timing settings */ 163 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 164 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 165 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 166 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 167 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 168 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 169 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 170 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 171}; 172 173/* SD1 with level shifter */ 174&sdhci1 { 175 status = "okay"; 176 no-1-8-v; 177 disable-wp; 178}; 179 180&uart0 { 181 status = "okay"; 182}; 183 184&uart1 { 185 status = "okay"; 186}; 187 188/* ULPI SMSC USB3320 */ 189&usb0 { 190 status = "okay"; 191}; 192 193&watchdog0 { 194 status = "okay"; 195}; 196